Commit | Line | Data |
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651c74c7 SB |
1 | /* |
2 | * arch/arm/mach-kirkwood/common.c | |
3 | * | |
4 | * Core functions for Marvell Kirkwood SoCs | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/serial_8250.h> | |
651c74c7 | 15 | #include <linux/ata_platform.h> |
fb7b2d3f | 16 | #include <linux/mtd/nand.h> |
ee962723 | 17 | #include <linux/dma-mapping.h> |
2f129bf4 AL |
18 | #include <linux/clk-provider.h> |
19 | #include <linux/spinlock.h> | |
e91cac0a | 20 | #include <linux/mv643xx_i2c.h> |
dcf1cece | 21 | #include <net/dsa.h> |
651c74c7 SB |
22 | #include <asm/page.h> |
23 | #include <asm/timex.h> | |
9c15364f | 24 | #include <asm/kexec.h> |
651c74c7 SB |
25 | #include <asm/mach/map.h> |
26 | #include <asm/mach/time.h> | |
a09e64fb | 27 | #include <mach/kirkwood.h> |
fdd8b079 | 28 | #include <mach/bridge-regs.h> |
49106c72 | 29 | #include <plat/audio.h> |
6f088f1d | 30 | #include <plat/cache-feroceon-l2.h> |
8235ee00 | 31 | #include <plat/mvsdio.h> |
6f088f1d | 32 | #include <plat/orion_nand.h> |
72053353 | 33 | #include <plat/ehci-orion.h> |
28a2b450 | 34 | #include <plat/common.h> |
6f088f1d | 35 | #include <plat/time.h> |
45173d5e | 36 | #include <plat/addr-map.h> |
2f129bf4 | 37 | #include <plat/mv_xor.h> |
651c74c7 SB |
38 | #include "common.h" |
39 | ||
40 | /***************************************************************************** | |
41 | * I/O Address Mapping | |
42 | ****************************************************************************/ | |
43 | static struct map_desc kirkwood_io_desc[] __initdata = { | |
44 | { | |
45 | .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE, | |
46 | .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE), | |
47 | .length = KIRKWOOD_PCIE_IO_SIZE, | |
48 | .type = MT_DEVICE, | |
ffd58bd2 SB |
49 | }, { |
50 | .virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE, | |
51 | .pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE), | |
52 | .length = KIRKWOOD_PCIE1_IO_SIZE, | |
53 | .type = MT_DEVICE, | |
651c74c7 SB |
54 | }, { |
55 | .virtual = KIRKWOOD_REGS_VIRT_BASE, | |
56 | .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE), | |
57 | .length = KIRKWOOD_REGS_SIZE, | |
58 | .type = MT_DEVICE, | |
59 | }, | |
60 | }; | |
61 | ||
62 | void __init kirkwood_map_io(void) | |
63 | { | |
64 | iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc)); | |
65 | } | |
66 | ||
2f129bf4 AL |
67 | /***************************************************************************** |
68 | * CLK tree | |
69 | ****************************************************************************/ | |
98d9986c | 70 | |
b5409430 SB |
71 | static void enable_sata0(void) |
72 | { | |
73 | /* Enable PLL and IVREF */ | |
74 | writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2); | |
75 | /* Enable PHY */ | |
76 | writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL); | |
77 | } | |
78 | ||
98d9986c AL |
79 | static void disable_sata0(void) |
80 | { | |
81 | /* Disable PLL and IVREF */ | |
82 | writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2); | |
83 | /* Disable PHY */ | |
84 | writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL); | |
85 | } | |
86 | ||
b5409430 SB |
87 | static void enable_sata1(void) |
88 | { | |
89 | /* Enable PLL and IVREF */ | |
90 | writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2); | |
91 | /* Enable PHY */ | |
92 | writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL); | |
93 | } | |
94 | ||
98d9986c AL |
95 | static void disable_sata1(void) |
96 | { | |
97 | /* Disable PLL and IVREF */ | |
98 | writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2); | |
99 | /* Disable PHY */ | |
100 | writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL); | |
101 | } | |
102 | ||
103 | static void disable_pcie0(void) | |
104 | { | |
105 | writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL); | |
106 | while (1) | |
107 | if (readl(PCIE_STATUS) & 0x1) | |
108 | break; | |
109 | writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL); | |
110 | } | |
111 | ||
112 | static void disable_pcie1(void) | |
113 | { | |
114 | u32 dev, rev; | |
115 | ||
116 | kirkwood_pcie_id(&dev, &rev); | |
117 | ||
118 | if (dev == MV88F6282_DEV_ID) { | |
119 | writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL); | |
120 | while (1) | |
121 | if (readl(PCIE1_STATUS) & 0x1) | |
122 | break; | |
123 | writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL); | |
124 | } | |
125 | } | |
126 | ||
b5409430 SB |
127 | /* An extended version of the gated clk. This calls fn_en()/fn_dis |
128 | * before enabling/disabling the clock. We use this to turn on/off | |
129 | * PHYs etc. */ | |
98d9986c AL |
130 | struct clk_gate_fn { |
131 | struct clk_gate gate; | |
b5409430 SB |
132 | void (*fn_en)(void); |
133 | void (*fn_dis)(void); | |
98d9986c AL |
134 | }; |
135 | ||
136 | #define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate) | |
137 | #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) | |
138 | ||
b5409430 SB |
139 | static int clk_gate_fn_enable(struct clk_hw *hw) |
140 | { | |
141 | struct clk_gate *gate = to_clk_gate(hw); | |
142 | struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); | |
143 | int ret; | |
144 | ||
145 | ret = clk_gate_ops.enable(hw); | |
146 | if (!ret && gate_fn->fn_en) | |
147 | gate_fn->fn_en(); | |
148 | ||
149 | return ret; | |
150 | } | |
151 | ||
98d9986c AL |
152 | static void clk_gate_fn_disable(struct clk_hw *hw) |
153 | { | |
154 | struct clk_gate *gate = to_clk_gate(hw); | |
155 | struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); | |
156 | ||
b5409430 SB |
157 | if (gate_fn->fn_dis) |
158 | gate_fn->fn_dis(); | |
98d9986c AL |
159 | |
160 | clk_gate_ops.disable(hw); | |
161 | } | |
162 | ||
163 | static struct clk_ops clk_gate_fn_ops; | |
164 | ||
165 | static struct clk __init *clk_register_gate_fn(struct device *dev, | |
166 | const char *name, | |
167 | const char *parent_name, unsigned long flags, | |
168 | void __iomem *reg, u8 bit_idx, | |
169 | u8 clk_gate_flags, spinlock_t *lock, | |
b5409430 | 170 | void (*fn_en)(void), void (*fn_dis)(void)) |
98d9986c AL |
171 | { |
172 | struct clk_gate_fn *gate_fn; | |
173 | struct clk *clk; | |
174 | struct clk_init_data init; | |
175 | ||
176 | gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL); | |
177 | if (!gate_fn) { | |
178 | pr_err("%s: could not allocate gated clk\n", __func__); | |
179 | return ERR_PTR(-ENOMEM); | |
180 | } | |
181 | ||
182 | init.name = name; | |
183 | init.ops = &clk_gate_fn_ops; | |
184 | init.flags = flags; | |
185 | init.parent_names = (parent_name ? &parent_name : NULL); | |
186 | init.num_parents = (parent_name ? 1 : 0); | |
187 | ||
188 | /* struct clk_gate assignments */ | |
189 | gate_fn->gate.reg = reg; | |
190 | gate_fn->gate.bit_idx = bit_idx; | |
191 | gate_fn->gate.flags = clk_gate_flags; | |
192 | gate_fn->gate.lock = lock; | |
193 | gate_fn->gate.hw.init = &init; | |
b5409430 SB |
194 | gate_fn->fn_en = fn_en; |
195 | gate_fn->fn_dis = fn_dis; | |
98d9986c | 196 | |
b5409430 SB |
197 | /* ops is the gate ops, but with our enable/disable functions */ |
198 | if (clk_gate_fn_ops.enable != clk_gate_fn_enable || | |
199 | clk_gate_fn_ops.disable != clk_gate_fn_disable) { | |
98d9986c | 200 | clk_gate_fn_ops = clk_gate_ops; |
b5409430 | 201 | clk_gate_fn_ops.enable = clk_gate_fn_enable; |
98d9986c AL |
202 | clk_gate_fn_ops.disable = clk_gate_fn_disable; |
203 | } | |
204 | ||
205 | clk = clk_register(dev, &gate_fn->gate.hw); | |
206 | ||
207 | if (IS_ERR(clk)) | |
208 | kfree(gate_fn); | |
209 | ||
210 | return clk; | |
211 | } | |
212 | ||
2f129bf4 AL |
213 | static DEFINE_SPINLOCK(gating_lock); |
214 | static struct clk *tclk; | |
215 | ||
216 | static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx) | |
217 | { | |
98d9986c | 218 | return clk_register_gate(NULL, name, "tclk", 0, |
2f129bf4 AL |
219 | (void __iomem *)CLOCK_GATING_CTRL, |
220 | bit_idx, 0, &gating_lock); | |
221 | } | |
222 | ||
98d9986c AL |
223 | static struct clk __init *kirkwood_register_gate_fn(const char *name, |
224 | u8 bit_idx, | |
b5409430 SB |
225 | void (*fn_en)(void), |
226 | void (*fn_dis)(void)) | |
98d9986c AL |
227 | { |
228 | return clk_register_gate_fn(NULL, name, "tclk", 0, | |
229 | (void __iomem *)CLOCK_GATING_CTRL, | |
b5409430 | 230 | bit_idx, 0, &gating_lock, fn_en, fn_dis); |
98d9986c AL |
231 | } |
232 | ||
128789a8 AL |
233 | static struct clk *ge0, *ge1; |
234 | ||
2f129bf4 AL |
235 | void __init kirkwood_clk_init(void) |
236 | { | |
128789a8 | 237 | struct clk *runit, *sata0, *sata1, *usb0, *sdio; |
e919c716 | 238 | struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio; |
4574b886 | 239 | |
2f129bf4 AL |
240 | tclk = clk_register_fixed_rate(NULL, "tclk", NULL, |
241 | CLK_IS_ROOT, kirkwood_tclk); | |
242 | ||
4574b886 | 243 | runit = kirkwood_register_gate("runit", CGC_BIT_RUNIT); |
452503eb AL |
244 | ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0); |
245 | ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1); | |
98d9986c | 246 | sata0 = kirkwood_register_gate_fn("sata0", CGC_BIT_SATA0, |
b5409430 | 247 | enable_sata0, disable_sata0); |
98d9986c | 248 | sata1 = kirkwood_register_gate_fn("sata1", CGC_BIT_SATA1, |
b5409430 | 249 | enable_sata1, disable_sata1); |
8c869eda | 250 | usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0); |
f4f7561e | 251 | sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO); |
1f80b126 | 252 | crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO); |
c510182b AL |
253 | xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0); |
254 | xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1); | |
98d9986c | 255 | pex0 = kirkwood_register_gate_fn("pex0", CGC_BIT_PEX0, |
b5409430 | 256 | NULL, disable_pcie0); |
98d9986c | 257 | pex1 = kirkwood_register_gate_fn("pex1", CGC_BIT_PEX1, |
b5409430 | 258 | NULL, disable_pcie1); |
e919c716 | 259 | audio = kirkwood_register_gate("audio", CGC_BIT_AUDIO); |
2f129bf4 AL |
260 | kirkwood_register_gate("tdm", CGC_BIT_TDM); |
261 | kirkwood_register_gate("tsu", CGC_BIT_TSU); | |
4574b886 AL |
262 | |
263 | /* clkdev entries, mapping clks to devices */ | |
264 | orion_clkdev_add(NULL, "orion_spi.0", runit); | |
265 | orion_clkdev_add(NULL, "orion_spi.1", runit); | |
452503eb AL |
266 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0); |
267 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1); | |
4f04be62 | 268 | orion_clkdev_add(NULL, "orion_wdt", tclk); |
eee98990 AL |
269 | orion_clkdev_add("0", "sata_mv.0", sata0); |
270 | orion_clkdev_add("1", "sata_mv.0", sata1); | |
8c869eda | 271 | orion_clkdev_add(NULL, "orion-ehci.0", usb0); |
9c2bd504 | 272 | orion_clkdev_add(NULL, "orion_nand", runit); |
f4f7561e | 273 | orion_clkdev_add(NULL, "mvsdio", sdio); |
1f80b126 | 274 | orion_clkdev_add(NULL, "mv_crypto", crypto); |
c510182b AL |
275 | orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0); |
276 | orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1); | |
27e53cfb AL |
277 | orion_clkdev_add("0", "pcie", pex0); |
278 | orion_clkdev_add("1", "pcie", pex1); | |
e919c716 | 279 | orion_clkdev_add(NULL, "kirkwood-i2s", audio); |
e91cac0a | 280 | orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit); |
f479db44 AL |
281 | |
282 | /* Marvell says runit is used by SPI, UART, NAND, TWSI, ..., | |
283 | * so should never be gated. | |
284 | */ | |
285 | clk_prepare_enable(runit); | |
2f129bf4 AL |
286 | } |
287 | ||
651c74c7 SB |
288 | /***************************************************************************** |
289 | * EHCI0 | |
290 | ****************************************************************************/ | |
651c74c7 SB |
291 | void __init kirkwood_ehci_init(void) |
292 | { | |
72053353 | 293 | orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA); |
651c74c7 SB |
294 | } |
295 | ||
296 | ||
297 | /***************************************************************************** | |
298 | * GE00 | |
299 | ****************************************************************************/ | |
651c74c7 SB |
300 | void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data) |
301 | { | |
db33f4de | 302 | orion_ge00_init(eth_data, |
7e3819d8 | 303 | GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, |
58569aee | 304 | IRQ_KIRKWOOD_GE00_ERR, 1600); |
128789a8 AL |
305 | /* The interface forgets the MAC address assigned by u-boot if |
306 | the clock is turned off, so claim the clk now. */ | |
307 | clk_prepare_enable(ge0); | |
651c74c7 SB |
308 | } |
309 | ||
310 | ||
d15fb9ef RS |
311 | /***************************************************************************** |
312 | * GE01 | |
313 | ****************************************************************************/ | |
d15fb9ef RS |
314 | void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data) |
315 | { | |
db33f4de | 316 | orion_ge01_init(eth_data, |
7e3819d8 | 317 | GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, |
58569aee | 318 | IRQ_KIRKWOOD_GE01_ERR, 1600); |
128789a8 | 319 | clk_prepare_enable(ge1); |
d15fb9ef RS |
320 | } |
321 | ||
322 | ||
dcf1cece LB |
323 | /***************************************************************************** |
324 | * Ethernet switch | |
325 | ****************************************************************************/ | |
dcf1cece LB |
326 | void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq) |
327 | { | |
7e3819d8 | 328 | orion_ge00_switch_init(d, irq); |
dcf1cece LB |
329 | } |
330 | ||
331 | ||
fb7b2d3f NP |
332 | /***************************************************************************** |
333 | * NAND flash | |
334 | ****************************************************************************/ | |
335 | static struct resource kirkwood_nand_resource = { | |
336 | .flags = IORESOURCE_MEM, | |
337 | .start = KIRKWOOD_NAND_MEM_PHYS_BASE, | |
338 | .end = KIRKWOOD_NAND_MEM_PHYS_BASE + | |
339 | KIRKWOOD_NAND_MEM_SIZE - 1, | |
340 | }; | |
341 | ||
342 | static struct orion_nand_data kirkwood_nand_data = { | |
343 | .cle = 0, | |
344 | .ale = 1, | |
345 | .width = 8, | |
346 | }; | |
347 | ||
348 | static struct platform_device kirkwood_nand_flash = { | |
349 | .name = "orion_nand", | |
350 | .id = -1, | |
351 | .dev = { | |
352 | .platform_data = &kirkwood_nand_data, | |
353 | }, | |
354 | .resource = &kirkwood_nand_resource, | |
355 | .num_resources = 1, | |
356 | }; | |
357 | ||
358 | void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, | |
359 | int chip_delay) | |
360 | { | |
361 | kirkwood_nand_data.parts = parts; | |
362 | kirkwood_nand_data.nr_parts = nr_parts; | |
363 | kirkwood_nand_data.chip_delay = chip_delay; | |
364 | platform_device_register(&kirkwood_nand_flash); | |
365 | } | |
366 | ||
010937ec BD |
367 | void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, |
368 | int (*dev_ready)(struct mtd_info *)) | |
369 | { | |
010937ec BD |
370 | kirkwood_nand_data.parts = parts; |
371 | kirkwood_nand_data.nr_parts = nr_parts; | |
372 | kirkwood_nand_data.dev_ready = dev_ready; | |
373 | platform_device_register(&kirkwood_nand_flash); | |
374 | } | |
fb7b2d3f | 375 | |
651c74c7 SB |
376 | /***************************************************************************** |
377 | * SoC RTC | |
378 | ****************************************************************************/ | |
e871b87a | 379 | static void __init kirkwood_rtc_init(void) |
651c74c7 | 380 | { |
4748058c | 381 | orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC); |
651c74c7 SB |
382 | } |
383 | ||
384 | ||
385 | /***************************************************************************** | |
386 | * SATA | |
387 | ****************************************************************************/ | |
651c74c7 SB |
388 | void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data) |
389 | { | |
db33f4de | 390 | orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA); |
651c74c7 SB |
391 | } |
392 | ||
393 | ||
8235ee00 NP |
394 | /***************************************************************************** |
395 | * SD/SDIO/MMC | |
396 | ****************************************************************************/ | |
397 | static struct resource mvsdio_resources[] = { | |
398 | [0] = { | |
399 | .start = SDIO_PHYS_BASE, | |
400 | .end = SDIO_PHYS_BASE + SZ_1K - 1, | |
401 | .flags = IORESOURCE_MEM, | |
402 | }, | |
403 | [1] = { | |
404 | .start = IRQ_KIRKWOOD_SDIO, | |
405 | .end = IRQ_KIRKWOOD_SDIO, | |
406 | .flags = IORESOURCE_IRQ, | |
407 | }, | |
408 | }; | |
409 | ||
5c602551 | 410 | static u64 mvsdio_dmamask = DMA_BIT_MASK(32); |
8235ee00 NP |
411 | |
412 | static struct platform_device kirkwood_sdio = { | |
413 | .name = "mvsdio", | |
414 | .id = -1, | |
415 | .dev = { | |
416 | .dma_mask = &mvsdio_dmamask, | |
5c602551 | 417 | .coherent_dma_mask = DMA_BIT_MASK(32), |
8235ee00 NP |
418 | }, |
419 | .num_resources = ARRAY_SIZE(mvsdio_resources), | |
420 | .resource = mvsdio_resources, | |
421 | }; | |
422 | ||
423 | void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data) | |
424 | { | |
425 | u32 dev, rev; | |
426 | ||
427 | kirkwood_pcie_id(&dev, &rev); | |
1e4d2d3d | 428 | if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */ |
8235ee00 NP |
429 | mvsdio_data->clock = 100000000; |
430 | else | |
431 | mvsdio_data->clock = 200000000; | |
8235ee00 NP |
432 | kirkwood_sdio.dev.platform_data = mvsdio_data; |
433 | platform_device_register(&kirkwood_sdio); | |
434 | } | |
435 | ||
436 | ||
18365d18 LB |
437 | /***************************************************************************** |
438 | * SPI | |
439 | ****************************************************************************/ | |
18365d18 LB |
440 | void __init kirkwood_spi_init() |
441 | { | |
4574b886 | 442 | orion_spi_init(SPI_PHYS_BASE); |
18365d18 LB |
443 | } |
444 | ||
445 | ||
6574e001 MM |
446 | /***************************************************************************** |
447 | * I2C | |
448 | ****************************************************************************/ | |
6574e001 MM |
449 | void __init kirkwood_i2c_init(void) |
450 | { | |
aac7ffa3 | 451 | orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8); |
6574e001 MM |
452 | } |
453 | ||
454 | ||
651c74c7 SB |
455 | /***************************************************************************** |
456 | * UART0 | |
457 | ****************************************************************************/ | |
651c74c7 SB |
458 | |
459 | void __init kirkwood_uart0_init(void) | |
460 | { | |
28a2b450 | 461 | orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE, |
74c33576 | 462 | IRQ_KIRKWOOD_UART_0, tclk); |
651c74c7 SB |
463 | } |
464 | ||
465 | ||
466 | /***************************************************************************** | |
467 | * UART1 | |
468 | ****************************************************************************/ | |
651c74c7 SB |
469 | void __init kirkwood_uart1_init(void) |
470 | { | |
28a2b450 | 471 | orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE, |
74c33576 | 472 | IRQ_KIRKWOOD_UART_1, tclk); |
651c74c7 SB |
473 | } |
474 | ||
ae5c8c83 NP |
475 | /***************************************************************************** |
476 | * Cryptographic Engines and Security Accelerator (CESA) | |
477 | ****************************************************************************/ | |
ae5c8c83 NP |
478 | void __init kirkwood_crypto_init(void) |
479 | { | |
44350061 AL |
480 | orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE, |
481 | KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO); | |
ae5c8c83 NP |
482 | } |
483 | ||
484 | ||
09c0ed2e SB |
485 | /***************************************************************************** |
486 | * XOR0 | |
487 | ****************************************************************************/ | |
2b45e05f | 488 | void __init kirkwood_xor0_init(void) |
09c0ed2e | 489 | { |
db33f4de | 490 | orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE, |
ee962723 | 491 | IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01); |
09c0ed2e SB |
492 | } |
493 | ||
494 | ||
495 | /***************************************************************************** | |
496 | * XOR1 | |
497 | ****************************************************************************/ | |
2b45e05f | 498 | void __init kirkwood_xor1_init(void) |
09c0ed2e | 499 | { |
ee962723 AL |
500 | orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE, |
501 | IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11); | |
09c0ed2e SB |
502 | } |
503 | ||
504 | ||
054bd3f0 TR |
505 | /***************************************************************************** |
506 | * Watchdog | |
507 | ****************************************************************************/ | |
2b45e05f | 508 | void __init kirkwood_wdt_init(void) |
054bd3f0 | 509 | { |
4f04be62 | 510 | orion_wdt_init(); |
054bd3f0 TR |
511 | } |
512 | ||
513 | ||
651c74c7 SB |
514 | /***************************************************************************** |
515 | * Time handling | |
516 | ****************************************************************************/ | |
4ee1f6b5 LB |
517 | void __init kirkwood_init_early(void) |
518 | { | |
519 | orion_time_set_base(TIMER_VIRT_BASE); | |
520 | } | |
521 | ||
79d4dd77 RS |
522 | int kirkwood_tclk; |
523 | ||
9b8ebfec | 524 | static int __init kirkwood_find_tclk(void) |
79d4dd77 | 525 | { |
b2b3dc2f RS |
526 | u32 dev, rev; |
527 | ||
528 | kirkwood_pcie_id(&dev, &rev); | |
1e4d2d3d | 529 | |
2fa0f939 SG |
530 | if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID) |
531 | if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0) | |
532 | return 200000000; | |
b2b3dc2f | 533 | |
79d4dd77 RS |
534 | return 166666667; |
535 | } | |
536 | ||
6de95c19 | 537 | static void __init kirkwood_timer_init(void) |
651c74c7 | 538 | { |
79d4dd77 | 539 | kirkwood_tclk = kirkwood_find_tclk(); |
4ee1f6b5 LB |
540 | |
541 | orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, | |
542 | IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); | |
651c74c7 SB |
543 | } |
544 | ||
545 | struct sys_timer kirkwood_timer = { | |
546 | .init = kirkwood_timer_init, | |
547 | }; | |
548 | ||
49106c72 | 549 | /***************************************************************************** |
550 | * Audio | |
551 | ****************************************************************************/ | |
552 | static struct resource kirkwood_i2s_resources[] = { | |
553 | [0] = { | |
554 | .start = AUDIO_PHYS_BASE, | |
555 | .end = AUDIO_PHYS_BASE + SZ_16K - 1, | |
556 | .flags = IORESOURCE_MEM, | |
557 | }, | |
558 | [1] = { | |
559 | .start = IRQ_KIRKWOOD_I2S, | |
560 | .end = IRQ_KIRKWOOD_I2S, | |
561 | .flags = IORESOURCE_IRQ, | |
562 | }, | |
563 | }; | |
564 | ||
565 | static struct kirkwood_asoc_platform_data kirkwood_i2s_data = { | |
49106c72 | 566 | .burst = 128, |
567 | }; | |
568 | ||
569 | static struct platform_device kirkwood_i2s_device = { | |
570 | .name = "kirkwood-i2s", | |
571 | .id = -1, | |
572 | .num_resources = ARRAY_SIZE(kirkwood_i2s_resources), | |
573 | .resource = kirkwood_i2s_resources, | |
574 | .dev = { | |
575 | .platform_data = &kirkwood_i2s_data, | |
576 | }, | |
577 | }; | |
578 | ||
f0fba2ad | 579 | static struct platform_device kirkwood_pcm_device = { |
c88e7b93 | 580 | .name = "kirkwood-pcm-audio", |
f0fba2ad LG |
581 | .id = -1, |
582 | }; | |
583 | ||
49106c72 | 584 | void __init kirkwood_audio_init(void) |
585 | { | |
49106c72 | 586 | platform_device_register(&kirkwood_i2s_device); |
f0fba2ad | 587 | platform_device_register(&kirkwood_pcm_device); |
49106c72 | 588 | } |
651c74c7 SB |
589 | |
590 | /***************************************************************************** | |
591 | * General | |
592 | ****************************************************************************/ | |
b2b3dc2f RS |
593 | /* |
594 | * Identify device ID and revision. | |
595 | */ | |
2b45e05f | 596 | char * __init kirkwood_id(void) |
651c74c7 | 597 | { |
b2b3dc2f RS |
598 | u32 dev, rev; |
599 | ||
600 | kirkwood_pcie_id(&dev, &rev); | |
601 | ||
602 | if (dev == MV88F6281_DEV_ID) { | |
603 | if (rev == MV88F6281_REV_Z0) | |
604 | return "MV88F6281-Z0"; | |
605 | else if (rev == MV88F6281_REV_A0) | |
606 | return "MV88F6281-A0"; | |
aec1bad3 SG |
607 | else if (rev == MV88F6281_REV_A1) |
608 | return "MV88F6281-A1"; | |
b2b3dc2f RS |
609 | else |
610 | return "MV88F6281-Rev-Unsupported"; | |
611 | } else if (dev == MV88F6192_DEV_ID) { | |
612 | if (rev == MV88F6192_REV_Z0) | |
613 | return "MV88F6192-Z0"; | |
614 | else if (rev == MV88F6192_REV_A0) | |
615 | return "MV88F6192-A0"; | |
1c2003a1 SB |
616 | else if (rev == MV88F6192_REV_A1) |
617 | return "MV88F6192-A1"; | |
b2b3dc2f RS |
618 | else |
619 | return "MV88F6192-Rev-Unsupported"; | |
620 | } else if (dev == MV88F6180_DEV_ID) { | |
621 | if (rev == MV88F6180_REV_A0) | |
622 | return "MV88F6180-Rev-A0"; | |
1c2003a1 SB |
623 | else if (rev == MV88F6180_REV_A1) |
624 | return "MV88F6180-Rev-A1"; | |
b2b3dc2f RS |
625 | else |
626 | return "MV88F6180-Rev-Unsupported"; | |
1e4d2d3d SB |
627 | } else if (dev == MV88F6282_DEV_ID) { |
628 | if (rev == MV88F6282_REV_A0) | |
629 | return "MV88F6282-Rev-A0"; | |
a87d89e7 MM |
630 | else if (rev == MV88F6282_REV_A1) |
631 | return "MV88F6282-Rev-A1"; | |
1e4d2d3d SB |
632 | else |
633 | return "MV88F6282-Rev-Unsupported"; | |
b2b3dc2f RS |
634 | } else { |
635 | return "Device-Unknown"; | |
651c74c7 | 636 | } |
651c74c7 SB |
637 | } |
638 | ||
2b45e05f | 639 | void __init kirkwood_l2_init(void) |
13387603 | 640 | { |
4360bb41 RS |
641 | #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH |
642 | writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG); | |
643 | feroceon_l2_init(1); | |
644 | #else | |
645 | writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG); | |
646 | feroceon_l2_init(0); | |
647 | #endif | |
13387603 SB |
648 | } |
649 | ||
651c74c7 SB |
650 | void __init kirkwood_init(void) |
651 | { | |
652 | printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n", | |
79d4dd77 | 653 | kirkwood_id(), kirkwood_tclk); |
651c74c7 | 654 | |
2bf30108 LB |
655 | /* |
656 | * Disable propagation of mbus errors to the CPU local bus, | |
657 | * as this causes mbus errors (which can occur for example | |
658 | * for PCI aborts) to throw CPU aborts, which we're not set | |
659 | * up to deal with. | |
660 | */ | |
661 | writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG); | |
662 | ||
651c74c7 SB |
663 | kirkwood_setup_cpu_mbus(); |
664 | ||
665 | #ifdef CONFIG_CACHE_FEROCEON_L2 | |
4360bb41 | 666 | kirkwood_l2_init(); |
651c74c7 | 667 | #endif |
5b99d534 | 668 | |
2f129bf4 AL |
669 | /* Setup root of clk tree */ |
670 | kirkwood_clk_init(); | |
671 | ||
5b99d534 NP |
672 | /* internal devices that every board has */ |
673 | kirkwood_rtc_init(); | |
054bd3f0 | 674 | kirkwood_wdt_init(); |
5b99d534 NP |
675 | kirkwood_xor0_init(); |
676 | kirkwood_xor1_init(); | |
ae5c8c83 | 677 | kirkwood_crypto_init(); |
9c15364f EC |
678 | |
679 | #ifdef CONFIG_KEXEC | |
680 | kexec_reinit = kirkwood_enable_pcie; | |
681 | #endif | |
651c74c7 | 682 | } |
e8b2b7ba | 683 | |
cb15dff4 RK |
684 | void kirkwood_restart(char mode, const char *cmd) |
685 | { | |
686 | /* | |
687 | * Enable soft reset to assert RSTOUTn. | |
688 | */ | |
689 | writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); | |
690 | ||
691 | /* | |
692 | * Assert soft reset. | |
693 | */ | |
694 | writel(SOFT_RESET, SYSTEM_SOFT_RESET); | |
695 | ||
696 | while (1) | |
697 | ; | |
698 | } |