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e50b6bef RK |
1 | /* |
2 | * arch/arm/mach-kirkwood/cpuidle.c | |
3 | * | |
4 | * CPU idle Marvell Kirkwood SoCs | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | * | |
10 | * The cpu idle uses wait-for-interrupt and DDR self refresh in order | |
11 | * to implement two idle states - | |
12 | * #1 wait-for-interrupt | |
13 | * #2 wait-for-interrupt and DDR self refresh | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/cpuidle.h> | |
20 | #include <linux/io.h> | |
dc28094b | 21 | #include <linux/export.h> |
e50b6bef RK |
22 | #include <asm/proc-fns.h> |
23 | #include <mach/kirkwood.h> | |
24 | ||
25 | #define KIRKWOOD_MAX_STATES 2 | |
26 | ||
27 | static struct cpuidle_driver kirkwood_idle_driver = { | |
28 | .name = "kirkwood_idle", | |
29 | .owner = THIS_MODULE, | |
30 | }; | |
31 | ||
32 | static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device); | |
33 | ||
34 | /* Actual code that puts the SoC in different idle states */ | |
35 | static int kirkwood_enter_idle(struct cpuidle_device *dev, | |
46bcfad7 | 36 | struct cpuidle_driver *drv, |
e978aa7d | 37 | int index) |
e50b6bef RK |
38 | { |
39 | struct timeval before, after; | |
40 | int idle_time; | |
41 | ||
42 | local_irq_disable(); | |
43 | do_gettimeofday(&before); | |
e978aa7d | 44 | if (index == 0) |
e50b6bef RK |
45 | /* Wait for interrupt state */ |
46 | cpu_do_idle(); | |
e978aa7d | 47 | else if (index == 1) { |
e50b6bef RK |
48 | /* |
49 | * Following write will put DDR in self refresh. | |
50 | * Note that we have 256 cycles before DDR puts it | |
51 | * self in self-refresh, so the wait-for-interrupt | |
52 | * call afterwards won't get the DDR from self refresh | |
53 | * mode. | |
54 | */ | |
55 | writel(0x7, DDR_OPERATION_BASE); | |
56 | cpu_do_idle(); | |
57 | } | |
58 | do_gettimeofday(&after); | |
59 | local_irq_enable(); | |
60 | idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + | |
61 | (after.tv_usec - before.tv_usec); | |
e978aa7d DD |
62 | |
63 | /* Update last residency */ | |
64 | dev->last_residency = idle_time; | |
65 | ||
66 | return index; | |
e50b6bef RK |
67 | } |
68 | ||
69 | /* Initialize CPU idle by registering the idle states */ | |
70 | static int kirkwood_init_cpuidle(void) | |
71 | { | |
72 | struct cpuidle_device *device; | |
46bcfad7 | 73 | struct cpuidle_driver *driver = &kirkwood_idle_driver; |
e50b6bef RK |
74 | |
75 | device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id()); | |
76 | device->state_count = KIRKWOOD_MAX_STATES; | |
46bcfad7 | 77 | driver->state_count = KIRKWOOD_MAX_STATES; |
e50b6bef RK |
78 | |
79 | /* Wait for interrupt state */ | |
46bcfad7 DD |
80 | driver->states[0].enter = kirkwood_enter_idle; |
81 | driver->states[0].exit_latency = 1; | |
82 | driver->states[0].target_residency = 10000; | |
83 | driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID; | |
84 | strcpy(driver->states[0].name, "WFI"); | |
85 | strcpy(driver->states[0].desc, "Wait for interrupt"); | |
e50b6bef RK |
86 | |
87 | /* Wait for interrupt and DDR self refresh state */ | |
46bcfad7 DD |
88 | driver->states[1].enter = kirkwood_enter_idle; |
89 | driver->states[1].exit_latency = 10; | |
90 | driver->states[1].target_residency = 10000; | |
91 | driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID; | |
92 | strcpy(driver->states[1].name, "DDR SR"); | |
93 | strcpy(driver->states[1].desc, "WFI and DDR Self Refresh"); | |
e50b6bef | 94 | |
46bcfad7 | 95 | cpuidle_register_driver(&kirkwood_idle_driver); |
e50b6bef RK |
96 | if (cpuidle_register_device(device)) { |
97 | printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n"); | |
98 | return -EIO; | |
99 | } | |
100 | return 0; | |
101 | } | |
102 | ||
103 | device_initcall(kirkwood_init_cpuidle); |