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0cda0700 YC |
1 | /* |
2 | * arch/arm/mach-mediatek/platsmp.c | |
3 | * | |
4 | * Copyright (c) 2014 Mediatek Inc. | |
5 | * Author: Shunli Wang <shunli.wang@mediatek.com> | |
6 | * Yingjoe Chen <yingjoe.chen@mediatek.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | */ | |
18 | #include <linux/io.h> | |
19 | #include <linux/memblock.h> | |
20 | #include <linux/of.h> | |
21 | #include <linux/of_address.h> | |
22 | #include <linux/string.h> | |
23 | #include <linux/threads.h> | |
24 | ||
25 | #define MTK_MAX_CPU 8 | |
26 | #define MTK_SMP_REG_SIZE 0x1000 | |
27 | ||
28 | struct mtk_smp_boot_info { | |
29 | unsigned long smp_base; | |
30 | unsigned int jump_reg; | |
31 | unsigned int core_keys[MTK_MAX_CPU - 1]; | |
32 | unsigned int core_regs[MTK_MAX_CPU - 1]; | |
33 | }; | |
34 | ||
35 | static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = { | |
36 | 0x80002000, 0x3fc, | |
37 | { 0x534c4131, 0x4c415332, 0x41534c33 }, | |
38 | { 0x3f8, 0x3f8, 0x3f8 }, | |
39 | }; | |
40 | ||
41 | static const struct mtk_smp_boot_info mtk_mt6589_boot = { | |
42 | 0x10002000, 0x34, | |
43 | { 0x534c4131, 0x4c415332, 0x41534c33 }, | |
44 | { 0x38, 0x3c, 0x40 }, | |
45 | }; | |
46 | ||
fd63892f JC |
47 | static const struct mtk_smp_boot_info mtk_mt7623_boot = { |
48 | 0x10202000, 0x34, | |
49 | { 0x534c4131, 0x4c415332, 0x41534c33 }, | |
50 | { 0x38, 0x3c, 0x40 }, | |
51 | }; | |
52 | ||
0cda0700 YC |
53 | static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = { |
54 | { .compatible = "mediatek,mt8135", .data = &mtk_mt8135_tz_boot }, | |
55 | { .compatible = "mediatek,mt8127", .data = &mtk_mt8135_tz_boot }, | |
5b0fb1ea | 56 | { .compatible = "mediatek,mt2701", .data = &mtk_mt8135_tz_boot }, |
0cda0700 YC |
57 | }; |
58 | ||
59 | static const struct of_device_id mtk_smp_boot_infos[] __initconst = { | |
60 | { .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot }, | |
fd63892f | 61 | { .compatible = "mediatek,mt7623", .data = &mtk_mt7623_boot }, |
0cda0700 YC |
62 | }; |
63 | ||
64 | static void __iomem *mtk_smp_base; | |
65 | static const struct mtk_smp_boot_info *mtk_smp_info; | |
66 | ||
67 | static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle) | |
68 | { | |
69 | if (!mtk_smp_base) | |
70 | return -EINVAL; | |
71 | ||
72 | if (!mtk_smp_info->core_keys[cpu-1]) | |
73 | return -EINVAL; | |
74 | ||
75 | writel_relaxed(mtk_smp_info->core_keys[cpu-1], | |
76 | mtk_smp_base + mtk_smp_info->core_regs[cpu-1]); | |
77 | ||
78 | arch_send_wakeup_ipi_mask(cpumask_of(cpu)); | |
79 | ||
80 | return 0; | |
81 | } | |
82 | ||
83 | static void __init __mtk_smp_prepare_cpus(unsigned int max_cpus, int trustzone) | |
84 | { | |
85 | int i, num; | |
86 | const struct of_device_id *infos; | |
87 | ||
88 | if (trustzone) { | |
89 | num = ARRAY_SIZE(mtk_tz_smp_boot_infos); | |
90 | infos = mtk_tz_smp_boot_infos; | |
91 | } else { | |
92 | num = ARRAY_SIZE(mtk_smp_boot_infos); | |
93 | infos = mtk_smp_boot_infos; | |
94 | } | |
95 | ||
96 | /* Find smp boot info for this SoC */ | |
97 | for (i = 0; i < num; i++) { | |
98 | if (of_machine_is_compatible(infos[i].compatible)) { | |
99 | mtk_smp_info = infos[i].data; | |
100 | break; | |
101 | } | |
102 | } | |
103 | ||
104 | if (!mtk_smp_info) { | |
105 | pr_err("%s: Device is not supported\n", __func__); | |
106 | return; | |
107 | } | |
108 | ||
109 | if (trustzone) { | |
110 | /* smp_base(trustzone-bootinfo) is reserved by device tree */ | |
111 | mtk_smp_base = phys_to_virt(mtk_smp_info->smp_base); | |
112 | } else { | |
113 | mtk_smp_base = ioremap(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE); | |
114 | if (!mtk_smp_base) { | |
115 | pr_err("%s: Can't remap %lx\n", __func__, | |
116 | mtk_smp_info->smp_base); | |
117 | return; | |
118 | } | |
119 | } | |
120 | ||
121 | /* | |
122 | * write the address of slave startup address into the system-wide | |
123 | * jump register | |
124 | */ | |
125 | writel_relaxed(virt_to_phys(secondary_startup_arm), | |
126 | mtk_smp_base + mtk_smp_info->jump_reg); | |
127 | } | |
128 | ||
129 | static void __init mtk_tz_smp_prepare_cpus(unsigned int max_cpus) | |
130 | { | |
131 | __mtk_smp_prepare_cpus(max_cpus, 1); | |
132 | } | |
133 | ||
134 | static void __init mtk_smp_prepare_cpus(unsigned int max_cpus) | |
135 | { | |
136 | __mtk_smp_prepare_cpus(max_cpus, 0); | |
137 | } | |
138 | ||
75305275 | 139 | static const struct smp_operations mt81xx_tz_smp_ops __initconst = { |
0cda0700 YC |
140 | .smp_prepare_cpus = mtk_tz_smp_prepare_cpus, |
141 | .smp_boot_secondary = mtk_boot_secondary, | |
142 | }; | |
143 | CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops); | |
144 | ||
75305275 | 145 | static const struct smp_operations mt6589_smp_ops __initconst = { |
0cda0700 YC |
146 | .smp_prepare_cpus = mtk_smp_prepare_cpus, |
147 | .smp_boot_secondary = mtk_boot_secondary, | |
148 | }; | |
149 | CPU_METHOD_OF_DECLARE(mt6589_smp, "mediatek,mt6589-smp", &mt6589_smp_ops); |