projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 9e73d698 CX |
1 | #include <linux/module.h> |
| 2 | #include <linux/kernel.h> | |
| 3 | #include <linux/init.h> | |
| 4 | #include <linux/list.h> | |
| 5 | #include <linux/io.h> | |
| 6 | #include <linux/clk.h> | |
| 990f2f22 | 7 | #include <linux/clk/mmp.h> |
| 9e73d698 | 8 | |
| b501fd7b | 9 | #include "addr-map.h" |
| 9e73d698 CX |
10 | |
| 11 | #include "common.h" | |
| 12 | #include "clock.h" | |
| 13 | ||
| 14 | /* | |
| 15 | * APB Clock register offsets for PXA910 | |
| 16 | */ | |
| 17 | #define APBC_UART0 APBC_REG(0x000) | |
| 18 | #define APBC_UART1 APBC_REG(0x004) | |
| 19 | #define APBC_GPIO APBC_REG(0x008) | |
| 20 | #define APBC_PWM1 APBC_REG(0x00c) | |
| 21 | #define APBC_PWM2 APBC_REG(0x010) | |
| 22 | #define APBC_PWM3 APBC_REG(0x014) | |
| 23 | #define APBC_PWM4 APBC_REG(0x018) | |
| 24 | #define APBC_SSP1 APBC_REG(0x01c) | |
| 25 | #define APBC_SSP2 APBC_REG(0x020) | |
| 26 | #define APBC_RTC APBC_REG(0x028) | |
| 27 | #define APBC_TWSI0 APBC_REG(0x02c) | |
| 28 | #define APBC_KPC APBC_REG(0x030) | |
| 29 | #define APBC_SSP3 APBC_REG(0x04c) | |
| 30 | #define APBC_TWSI1 APBC_REG(0x06c) | |
| 31 | ||
| 32 | #define APMU_NAND APMU_REG(0x060) | |
| 33 | #define APMU_USB APMU_REG(0x05c) | |
| 34 | ||
| 35 | static APBC_CLK(uart1, UART0, 1, 14745600); | |
| 36 | static APBC_CLK(uart2, UART1, 1, 14745600); | |
| 37 | static APBC_CLK(twsi0, TWSI0, 1, 33000000); | |
| 38 | static APBC_CLK(twsi1, TWSI1, 1, 33000000); | |
| 39 | static APBC_CLK(pwm1, PWM1, 1, 13000000); | |
| 40 | static APBC_CLK(pwm2, PWM2, 1, 13000000); | |
| 41 | static APBC_CLK(pwm3, PWM3, 1, 13000000); | |
| 42 | static APBC_CLK(pwm4, PWM4, 1, 13000000); | |
| 43 | static APBC_CLK(gpio, GPIO, 0, 13000000); | |
| 44 | static APBC_CLK(rtc, RTC, 8, 32768); | |
| 45 | ||
| 46 | static APMU_CLK(nand, NAND, 0x19b, 156000000); | |
| 47 | static APMU_CLK(u2o, USB, 0x1b, 480000000); | |
| 48 | ||
| 49 | /* device and clock bindings */ | |
| 50 | static struct clk_lookup pxa910_clkregs[] = { | |
| 51 | INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), | |
| 52 | INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), | |
| 53 | INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), | |
| 54 | INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), | |
| 55 | INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL), | |
| 56 | INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL), | |
| 57 | INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), | |
| 58 | INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), | |
| 59 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), | |
| 2cab0292 | 60 | INIT_CLKREG(&clk_gpio, "mmp-gpio", NULL), |
| 9e73d698 CX |
61 | INIT_CLKREG(&clk_u2o, NULL, "U2OCLK"), |
| 62 | INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL), | |
| 63 | }; | |
| 64 | ||
| 990f2f22 AB |
65 | void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys, |
| 66 | phys_addr_t apbc_phys, phys_addr_t apbcp_phys) | |
| 9e73d698 CX |
67 | { |
| 68 | clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs)); | |
| 69 | } |