[deliverable/linux.git] / arch / arm / mach-mmp / clock.h

/*
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */

#include <linux/clkdev.h>

struct clkops {
	void			(*enable)(struct clk *);
	void			(*disable)(struct clk *);
	unsigned long		(*getrate)(struct clk *);
	int			(*setrate)(struct clk *, unsigned long);
};

struct clk {
	const struct clkops	*ops;

	void __iomem	*clk_rst;	/* clock reset control register */
	int		fnclksel;	/* functional clock select (APBC) */
	uint32_t	enable_val;	/* value for clock enable (APMU) */
	unsigned long	rate;
	int		enabled;
};

extern struct clkops apbc_clk_ops;
extern struct clkops apmu_clk_ops;

#define APBC_CLK(_name, _reg, _fnclksel, _rate)			\
struct clk clk_##_name = {					\
		.clk_rst	= APBC_##_reg,			\
		.fnclksel	= _fnclksel,			\
		.rate		= _rate,			\
		.ops		= &apbc_clk_ops,		\
}

#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops)	\
struct clk clk_##_name = {					\
		.clk_rst	= APBC_##_reg,			\
		.fnclksel	= _fnclksel,			\
		.rate		= _rate,			\
		.ops		= _ops,				\
}

#define APMU_CLK(_name, _reg, _eval, _rate)			\
struct clk clk_##_name = {					\
		.clk_rst	= APMU_##_reg,			\
		.enable_val	= _eval,			\
		.rate		= _rate,			\
		.ops		= &apmu_clk_ops,		\
}

#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops)		\
struct clk clk_##_name = {					\
		.clk_rst	= APMU_##_reg,			\
		.enable_val	= _eval,			\
		.rate		= _rate,			\
		.ops		= _ops,				\
}

#define INIT_CLKREG(_clk, _devname, _conname)			\
	{							\
		.clk		= _clk,				\
		.dev_id		= _devname,			\
		.con_id		= _conname,			\
	}

extern struct clk clk_pxa168_gpio;
extern struct clk clk_pxa168_timers;
Commit	Line	Data
49cbe786	1	/*
49cbe786 EM	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License version 2 as
	4	* published by the Free Software Foundation.
	5	*/
	6
6d803ba7	7	#include <linux/clkdev.h>
49cbe786 EM	8
	9	struct clkops {
	10	void (enable)(struct clk );
	11	void (disable)(struct clk );
	12	unsigned long (getrate)(struct clk );
52585ccd	13	int (setrate)(struct clk , unsigned long);
49cbe786 EM	14	};
	15
	16	struct clk {
	17	const struct clkops *ops;
	18
	19	void __iomem clk_rst; / clock reset control register */
	20	int fnclksel; /* functional clock select (APBC) */
	21	uint32_t enable_val; /* value for clock enable (APMU) */
	22	unsigned long rate;
	23	int enabled;
	24	};
	25
	26	extern struct clkops apbc_clk_ops;
4092855d	27	extern struct clkops apmu_clk_ops;
49cbe786 EM	28
	29	#define APBC_CLK(_name, _reg, _fnclksel, _rate) \
	30	struct clk clk_##_name = { \
97b09da4	31	.clk_rst = APBC_##_reg, \
49cbe786 EM	32	.fnclksel = _fnclksel, \
	33	.rate = _rate, \
	34	.ops = &apbc_clk_ops, \
	35	}
	36
	37	#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \
	38	struct clk clk_##_name = { \
97b09da4	39	.clk_rst = APBC_##_reg, \
49cbe786 EM	40	.fnclksel = _fnclksel, \
	41	.rate = _rate, \
	42	.ops = _ops, \
	43	}
	44
	45	#define APMU_CLK(_name, _reg, _eval, _rate) \
	46	struct clk clk_##_name = { \
97b09da4	47	.clk_rst = APMU_##_reg, \
49cbe786 EM	48	.enable_val = _eval, \
	49	.rate = _rate, \
	50	.ops = &apmu_clk_ops, \
	51	}
	52
	53	#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \
	54	struct clk clk_##_name = { \
97b09da4	55	.clk_rst = APMU_##_reg, \
49cbe786 EM	56	.enable_val = _eval, \
	57	.rate = _rate, \
	58	.ops = _ops, \
	59	}
	60
	61	#define INIT_CLKREG(_clk, _devname, _conname) \
	62	{ \
	63	.clk = _clk, \
	64	.dev_id = _devname, \
	65	.con_id = _conname, \
	66	}
	67
	68	extern struct clk clk_pxa168_gpio;
	69	extern struct clk clk_pxa168_timers;