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e1cb7db2 HZ |
1 | /* |
2 | * linux/arch/arm/mach-mmp/jasper.c | |
3 | * | |
4 | * Support for the Marvell Jasper Development Platform. | |
5 | * | |
6 | * Copyright (C) 2009-2010 Marvell International Ltd. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * publishhed by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/init.h> | |
14 | #include <linux/kernel.h> | |
b8f649f1 | 15 | #include <linux/gpio-pxa.h> |
e1cb7db2 HZ |
16 | #include <linux/platform_device.h> |
17 | #include <linux/io.h> | |
2503991a HZ |
18 | #include <linux/regulator/machine.h> |
19 | #include <linux/regulator/max8649.h> | |
20 | #include <linux/mfd/max8925.h> | |
0bd86961 | 21 | #include <linux/interrupt.h> |
e1cb7db2 | 22 | |
8661fb92 | 23 | #include <mach/irqs.h> |
e1cb7db2 HZ |
24 | #include <asm/mach-types.h> |
25 | #include <asm/mach/arch.h> | |
26 | #include <mach/addr-map.h> | |
27 | #include <mach/mfp-mmp2.h> | |
28 | #include <mach/mmp2.h> | |
29 | ||
30 | #include "common.h" | |
31 | ||
8661fb92 | 32 | #define JASPER_NR_IRQS (MMP_NR_IRQS + 48) |
0bd86961 | 33 | |
e1cb7db2 HZ |
34 | static unsigned long jasper_pin_config[] __initdata = { |
35 | /* UART1 */ | |
36 | GPIO29_UART1_RXD, | |
37 | GPIO30_UART1_TXD, | |
38 | ||
39 | /* UART3 */ | |
40 | GPIO51_UART3_RXD, | |
41 | GPIO52_UART3_TXD, | |
42 | ||
43 | /* DFI */ | |
44 | GPIO168_DFI_D0, | |
45 | GPIO167_DFI_D1, | |
46 | GPIO166_DFI_D2, | |
47 | GPIO165_DFI_D3, | |
48 | GPIO107_DFI_D4, | |
49 | GPIO106_DFI_D5, | |
50 | GPIO105_DFI_D6, | |
51 | GPIO104_DFI_D7, | |
52 | GPIO111_DFI_D8, | |
53 | GPIO164_DFI_D9, | |
54 | GPIO163_DFI_D10, | |
55 | GPIO162_DFI_D11, | |
56 | GPIO161_DFI_D12, | |
57 | GPIO110_DFI_D13, | |
58 | GPIO109_DFI_D14, | |
59 | GPIO108_DFI_D15, | |
60 | GPIO143_ND_nCS0, | |
61 | GPIO144_ND_nCS1, | |
62 | GPIO147_ND_nWE, | |
63 | GPIO148_ND_nRE, | |
64 | GPIO150_ND_ALE, | |
65 | GPIO149_ND_CLE, | |
66 | GPIO112_ND_RDY0, | |
67 | GPIO160_ND_RDY1, | |
2503991a HZ |
68 | |
69 | /* PMIC */ | |
70 | PMIC_PMIC_INT | MFP_LPM_EDGE_FALL, | |
fe805986 ZG |
71 | |
72 | /* MMC1 */ | |
73 | GPIO131_MMC1_DAT3, | |
74 | GPIO132_MMC1_DAT2, | |
75 | GPIO133_MMC1_DAT1, | |
76 | GPIO134_MMC1_DAT0, | |
77 | GPIO136_MMC1_CMD, | |
78 | GPIO139_MMC1_CLK, | |
79 | GPIO140_MMC1_CD, | |
80 | GPIO141_MMC1_WP, | |
81 | ||
82 | /* MMC2 */ | |
83 | GPIO37_MMC2_DAT3, | |
84 | GPIO38_MMC2_DAT2, | |
85 | GPIO39_MMC2_DAT1, | |
86 | GPIO40_MMC2_DAT0, | |
87 | GPIO41_MMC2_CMD, | |
88 | GPIO42_MMC2_CLK, | |
89 | ||
90 | /* MMC3 */ | |
91 | GPIO165_MMC3_DAT7, | |
92 | GPIO162_MMC3_DAT6, | |
93 | GPIO166_MMC3_DAT5, | |
94 | GPIO163_MMC3_DAT4, | |
95 | GPIO167_MMC3_DAT3, | |
96 | GPIO164_MMC3_DAT2, | |
97 | GPIO168_MMC3_DAT1, | |
98 | GPIO111_MMC3_DAT0, | |
99 | GPIO112_MMC3_CMD, | |
100 | GPIO151_MMC3_CLK, | |
2503991a HZ |
101 | }; |
102 | ||
b8f649f1 HZ |
103 | static struct pxa_gpio_platform_data mmp2_gpio_pdata = { |
104 | .irq_base = MMP_GPIO_TO_IRQ(0), | |
105 | }; | |
106 | ||
2503991a HZ |
107 | static struct regulator_consumer_supply max8649_supply[] = { |
108 | REGULATOR_SUPPLY("vcc_core", NULL), | |
109 | }; | |
110 | ||
111 | static struct regulator_init_data max8649_init_data = { | |
112 | .constraints = { | |
113 | .name = "vcc_core range", | |
114 | .min_uV = 1150000, | |
115 | .max_uV = 1280000, | |
116 | .always_on = 1, | |
117 | .boot_on = 1, | |
118 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | |
119 | }, | |
120 | .num_consumer_supplies = 1, | |
121 | .consumer_supplies = &max8649_supply[0], | |
122 | }; | |
123 | ||
124 | static struct max8649_platform_data jasper_max8649_info = { | |
125 | .mode = 2, /* VID1 = 1, VID0 = 0 */ | |
126 | .extclk = 0, | |
127 | .ramp_timing = MAX8649_RAMP_32MV, | |
128 | .regulator = &max8649_init_data, | |
129 | }; | |
130 | ||
131 | static struct max8925_backlight_pdata jasper_backlight_data = { | |
132 | .dual_string = 0, | |
133 | }; | |
134 | ||
135 | static struct max8925_power_pdata jasper_power_data = { | |
136 | .batt_detect = 0, /* can't detect battery by ID pin */ | |
137 | .topoff_threshold = MAX8925_TOPOFF_THR_10PER, | |
138 | .fast_charge = MAX8925_FCHG_1000MA, | |
139 | }; | |
140 | ||
141 | static struct max8925_platform_data jasper_max8925_info = { | |
142 | .backlight = &jasper_backlight_data, | |
143 | .power = &jasper_power_data, | |
8661fb92 | 144 | .irq_base = MMP_NR_IRQS, |
2503991a HZ |
145 | }; |
146 | ||
147 | static struct i2c_board_info jasper_twsi1_info[] = { | |
148 | [0] = { | |
149 | .type = "max8649", | |
150 | .addr = 0x60, | |
151 | .platform_data = &jasper_max8649_info, | |
152 | }, | |
153 | [1] = { | |
154 | .type = "max8925", | |
155 | .addr = 0x3c, | |
156 | .irq = IRQ_MMP2_PMIC, | |
157 | .platform_data = &jasper_max8925_info, | |
158 | }, | |
e1cb7db2 HZ |
159 | }; |
160 | ||
fe805986 | 161 | static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = { |
6f984f3b | 162 | .clk_delay_cycles = 0x1f, |
fe805986 ZG |
163 | }; |
164 | ||
e1cb7db2 HZ |
165 | static void __init jasper_init(void) |
166 | { | |
167 | mfp_config(ARRAY_AND_SIZE(jasper_pin_config)); | |
168 | ||
169 | /* on-chip devices */ | |
170 | mmp2_add_uart(1); | |
171 | mmp2_add_uart(3); | |
2503991a | 172 | mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info)); |
b8f649f1 HZ |
173 | platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata, |
174 | sizeof(struct pxa_gpio_platform_data)); | |
175 | platform_device_register(&mmp2_device_gpio); | |
fe805986 | 176 | mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */ |
2503991a HZ |
177 | |
178 | regulator_has_full_constraints(); | |
e1cb7db2 HZ |
179 | } |
180 | ||
181 | MACHINE_START(MARVELL_JASPER, "Jasper Development Platform") | |
8022887c | 182 | .map_io = mmp_map_io, |
0bd86961 | 183 | .nr_irqs = JASPER_NR_IRQS, |
e1cb7db2 | 184 | .init_irq = mmp2_init_irq, |
6bb27d73 | 185 | .init_time = mmp2_timer_init, |
e1cb7db2 | 186 | .init_machine = jasper_init, |
9854a38e | 187 | .restart = mmp_restart, |
e1cb7db2 | 188 | MACHINE_END |