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[deliverable/linux.git] / arch / arm / mach-mmp / pxa168.c
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49cbe786
EM
1/*
2 * linux/arch/arm/mach-mmp/pxa168.c
3 *
4 * Code specific to PXA168
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
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10#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/list.h>
e2bb6650 14#include <linux/io.h>
49cbe786 15#include <linux/clk.h>
157d2644 16#include <linux/platform_device.h>
161105bc 17#include <linux/platform_data/mv_usb.h>
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18
19#include <asm/mach/time.h>
9f97da78 20#include <asm/system_misc.h>
49cbe786 21#include <mach/cputype.h>
50d0e244 22#include <mach/addr-map.h>
49cbe786 23#include <mach/regs-apbc.h>
a0f266c1 24#include <mach/regs-apmu.h>
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25#include <mach/irqs.h>
26#include <mach/dma.h>
27#include <mach/devices.h>
a7a89d96 28#include <mach/mfp.h>
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29#include <linux/dma-mapping.h>
30#include <mach/pxa168.h>
161105bc 31#include <mach/regs-usb.h>
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32
33#include "common.h"
34#include "clock.h"
35
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36#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
37
38static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
39{
40 MFP_ADDR_X(GPIO0, GPIO36, 0x04c),
41 MFP_ADDR_X(GPIO37, GPIO55, 0x000),
42 MFP_ADDR_X(GPIO56, GPIO123, 0x0e0),
43 MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
44
45 MFP_ADDR_END,
46};
47
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48void __init pxa168_init_irq(void)
49{
50 icu_init_irq();
51}
52
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53static int __init pxa168_init(void)
54{
55 if (cpu_is_pxa168()) {
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56 mfp_init_base(MFPR_VIRT_BASE);
57 mfp_init_addr(pxa168_mfp_addr_map);
49cbe786 58 pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
50d0e244 59 pxa168_clk_init();
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60 }
61
62 return 0;
63}
64postcore_initcall(pxa168_init);
65
66/* system timer - clock enabled, 3.25MHz */
67#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
50d0e244 68#define APBC_TIMERS APBC_REG(0x34)
49cbe786 69
6bb27d73 70void __init pxa168_timer_init(void)
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71{
72 /* this is early, we have to initialize the CCU registers by
73 * ourselves instead of using clk_* API. Clock rate is defined
74 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
75 */
50d0e244 76 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
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77
78 /* 3.25MHz, bus/functional clock enabled, release reset */
50d0e244 79 __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
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80
81 timer_init(IRQ_PXA168_TIMER1);
82}
83
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84void pxa168_clear_keypad_wakeup(void)
85{
86 uint32_t val;
87 uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
88
89 /* wake event clear is needed in order to clear keypad interrupt */
90 val = __raw_readl(APMU_WAKE_CLR);
91 __raw_writel(val | mask, APMU_WAKE_CLR);
92}
93
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94/* on-chip devices */
95PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
96PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
26407f81 97PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
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98PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
99PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
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100PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
101PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
102PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
103PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
a0f266c1 104PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
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105PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
106PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
107PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
108PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
109PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
58cf68b8 110PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
6d109465 111PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
80def0dc 112PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
3abd7f68 113
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114struct resource pxa168_resource_gpio[] = {
115 {
116 .start = 0xd4019000,
117 .end = 0xd4019fff,
118 .flags = IORESOURCE_MEM,
119 }, {
120 .start = IRQ_PXA168_GPIOX,
121 .end = IRQ_PXA168_GPIOX,
93413c36 122 .name = "gpio_mux",
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123 .flags = IORESOURCE_IRQ,
124 },
125};
126
127struct platform_device pxa168_device_gpio = {
2cab0292 128 .name = "mmp-gpio",
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129 .id = -1,
130 .num_resources = ARRAY_SIZE(pxa168_resource_gpio),
131 .resource = pxa168_resource_gpio,
132};
133
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134struct resource pxa168_usb_host_resources[] = {
135 /* USB Host conroller register base */
136 [0] = {
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137 .start = PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,
138 .end = PXA168_U2H_REGBASE + USB_REG_RANGE,
3abd7f68 139 .flags = IORESOURCE_MEM,
161105bc 140 .name = "capregs",
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141 },
142 /* USB PHY register base */
143 [1] = {
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144 .start = PXA168_U2H_PHYBASE,
145 .end = PXA168_U2H_PHYBASE + USB_PHY_RANGE,
3abd7f68 146 .flags = IORESOURCE_MEM,
161105bc 147 .name = "phyregs",
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148 },
149 [2] = {
150 .start = IRQ_PXA168_USB2,
151 .end = IRQ_PXA168_USB2,
152 .flags = IORESOURCE_IRQ,
153 },
154};
155
156static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
157struct platform_device pxa168_device_usb_host = {
161105bc 158 .name = "pxa-sph",
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159 .id = -1,
160 .dev = {
161 .dma_mask = &pxa168_usb_host_dmamask,
162 .coherent_dma_mask = DMA_BIT_MASK(32),
163 },
164
165 .num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
166 .resource = pxa168_usb_host_resources,
167};
168
161105bc 169int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)
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170{
171 pxa168_device_usb_host.dev.platform_data = pdata;
172 return platform_device_register(&pxa168_device_usb_host);
173}
9854a38e 174
7b6d864b 175void pxa168_restart(enum reboot_mode mode, const char *cmd)
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RK
176{
177 soft_restart(0xffff0000);
178}
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