projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 49cbe786 EM |
1 | /* |
| 2 | * linux/arch/arm/mach-mmp/pxa168.c | |
| 3 | * | |
| 4 | * Code specific to PXA168 | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | */ | |
| 10 | ||
| 11 | #include <linux/module.h> | |
| 12 | #include <linux/kernel.h> | |
| 13 | #include <linux/init.h> | |
| 14 | #include <linux/list.h> | |
| e2bb6650 | 15 | #include <linux/io.h> |
| 49cbe786 EM |
16 | #include <linux/clk.h> |
| 17 | ||
| 18 | #include <asm/mach/time.h> | |
| 19 | #include <mach/addr-map.h> | |
| 20 | #include <mach/cputype.h> | |
| 21 | #include <mach/regs-apbc.h> | |
| 22 | #include <mach/irqs.h> | |
| e2bb6650 | 23 | #include <mach/gpio.h> |
| 49cbe786 EM |
24 | #include <mach/dma.h> |
| 25 | #include <mach/devices.h> | |
| a7a89d96 | 26 | #include <mach/mfp.h> |
| 49cbe786 EM |
27 | |
| 28 | #include "common.h" | |
| 29 | #include "clock.h" | |
| 30 | ||
| a7a89d96 EM |
31 | #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) |
| 32 | ||
| 33 | static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata = | |
| 34 | { | |
| 35 | MFP_ADDR_X(GPIO0, GPIO36, 0x04c), | |
| 36 | MFP_ADDR_X(GPIO37, GPIO55, 0x000), | |
| 37 | MFP_ADDR_X(GPIO56, GPIO123, 0x0e0), | |
| 38 | MFP_ADDR_X(GPIO124, GPIO127, 0x0f4), | |
| 39 | ||
| 40 | MFP_ADDR_END, | |
| 41 | }; | |
| 42 | ||
| e2bb6650 EM |
43 | #define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c) |
| 44 | ||
| 45 | static void __init pxa168_init_gpio(void) | |
| 46 | { | |
| 47 | int i; | |
| 48 | ||
| 49 | /* enable GPIO clock */ | |
| 50 | __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO); | |
| 51 | ||
| 52 | /* unmask GPIO edge detection for all 4 banks - APMASKx */ | |
| 53 | for (i = 0; i < 4; i++) | |
| 54 | __raw_writel(0xffffffff, APMASK(i)); | |
| 55 | ||
| 56 | pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL); | |
| 57 | } | |
| 58 | ||
| 49cbe786 EM |
59 | void __init pxa168_init_irq(void) |
| 60 | { | |
| 61 | icu_init_irq(); | |
| e2bb6650 | 62 | pxa168_init_gpio(); |
| 49cbe786 EM |
63 | } |
| 64 | ||
| 65 | /* APB peripheral clocks */ | |
| 66 | static APBC_CLK(uart1, PXA168_UART1, 1, 14745600); | |
| 67 | static APBC_CLK(uart2, PXA168_UART2, 1, 14745600); | |
| 1a77920e EM |
68 | static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000); |
| 69 | static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000); | |
| 49cbe786 EM |
70 | |
| 71 | /* device and clock bindings */ | |
| 72 | static struct clk_lookup pxa168_clkregs[] = { | |
| 73 | INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), | |
| 74 | INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), | |
| 1a77920e EM |
75 | INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), |
| 76 | INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), | |
| 49cbe786 EM |
77 | }; |
| 78 | ||
| 79 | static int __init pxa168_init(void) | |
| 80 | { | |
| 81 | if (cpu_is_pxa168()) { | |
| a7a89d96 EM |
82 | mfp_init_base(MFPR_VIRT_BASE); |
| 83 | mfp_init_addr(pxa168_mfp_addr_map); | |
| 49cbe786 EM |
84 | pxa_init_dma(IRQ_PXA168_DMA_INT0, 32); |
| 85 | clks_register(ARRAY_AND_SIZE(pxa168_clkregs)); | |
| 86 | } | |
| 87 | ||
| 88 | return 0; | |
| 89 | } | |
| 90 | postcore_initcall(pxa168_init); | |
| 91 | ||
| 92 | /* system timer - clock enabled, 3.25MHz */ | |
| 93 | #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) | |
| 94 | ||
| 95 | static void __init pxa168_timer_init(void) | |
| 96 | { | |
| 97 | /* this is early, we have to initialize the CCU registers by | |
| 98 | * ourselves instead of using clk_* API. Clock rate is defined | |
| 99 | * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running | |
| 100 | */ | |
| 101 | __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA168_TIMERS); | |
| 102 | ||
| 103 | /* 3.25MHz, bus/functional clock enabled, release reset */ | |
| 104 | __raw_writel(TIMER_CLK_RST, APBC_PXA168_TIMERS); | |
| 105 | ||
| 106 | timer_init(IRQ_PXA168_TIMER1); | |
| 107 | } | |
| 108 | ||
| 109 | struct sys_timer pxa168_timer = { | |
| 110 | .init = pxa168_timer_init, | |
| 111 | }; | |
| 112 | ||
| 113 | /* on-chip devices */ | |
| 114 | PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); | |
| 115 | PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); | |
| 1a77920e EM |
116 | PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); |
| 117 | PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); |