projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 49cbe786 EM |
1 | /* |
| 2 | * linux/arch/arm/mach-mmp/pxa168.c | |
| 3 | * | |
| 4 | * Code specific to PXA168 | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | */ | |
| 49cbe786 EM |
10 | #include <linux/module.h> |
| 11 | #include <linux/kernel.h> | |
| 12 | #include <linux/init.h> | |
| 13 | #include <linux/list.h> | |
| e2bb6650 | 14 | #include <linux/io.h> |
| 49cbe786 EM |
15 | #include <linux/clk.h> |
| 16 | ||
| 17 | #include <asm/mach/time.h> | |
| 18 | #include <mach/addr-map.h> | |
| 19 | #include <mach/cputype.h> | |
| 20 | #include <mach/regs-apbc.h> | |
| a0f266c1 | 21 | #include <mach/regs-apmu.h> |
| 49cbe786 | 22 | #include <mach/irqs.h> |
| f55be1bf | 23 | #include <mach/gpio-pxa.h> |
| 49cbe786 EM |
24 | #include <mach/dma.h> |
| 25 | #include <mach/devices.h> | |
| a7a89d96 | 26 | #include <mach/mfp.h> |
| 3abd7f68 TU |
27 | #include <linux/platform_device.h> |
| 28 | #include <linux/dma-mapping.h> | |
| 29 | #include <mach/pxa168.h> | |
| 49cbe786 EM |
30 | |
| 31 | #include "common.h" | |
| 32 | #include "clock.h" | |
| 33 | ||
| a7a89d96 EM |
34 | #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) |
| 35 | ||
| 36 | static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata = | |
| 37 | { | |
| 38 | MFP_ADDR_X(GPIO0, GPIO36, 0x04c), | |
| 39 | MFP_ADDR_X(GPIO37, GPIO55, 0x000), | |
| 40 | MFP_ADDR_X(GPIO56, GPIO123, 0x0e0), | |
| 41 | MFP_ADDR_X(GPIO124, GPIO127, 0x0f4), | |
| 42 | ||
| 43 | MFP_ADDR_END, | |
| 44 | }; | |
| 45 | ||
| e2bb6650 EM |
46 | #define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c) |
| 47 | ||
| 48 | static void __init pxa168_init_gpio(void) | |
| 49 | { | |
| 50 | int i; | |
| 51 | ||
| 52 | /* enable GPIO clock */ | |
| 53 | __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO); | |
| 54 | ||
| 55 | /* unmask GPIO edge detection for all 4 banks - APMASKx */ | |
| 56 | for (i = 0; i < 4; i++) | |
| 57 | __raw_writel(0xffffffff, APMASK(i)); | |
| 58 | ||
| 59 | pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL); | |
| 60 | } | |
| 61 | ||
| 49cbe786 EM |
62 | void __init pxa168_init_irq(void) |
| 63 | { | |
| 64 | icu_init_irq(); | |
| e2bb6650 | 65 | pxa168_init_gpio(); |
| 49cbe786 EM |
66 | } |
| 67 | ||
| 68 | /* APB peripheral clocks */ | |
| 69 | static APBC_CLK(uart1, PXA168_UART1, 1, 14745600); | |
| 70 | static APBC_CLK(uart2, PXA168_UART2, 1, 14745600); | |
| 26407f81 | 71 | static APBC_CLK(uart3, PXA168_UART3, 1, 14745600); |
| 1a77920e EM |
72 | static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000); |
| 73 | static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000); | |
| a27ba768 EM |
74 | static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000); |
| 75 | static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000); | |
| 76 | static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000); | |
| 77 | static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000); | |
| 7e499228 HZ |
78 | static APBC_CLK(ssp1, PXA168_SSP1, 4, 0); |
| 79 | static APBC_CLK(ssp2, PXA168_SSP2, 4, 0); | |
| 80 | static APBC_CLK(ssp3, PXA168_SSP3, 4, 0); | |
| 81 | static APBC_CLK(ssp4, PXA168_SSP4, 4, 0); | |
| 82 | static APBC_CLK(ssp5, PXA168_SSP5, 4, 0); | |
| 6d109465 | 83 | static APBC_CLK(keypad, PXA168_KPC, 0, 32000); |
| 49cbe786 | 84 | |
| 6662498e | 85 | static APMU_CLK(nand, NAND, 0x19b, 156000000); |
| 58cf68b8 | 86 | static APMU_CLK(lcd, LCD, 0x7f, 312000000); |
| 80def0dc | 87 | static APMU_CLK(eth, ETH, 0x09, 0); |
| 3abd7f68 | 88 | static APMU_CLK(usb, USB, 0x12, 0); |
| a0f266c1 | 89 | |
| 49cbe786 EM |
90 | /* device and clock bindings */ |
| 91 | static struct clk_lookup pxa168_clkregs[] = { | |
| 92 | INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), | |
| 93 | INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), | |
| 26407f81 | 94 | INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL), |
| 1a77920e EM |
95 | INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), |
| 96 | INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), | |
| a27ba768 EM |
97 | INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL), |
| 98 | INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL), | |
| 99 | INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL), | |
| 100 | INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL), | |
| 7e499228 HZ |
101 | INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL), |
| 102 | INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL), | |
| 103 | INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL), | |
| 104 | INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL), | |
| 105 | INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL), | |
| a0f266c1 | 106 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), |
| 58cf68b8 | 107 | INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL), |
| 6d109465 | 108 | INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), |
| 80def0dc | 109 | INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"), |
| 3abd7f68 | 110 | INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"), |
| 49cbe786 EM |
111 | }; |
| 112 | ||
| 113 | static int __init pxa168_init(void) | |
| 114 | { | |
| 115 | if (cpu_is_pxa168()) { | |
| a7a89d96 EM |
116 | mfp_init_base(MFPR_VIRT_BASE); |
| 117 | mfp_init_addr(pxa168_mfp_addr_map); | |
| 49cbe786 | 118 | pxa_init_dma(IRQ_PXA168_DMA_INT0, 32); |
| 0a0300dc | 119 | clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs)); |
| 49cbe786 EM |
120 | } |
| 121 | ||
| 122 | return 0; | |
| 123 | } | |
| 124 | postcore_initcall(pxa168_init); | |
| 125 | ||
| 126 | /* system timer - clock enabled, 3.25MHz */ | |
| 127 | #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) | |
| 128 | ||
| 129 | static void __init pxa168_timer_init(void) | |
| 130 | { | |
| 131 | /* this is early, we have to initialize the CCU registers by | |
| 132 | * ourselves instead of using clk_* API. Clock rate is defined | |
| 133 | * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running | |
| 134 | */ | |
| 135 | __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA168_TIMERS); | |
| 136 | ||
| 137 | /* 3.25MHz, bus/functional clock enabled, release reset */ | |
| 138 | __raw_writel(TIMER_CLK_RST, APBC_PXA168_TIMERS); | |
| 139 | ||
| 140 | timer_init(IRQ_PXA168_TIMER1); | |
| 141 | } | |
| 142 | ||
| 143 | struct sys_timer pxa168_timer = { | |
| 144 | .init = pxa168_timer_init, | |
| 145 | }; | |
| 146 | ||
| ab5739a1 MB |
147 | void pxa168_clear_keypad_wakeup(void) |
| 148 | { | |
| 149 | uint32_t val; | |
| 150 | uint32_t mask = APMU_PXA168_KP_WAKE_CLR; | |
| 151 | ||
| 152 | /* wake event clear is needed in order to clear keypad interrupt */ | |
| 153 | val = __raw_readl(APMU_WAKE_CLR); | |
| 154 | __raw_writel(val | mask, APMU_WAKE_CLR); | |
| 155 | } | |
| 156 | ||
| 49cbe786 EM |
157 | /* on-chip devices */ |
| 158 | PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); | |
| 159 | PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); | |
| 26407f81 | 160 | PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24); |
| 1a77920e EM |
161 | PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); |
| 162 | PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); | |
| a27ba768 EM |
163 | PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10); |
| 164 | PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10); | |
| 165 | PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10); | |
| 166 | PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10); | |
| a0f266c1 | 167 | PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); |
| 7e499228 HZ |
168 | PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53); |
| 169 | PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55); | |
| 170 | PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57); | |
| 171 | PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59); | |
| 172 | PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61); | |
| 58cf68b8 | 173 | PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8); |
| 6d109465 | 174 | PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); |
| 80def0dc | 175 | PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff); |
| 3abd7f68 TU |
176 | |
| 177 | struct resource pxa168_usb_host_resources[] = { | |
| 178 | /* USB Host conroller register base */ | |
| 179 | [0] = { | |
| 180 | .start = 0xd4209000, | |
| 181 | .end = 0xd4209000 + 0x200, | |
| 182 | .flags = IORESOURCE_MEM, | |
| 183 | .name = "pxa168-usb-host", | |
| 184 | }, | |
| 185 | /* USB PHY register base */ | |
| 186 | [1] = { | |
| 187 | .start = 0xd4206000, | |
| 188 | .end = 0xd4206000 + 0xff, | |
| 189 | .flags = IORESOURCE_MEM, | |
| 190 | .name = "pxa168-usb-phy", | |
| 191 | }, | |
| 192 | [2] = { | |
| 193 | .start = IRQ_PXA168_USB2, | |
| 194 | .end = IRQ_PXA168_USB2, | |
| 195 | .flags = IORESOURCE_IRQ, | |
| 196 | }, | |
| 197 | }; | |
| 198 | ||
| 199 | static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32); | |
| 200 | struct platform_device pxa168_device_usb_host = { | |
| 201 | .name = "pxa168-ehci", | |
| 202 | .id = -1, | |
| 203 | .dev = { | |
| 204 | .dma_mask = &pxa168_usb_host_dmamask, | |
| 205 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 206 | }, | |
| 207 | ||
| 208 | .num_resources = ARRAY_SIZE(pxa168_usb_host_resources), | |
| 209 | .resource = pxa168_usb_host_resources, | |
| 210 | }; | |
| 211 | ||
| 212 | int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata) | |
| 213 | { | |
| 214 | pxa168_device_usb_host.dev.platform_data = pdata; | |
| 215 | return platform_device_register(&pxa168_device_usb_host); | |
| 216 | } |