Commit | Line | Data |
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56e2d8a6 | 1 | /* Copyright (c) 2010, 2011, Code Aurora Forum. All rights reserved. |
a55df6ed SM |
2 | * |
3 | * This program is free software; you can redistribute it and/or modify | |
4 | * it under the terms of the GNU General Public License version 2 and | |
5 | * only version 2 as published by the Free Software Foundation. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
a55df6ed SM |
11 | */ |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/platform_device.h> | |
15 | #include <linux/io.h> | |
9161d303 | 16 | #include <linux/irq.h> |
56e2d8a6 DB |
17 | #include <linux/irqdomain.h> |
18 | #include <linux/of.h> | |
19 | #include <linux/of_address.h> | |
20 | #include <linux/of_platform.h> | |
9e775ad1 | 21 | #include <linux/memblock.h> |
a55df6ed SM |
22 | |
23 | #include <asm/mach-types.h> | |
24 | #include <asm/mach/arch.h> | |
25 | #include <asm/hardware/gic.h> | |
9e775ad1 | 26 | #include <asm/setup.h> |
a55df6ed SM |
27 | |
28 | #include <mach/board.h> | |
29 | #include <mach/msm_iomap.h> | |
30 | ||
47a6770a SB |
31 | static void __init msm8x60_fixup(struct tag *tag, char **cmdline, |
32 | struct meminfo *mi) | |
9e775ad1 SB |
33 | { |
34 | for (; tag->hdr.size; tag = tag_next(tag)) | |
35 | if (tag->hdr.tag == ATAG_MEM && | |
36 | tag->u.mem.start == 0x40200000) { | |
37 | tag->u.mem.start = 0x40000000; | |
38 | tag->u.mem.size += SZ_2M; | |
39 | } | |
40 | } | |
41 | ||
42 | static void __init msm8x60_reserve(void) | |
43 | { | |
44 | memblock_remove(0x40000000, SZ_2M); | |
45 | } | |
a55df6ed SM |
46 | |
47 | static void __init msm8x60_map_io(void) | |
48 | { | |
49 | msm_map_msm8x60_io(); | |
50 | } | |
51 | ||
52 | static void __init msm8x60_init_irq(void) | |
53 | { | |
ff2e27ae RK |
54 | gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, |
55 | (void *)MSM_QGIC_CPU_BASE); | |
9161d303 SM |
56 | |
57 | /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ | |
58 | writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); | |
59 | ||
60 | /* RUMI does not adhere to GIC spec by enabling STIs by default. | |
61 | * Enable/clear is supposed to be RO for STIs, but is RW on RUMI. | |
62 | */ | |
57bbf1cc SM |
63 | if (!machine_is_msm8x60_sim()) |
64 | writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET); | |
a55df6ed SM |
65 | } |
66 | ||
67 | static void __init msm8x60_init(void) | |
68 | { | |
69 | } | |
70 | ||
56e2d8a6 DB |
71 | #ifdef CONFIG_OF |
72 | static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = { | |
73 | {} | |
74 | }; | |
75 | ||
76 | static struct of_device_id msm_dt_gic_match[] __initdata = { | |
77 | { .compatible = "qcom,msm-8660-qgic", }, | |
78 | {} | |
79 | }; | |
80 | ||
81 | static void __init msm8x60_dt_init(void) | |
82 | { | |
6b783f7c GL |
83 | irq_domain_generate_simple(msm_dt_gic_match, MSM8X60_QGIC_DIST_PHYS, |
84 | GIC_SPI_START); | |
56e2d8a6 DB |
85 | |
86 | if (of_machine_is_compatible("qcom,msm8660-surf")) { | |
87 | printk(KERN_INFO "Init surf UART registers\n"); | |
88 | msm8x60_init_uart12dm(); | |
89 | } | |
90 | ||
91 | of_platform_populate(NULL, of_default_bus_match_table, | |
92 | msm_auxdata_lookup, NULL); | |
93 | } | |
94 | ||
95 | static const char *msm8x60_fluid_match[] __initdata = { | |
96 | "qcom,msm8660-fluid", | |
97 | "qcom,msm8660-surf", | |
98 | NULL | |
99 | }; | |
100 | #endif /* CONFIG_OF */ | |
101 | ||
a55df6ed | 102 | MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") |
9e775ad1 SB |
103 | .fixup = msm8x60_fixup, |
104 | .reserve = msm8x60_reserve, | |
a55df6ed SM |
105 | .map_io = msm8x60_map_io, |
106 | .init_irq = msm8x60_init_irq, | |
041f777c | 107 | .handle_irq = gic_handle_irq, |
a55df6ed SM |
108 | .init_machine = msm8x60_init, |
109 | .timer = &msm_timer, | |
110 | MACHINE_END | |
49b76f71 SM |
111 | |
112 | MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") | |
9e775ad1 SB |
113 | .fixup = msm8x60_fixup, |
114 | .reserve = msm8x60_reserve, | |
49b76f71 SM |
115 | .map_io = msm8x60_map_io, |
116 | .init_irq = msm8x60_init_irq, | |
041f777c | 117 | .handle_irq = gic_handle_irq, |
49b76f71 SM |
118 | .init_machine = msm8x60_init, |
119 | .timer = &msm_timer, | |
120 | MACHINE_END | |
57bbf1cc SM |
121 | |
122 | MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") | |
9e775ad1 SB |
123 | .fixup = msm8x60_fixup, |
124 | .reserve = msm8x60_reserve, | |
57bbf1cc SM |
125 | .map_io = msm8x60_map_io, |
126 | .init_irq = msm8x60_init_irq, | |
041f777c | 127 | .handle_irq = gic_handle_irq, |
57bbf1cc SM |
128 | .init_machine = msm8x60_init, |
129 | .timer = &msm_timer, | |
130 | MACHINE_END | |
69b7f6ff GB |
131 | |
132 | MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA") | |
9e775ad1 SB |
133 | .fixup = msm8x60_fixup, |
134 | .reserve = msm8x60_reserve, | |
69b7f6ff GB |
135 | .map_io = msm8x60_map_io, |
136 | .init_irq = msm8x60_init_irq, | |
041f777c | 137 | .handle_irq = gic_handle_irq, |
69b7f6ff GB |
138 | .init_machine = msm8x60_init, |
139 | .timer = &msm_timer, | |
140 | MACHINE_END | |
56e2d8a6 DB |
141 | |
142 | #ifdef CONFIG_OF | |
143 | /* TODO: General device tree support for all MSM. */ | |
144 | DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)") | |
145 | .map_io = msm8x60_map_io, | |
146 | .init_irq = msm8x60_init_irq, | |
147 | .init_machine = msm8x60_dt_init, | |
148 | .timer = &msm_timer, | |
149 | .dt_compat = msm8x60_fluid_match, | |
150 | MACHINE_END | |
151 | #endif /* CONFIG_OF */ |