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1 | /* Copyright (c) 2010, Code Aurora Forum. All rights reserved. |
2 | * | |
3 | * This program is free software; you can redistribute it and/or modify | |
4 | * it under the terms of the GNU General Public License version 2 and | |
5 | * only version 2 as published by the Free Software Foundation. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
11 | * | |
12 | * You should have received a copy of the GNU General Public License | |
13 | * along with this program; if not, write to the Free Software | |
14 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
15 | * 02110-1301, USA. | |
16 | * | |
17 | */ | |
18 | ||
19 | #include <linux/kernel.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/io.h> | |
9161d303 | 22 | #include <linux/irq.h> |
a55df6ed SM |
23 | |
24 | #include <asm/mach-types.h> | |
25 | #include <asm/mach/arch.h> | |
26 | #include <asm/hardware/gic.h> | |
27 | ||
28 | #include <mach/board.h> | |
29 | #include <mach/msm_iomap.h> | |
30 | ||
31 | void __iomem *gic_cpu_base_addr; | |
32 | ||
33 | unsigned long clk_get_max_axi_khz(void) | |
34 | { | |
35 | return 0; | |
36 | } | |
37 | ||
38 | static void __init msm8x60_map_io(void) | |
39 | { | |
40 | msm_map_msm8x60_io(); | |
41 | } | |
42 | ||
43 | static void __init msm8x60_init_irq(void) | |
44 | { | |
9161d303 SM |
45 | unsigned int i; |
46 | ||
e4fbb68f | 47 | gic_dist_init(0, MSM_QGIC_DIST_BASE, GIC_PPI_START); |
a55df6ed SM |
48 | gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE; |
49 | gic_cpu_init(0, MSM_QGIC_CPU_BASE); | |
9161d303 SM |
50 | |
51 | /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ | |
52 | writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); | |
53 | ||
54 | /* RUMI does not adhere to GIC spec by enabling STIs by default. | |
55 | * Enable/clear is supposed to be RO for STIs, but is RW on RUMI. | |
56 | */ | |
57 | writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET); | |
58 | ||
59 | /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet | |
60 | * as they are configured as level, which does not play nice with | |
61 | * handle_percpu_irq. | |
62 | */ | |
63 | for (i = GIC_PPI_START; i < GIC_SPI_START; i++) { | |
64 | if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE) | |
65 | set_irq_handler(i, handle_percpu_irq); | |
66 | } | |
a55df6ed SM |
67 | } |
68 | ||
69 | static void __init msm8x60_init(void) | |
70 | { | |
71 | } | |
72 | ||
73 | MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") | |
74 | .map_io = msm8x60_map_io, | |
75 | .init_irq = msm8x60_init_irq, | |
76 | .init_machine = msm8x60_init, | |
77 | .timer = &msm_timer, | |
78 | MACHINE_END |