Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
[deliverable/linux.git] / arch / arm / mach-msm / board-qsd8x50.c
CommitLineData
8b4d95fc 1/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
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2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
16 */
2f8163ba 17#include <linux/gpio.h>
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18#include <linux/kernel.h>
19#include <linux/irq.h>
a32d2feb 20#include <linux/platform_device.h>
a32d2feb 21#include <linux/delay.h>
7032d512 22#include <linux/usb/msm_hsusb.h>
8b4d95fc 23#include <linux/err.h>
bd32344a 24#include <linux/clkdev.h>
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25
26#include <asm/mach-types.h>
27#include <asm/mach/arch.h>
28#include <asm/io.h>
29#include <asm/setup.h>
30
a32d2feb 31#include <mach/board.h>
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32#include <mach/irqs.h>
33#include <mach/sirc.h>
8b4d95fc 34#include <mach/vreg.h>
1ef21f63 35#include <linux/platform_data/mmc-msm_sdcc.h>
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36
37#include "devices.h"
4312a7ef 38#include "common.h"
a32d2feb 39
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40static const resource_size_t qsd8x50_surf_smc91x_base __initconst = 0x70000300;
41static const unsigned qsd8x50_surf_smc91x_gpio __initconst = 156;
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42
43/* Leave smc91x resources empty here, as we'll fill them in
44 * at run-time: they vary from board to board, and the true
45 * configuration won't be known until boot.
46 */
7c63dedc 47static struct resource smc91x_resources[] = {
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48 [0] = {
49 .flags = IORESOURCE_MEM,
50 },
51 [1] = {
52 .flags = IORESOURCE_IRQ,
53 },
54};
55
7c63dedc 56static struct platform_device smc91x_device = {
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GB
57 .name = "smc91x",
58 .id = 0,
59 .num_resources = ARRAY_SIZE(smc91x_resources),
60 .resource = smc91x_resources,
61};
62
63static int __init msm_init_smc91x(void)
64{
65 if (machine_is_qsd8x50_surf()) {
66 smc91x_resources[0].start = qsd8x50_surf_smc91x_base;
67 smc91x_resources[0].end = qsd8x50_surf_smc91x_base + 0xff;
68 smc91x_resources[1].start =
69 gpio_to_irq(qsd8x50_surf_smc91x_gpio);
70 smc91x_resources[1].end =
71 gpio_to_irq(qsd8x50_surf_smc91x_gpio);
72 platform_device_register(&smc91x_device);
73 }
74
75 return 0;
76}
77module_init(msm_init_smc91x);
78
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79static int hsusb_phy_init_seq[] = {
80 0x08, 0x31, /* Increase HS Driver Amplitude */
81 0x20, 0x32, /* Enable and set Pre-Emphasis Depth to 10% */
82 -1
83};
84
85static struct msm_otg_platform_data msm_otg_pdata = {
86 .phy_init_seq = hsusb_phy_init_seq,
87 .mode = USB_PERIPHERAL,
88 .otg_control = OTG_PHY_CONTROL,
89};
90
a32d2feb 91static struct platform_device *devices[] __initdata = {
421faca0 92 &msm_clock_8x50,
7bce696b 93 &msm_device_gpio_8x50,
d1c0d43d 94 &msm_device_uart3,
88b52277 95 &msm_device_smd,
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96 &msm_device_otg,
97 &msm_device_hsusb,
98 &msm_device_hsusb_host,
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99};
100
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101static struct msm_mmc_gpio sdc1_gpio_cfg[] = {
102 {51, "sdc1_dat_3"},
103 {52, "sdc1_dat_2"},
104 {53, "sdc1_dat_1"},
105 {54, "sdc1_dat_0"},
106 {55, "sdc1_cmd"},
107 {56, "sdc1_clk"}
108};
109
110static struct vreg *vreg_mmc;
111static unsigned long vreg_sts;
112
113static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
114{
115 int rc = 0;
116 struct platform_device *pdev;
117
118 pdev = container_of(dv, struct platform_device, dev);
119
120 if (vdd == 0) {
121 if (!vreg_sts)
122 return 0;
123
124 clear_bit(pdev->id, &vreg_sts);
125
126 if (!vreg_sts) {
127 rc = vreg_disable(vreg_mmc);
128 if (rc)
129 pr_err("vreg_mmc disable failed for slot "
130 "%d: %d\n", pdev->id, rc);
131 }
132 return 0;
133 }
134
135 if (!vreg_sts) {
136 rc = vreg_set_level(vreg_mmc, 2900);
137 if (rc)
138 pr_err("vreg_mmc set level failed for slot %d: %d\n",
139 pdev->id, rc);
140 rc = vreg_enable(vreg_mmc);
141 if (rc)
142 pr_err("vreg_mmc enable failed for slot %d: %d\n",
143 pdev->id, rc);
144 }
145 set_bit(pdev->id, &vreg_sts);
146 return 0;
147}
148
149static struct msm_mmc_gpio_data sdc1_gpio = {
150 .gpio = sdc1_gpio_cfg,
151 .size = ARRAY_SIZE(sdc1_gpio_cfg),
152};
153
154static struct msm_mmc_platform_data qsd8x50_sdc1_data = {
155 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
156 .translate_vdd = msm_sdcc_setup_power,
157 .gpio_data = &sdc1_gpio,
158};
159
160static void __init qsd8x50_init_mmc(void)
161{
62f0988e 162 vreg_mmc = vreg_get(NULL, "gp5");
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163
164 if (IS_ERR(vreg_mmc)) {
165 pr_err("vreg get for vreg_mmc failed (%ld)\n",
166 PTR_ERR(vreg_mmc));
167 return;
168 }
169
170 msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0);
171}
172
d1c0d43d 173static void __init qsd8x50_map_io(void)
a32d2feb 174{
d1c0d43d 175 msm_map_qsd8x50_io();
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176}
177
d1c0d43d 178static void __init qsd8x50_init_irq(void)
a32d2feb 179{
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180 msm_init_irq();
181 msm_init_sirc();
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182}
183
184static void __init qsd8x50_init(void)
185{
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186 msm_device_otg.dev.platform_data = &msm_otg_pdata;
187 msm_device_hsusb.dev.parent = &msm_device_otg.dev;
188 msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
a32d2feb 189 platform_add_devices(devices, ARRAY_SIZE(devices));
8b4d95fc 190 qsd8x50_init_mmc();
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191}
192
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193static void __init qsd8x50_init_late(void)
194{
195 smd_debugfs_init();
196}
197
a32d2feb 198MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
f631dd41 199 .atag_offset = 0x100,
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200 .map_io = qsd8x50_map_io,
201 .init_irq = qsd8x50_init_irq,
202 .init_machine = qsd8x50_init,
c633c531 203 .init_late = qsd8x50_init_late,
6bb27d73 204 .init_time = qsd8x50_timer_init,
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205MACHINE_END
206
d1c0d43d 207MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
f631dd41 208 .atag_offset = 0x100,
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209 .map_io = qsd8x50_map_io,
210 .init_irq = qsd8x50_init_irq,
211 .init_machine = qsd8x50_init,
c633c531 212 .init_late = qsd8x50_init_late,
6bb27d73 213 .init_time = qsd8x50_timer_init,
a32d2feb 214MACHINE_END
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