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1 | /* arch/arm/mach-msm/smd.c |
2 | * | |
3 | * Copyright (C) 2007 Google, Inc. | |
4 | * Author: Brian Swetland <swetland@google.com> | |
5 | * | |
6 | * This software is licensed under the terms of the GNU General Public | |
7 | * License version 2, as published by the Free Software Foundation, and | |
8 | * may be copied, distributed, and modified under those terms. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | */ | |
16 | ||
9be58f31 DB |
17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
18 | ||
2eb44eb9 BS |
19 | #include <linux/platform_device.h> |
20 | #include <linux/module.h> | |
21 | #include <linux/fs.h> | |
22 | #include <linux/cdev.h> | |
23 | #include <linux/device.h> | |
24 | #include <linux/wait.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/irq.h> | |
27 | #include <linux/list.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/debugfs.h> | |
30 | #include <linux/delay.h> | |
2eb44eb9 BS |
31 | |
32 | #include <mach/msm_smd.h> | |
2eb44eb9 BS |
33 | #include <mach/system.h> |
34 | ||
35 | #include "smd_private.h" | |
36 | #include "proc_comm.h" | |
37 | ||
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38 | #if defined(CONFIG_ARCH_QSD8X50) |
39 | #define CONFIG_QDSP6 1 | |
40 | #endif | |
41 | ||
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42 | void (*msm_hw_reset_hook)(void); |
43 | ||
44 | #define MODULE_NAME "msm_smd" | |
45 | ||
46 | enum { | |
47 | MSM_SMD_DEBUG = 1U << 0, | |
48 | MSM_SMSM_DEBUG = 1U << 0, | |
49 | }; | |
50 | ||
51 | static int msm_smd_debug_mask; | |
52 | ||
03e00cd3 | 53 | struct shared_info { |
5b0f5a3f | 54 | int ready; |
28379410 | 55 | unsigned state; |
5b0f5a3f BS |
56 | }; |
57 | ||
28379410 | 58 | static unsigned dummy_state[SMSM_STATE_COUNT]; |
5b0f5a3f BS |
59 | |
60 | static struct shared_info smd_info = { | |
28379410 | 61 | .state = (unsigned) &dummy_state, |
5b0f5a3f BS |
62 | }; |
63 | ||
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64 | module_param_named(debug_mask, msm_smd_debug_mask, |
65 | int, S_IRUGO | S_IWUSR | S_IWGRP); | |
66 | ||
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67 | static unsigned last_heap_free = 0xffffffff; |
68 | ||
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69 | static inline void notify_other_smsm(void) |
70 | { | |
b42dc44a | 71 | msm_a2m_int(5); |
37521a31 | 72 | #ifdef CONFIG_QDSP6 |
b42dc44a | 73 | msm_a2m_int(8); |
37521a31 | 74 | #endif |
2eb44eb9 BS |
75 | } |
76 | ||
5b0f5a3f | 77 | static inline void notify_modem_smd(void) |
2eb44eb9 | 78 | { |
b42dc44a | 79 | msm_a2m_int(0); |
2eb44eb9 BS |
80 | } |
81 | ||
5b0f5a3f BS |
82 | static inline void notify_dsp_smd(void) |
83 | { | |
b42dc44a | 84 | msm_a2m_int(8); |
5b0f5a3f BS |
85 | } |
86 | ||
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87 | static void smd_diag(void) |
88 | { | |
89 | char *x; | |
90 | ||
91 | x = smem_find(ID_DIAG_ERR_MSG, SZ_DIAG_ERR_MSG); | |
92 | if (x != 0) { | |
93 | x[SZ_DIAG_ERR_MSG - 1] = 0; | |
9be58f31 | 94 | pr_debug("DIAG '%s'\n", x); |
2eb44eb9 BS |
95 | } |
96 | } | |
97 | ||
98 | /* call when SMSM_RESET flag is set in the A9's smsm_state */ | |
99 | static void handle_modem_crash(void) | |
100 | { | |
101 | pr_err("ARM9 has CRASHED\n"); | |
102 | smd_diag(); | |
103 | ||
104 | /* hard reboot if possible */ | |
105 | if (msm_hw_reset_hook) | |
106 | msm_hw_reset_hook(); | |
107 | ||
108 | /* in this case the modem or watchdog should reboot us */ | |
109 | for (;;) | |
110 | ; | |
111 | } | |
112 | ||
28379410 AH |
113 | uint32_t raw_smsm_get_state(enum smsm_state_item item) |
114 | { | |
115 | return readl(smd_info.state + item * 4); | |
116 | } | |
117 | ||
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118 | static int check_for_modem_crash(void) |
119 | { | |
28379410 | 120 | if (raw_smsm_get_state(SMSM_STATE_MODEM) & SMSM_RESET) { |
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121 | handle_modem_crash(); |
122 | return -1; | |
2eb44eb9 | 123 | } |
5b0f5a3f | 124 | return 0; |
2eb44eb9 BS |
125 | } |
126 | ||
2eb44eb9 | 127 | /* the spinlock is used to synchronize between the |
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128 | * irq handler and code that mutates the channel |
129 | * list or fiddles with channel state | |
130 | */ | |
131 | DEFINE_SPINLOCK(smd_lock); | |
132 | DEFINE_SPINLOCK(smem_lock); | |
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133 | |
134 | /* the mutex is used during open() and close() | |
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135 | * operations to avoid races while creating or |
136 | * destroying smd_channel structures | |
137 | */ | |
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138 | static DEFINE_MUTEX(smd_creation_mutex); |
139 | ||
140 | static int smd_initialized; | |
141 | ||
03e00cd3 | 142 | LIST_HEAD(smd_ch_closed_list); |
37521a31 BS |
143 | LIST_HEAD(smd_ch_list_modem); |
144 | LIST_HEAD(smd_ch_list_dsp); | |
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145 | |
146 | static unsigned char smd_ch_allocated[64]; | |
147 | static struct work_struct probe_work; | |
148 | ||
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149 | /* how many bytes are available for reading */ |
150 | static int smd_stream_read_avail(struct smd_channel *ch) | |
151 | { | |
5b0f5a3f | 152 | return (ch->recv->head - ch->recv->tail) & ch->fifo_mask; |
2eb44eb9 BS |
153 | } |
154 | ||
155 | /* how many bytes we are free to write */ | |
156 | static int smd_stream_write_avail(struct smd_channel *ch) | |
157 | { | |
5b0f5a3f BS |
158 | return ch->fifo_mask - |
159 | ((ch->send->head - ch->send->tail) & ch->fifo_mask); | |
2eb44eb9 BS |
160 | } |
161 | ||
162 | static int smd_packet_read_avail(struct smd_channel *ch) | |
163 | { | |
164 | if (ch->current_packet) { | |
165 | int n = smd_stream_read_avail(ch); | |
166 | if (n > ch->current_packet) | |
167 | n = ch->current_packet; | |
168 | return n; | |
169 | } else { | |
170 | return 0; | |
171 | } | |
172 | } | |
173 | ||
174 | static int smd_packet_write_avail(struct smd_channel *ch) | |
175 | { | |
176 | int n = smd_stream_write_avail(ch); | |
177 | return n > SMD_HEADER_SIZE ? n - SMD_HEADER_SIZE : 0; | |
178 | } | |
179 | ||
180 | static int ch_is_open(struct smd_channel *ch) | |
181 | { | |
182 | return (ch->recv->state == SMD_SS_OPENED) && | |
183 | (ch->send->state == SMD_SS_OPENED); | |
184 | } | |
185 | ||
186 | /* provide a pointer and length to readable data in the fifo */ | |
187 | static unsigned ch_read_buffer(struct smd_channel *ch, void **ptr) | |
188 | { | |
189 | unsigned head = ch->recv->head; | |
190 | unsigned tail = ch->recv->tail; | |
5b0f5a3f | 191 | *ptr = (void *) (ch->recv_data + tail); |
2eb44eb9 BS |
192 | |
193 | if (tail <= head) | |
194 | return head - tail; | |
195 | else | |
5b0f5a3f | 196 | return ch->fifo_size - tail; |
2eb44eb9 BS |
197 | } |
198 | ||
199 | /* advance the fifo read pointer after data from ch_read_buffer is consumed */ | |
200 | static void ch_read_done(struct smd_channel *ch, unsigned count) | |
201 | { | |
202 | BUG_ON(count > smd_stream_read_avail(ch)); | |
5b0f5a3f | 203 | ch->recv->tail = (ch->recv->tail + count) & ch->fifo_mask; |
7632fba0 | 204 | ch->send->fTAIL = 1; |
2eb44eb9 BS |
205 | } |
206 | ||
207 | /* basic read interface to ch_read_{buffer,done} used | |
03e00cd3 BS |
208 | * by smd_*_read() and update_packet_state() |
209 | * will read-and-discard if the _data pointer is null | |
210 | */ | |
2eb44eb9 BS |
211 | static int ch_read(struct smd_channel *ch, void *_data, int len) |
212 | { | |
213 | void *ptr; | |
214 | unsigned n; | |
215 | unsigned char *data = _data; | |
216 | int orig_len = len; | |
217 | ||
218 | while (len > 0) { | |
219 | n = ch_read_buffer(ch, &ptr); | |
220 | if (n == 0) | |
221 | break; | |
222 | ||
223 | if (n > len) | |
224 | n = len; | |
225 | if (_data) | |
226 | memcpy(data, ptr, n); | |
227 | ||
228 | data += n; | |
229 | len -= n; | |
230 | ch_read_done(ch, n); | |
231 | } | |
232 | ||
233 | return orig_len - len; | |
234 | } | |
235 | ||
236 | static void update_stream_state(struct smd_channel *ch) | |
237 | { | |
238 | /* streams have no special state requiring updating */ | |
239 | } | |
240 | ||
241 | static void update_packet_state(struct smd_channel *ch) | |
242 | { | |
243 | unsigned hdr[5]; | |
244 | int r; | |
245 | ||
246 | /* can't do anything if we're in the middle of a packet */ | |
247 | if (ch->current_packet != 0) | |
248 | return; | |
249 | ||
250 | /* don't bother unless we can get the full header */ | |
251 | if (smd_stream_read_avail(ch) < SMD_HEADER_SIZE) | |
252 | return; | |
253 | ||
254 | r = ch_read(ch, hdr, SMD_HEADER_SIZE); | |
255 | BUG_ON(r != SMD_HEADER_SIZE); | |
256 | ||
257 | ch->current_packet = hdr[0]; | |
258 | } | |
259 | ||
260 | /* provide a pointer and length to next free space in the fifo */ | |
261 | static unsigned ch_write_buffer(struct smd_channel *ch, void **ptr) | |
262 | { | |
263 | unsigned head = ch->send->head; | |
264 | unsigned tail = ch->send->tail; | |
5b0f5a3f | 265 | *ptr = (void *) (ch->send_data + head); |
2eb44eb9 BS |
266 | |
267 | if (head < tail) { | |
268 | return tail - head - 1; | |
269 | } else { | |
270 | if (tail == 0) | |
5b0f5a3f | 271 | return ch->fifo_size - head - 1; |
2eb44eb9 | 272 | else |
5b0f5a3f | 273 | return ch->fifo_size - head; |
2eb44eb9 BS |
274 | } |
275 | } | |
276 | ||
277 | /* advace the fifo write pointer after freespace | |
278 | * from ch_write_buffer is filled | |
279 | */ | |
280 | static void ch_write_done(struct smd_channel *ch, unsigned count) | |
281 | { | |
282 | BUG_ON(count > smd_stream_write_avail(ch)); | |
5b0f5a3f | 283 | ch->send->head = (ch->send->head + count) & ch->fifo_mask; |
2eb44eb9 BS |
284 | ch->send->fHEAD = 1; |
285 | } | |
286 | ||
5b0f5a3f | 287 | static void ch_set_state(struct smd_channel *ch, unsigned n) |
2eb44eb9 BS |
288 | { |
289 | if (n == SMD_SS_OPENED) { | |
5b0f5a3f BS |
290 | ch->send->fDSR = 1; |
291 | ch->send->fCTS = 1; | |
292 | ch->send->fCD = 1; | |
2eb44eb9 | 293 | } else { |
5b0f5a3f BS |
294 | ch->send->fDSR = 0; |
295 | ch->send->fCTS = 0; | |
296 | ch->send->fCD = 0; | |
2eb44eb9 | 297 | } |
5b0f5a3f BS |
298 | ch->send->state = n; |
299 | ch->send->fSTATE = 1; | |
300 | ch->notify_other_cpu(); | |
2eb44eb9 BS |
301 | } |
302 | ||
303 | static void do_smd_probe(void) | |
304 | { | |
305 | struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE; | |
306 | if (shared->heap_info.free_offset != last_heap_free) { | |
307 | last_heap_free = shared->heap_info.free_offset; | |
308 | schedule_work(&probe_work); | |
309 | } | |
310 | } | |
311 | ||
312 | static void smd_state_change(struct smd_channel *ch, | |
313 | unsigned last, unsigned next) | |
314 | { | |
315 | ch->last_state = next; | |
316 | ||
9be58f31 | 317 | pr_debug("ch %d %d -> %d\n", ch->n, last, next); |
2eb44eb9 BS |
318 | |
319 | switch (next) { | |
320 | case SMD_SS_OPENING: | |
321 | ch->recv->tail = 0; | |
322 | case SMD_SS_OPENED: | |
323 | if (ch->send->state != SMD_SS_OPENED) | |
5b0f5a3f | 324 | ch_set_state(ch, SMD_SS_OPENED); |
2eb44eb9 BS |
325 | ch->notify(ch->priv, SMD_EVENT_OPEN); |
326 | break; | |
327 | case SMD_SS_FLUSHING: | |
328 | case SMD_SS_RESET: | |
329 | /* we should force them to close? */ | |
330 | default: | |
331 | ch->notify(ch->priv, SMD_EVENT_CLOSE); | |
332 | } | |
333 | } | |
334 | ||
5b0f5a3f | 335 | static void handle_smd_irq(struct list_head *list, void (*notify)(void)) |
2eb44eb9 BS |
336 | { |
337 | unsigned long flags; | |
338 | struct smd_channel *ch; | |
339 | int do_notify = 0; | |
340 | unsigned ch_flags; | |
341 | unsigned tmp; | |
342 | ||
343 | spin_lock_irqsave(&smd_lock, flags); | |
5b0f5a3f | 344 | list_for_each_entry(ch, list, ch_list) { |
2eb44eb9 BS |
345 | ch_flags = 0; |
346 | if (ch_is_open(ch)) { | |
347 | if (ch->recv->fHEAD) { | |
348 | ch->recv->fHEAD = 0; | |
349 | ch_flags |= 1; | |
350 | do_notify |= 1; | |
351 | } | |
352 | if (ch->recv->fTAIL) { | |
353 | ch->recv->fTAIL = 0; | |
354 | ch_flags |= 2; | |
355 | do_notify |= 1; | |
356 | } | |
357 | if (ch->recv->fSTATE) { | |
358 | ch->recv->fSTATE = 0; | |
359 | ch_flags |= 4; | |
360 | do_notify |= 1; | |
361 | } | |
362 | } | |
363 | tmp = ch->recv->state; | |
364 | if (tmp != ch->last_state) | |
365 | smd_state_change(ch, ch->last_state, tmp); | |
366 | if (ch_flags) { | |
367 | ch->update_state(ch); | |
368 | ch->notify(ch->priv, SMD_EVENT_DATA); | |
369 | } | |
370 | } | |
371 | if (do_notify) | |
5b0f5a3f | 372 | notify(); |
2eb44eb9 BS |
373 | spin_unlock_irqrestore(&smd_lock, flags); |
374 | do_smd_probe(); | |
5b0f5a3f BS |
375 | } |
376 | ||
37521a31 BS |
377 | static irqreturn_t smd_modem_irq_handler(int irq, void *data) |
378 | { | |
379 | handle_smd_irq(&smd_ch_list_modem, notify_modem_smd); | |
380 | return IRQ_HANDLED; | |
381 | } | |
382 | ||
b13525c2 | 383 | #if defined(CONFIG_QDSP6) |
37521a31 | 384 | static irqreturn_t smd_dsp_irq_handler(int irq, void *data) |
5b0f5a3f | 385 | { |
37521a31 | 386 | handle_smd_irq(&smd_ch_list_dsp, notify_dsp_smd); |
2eb44eb9 BS |
387 | return IRQ_HANDLED; |
388 | } | |
b13525c2 | 389 | #endif |
2eb44eb9 BS |
390 | |
391 | static void smd_fake_irq_handler(unsigned long arg) | |
392 | { | |
37521a31 BS |
393 | handle_smd_irq(&smd_ch_list_modem, notify_modem_smd); |
394 | handle_smd_irq(&smd_ch_list_dsp, notify_dsp_smd); | |
2eb44eb9 BS |
395 | } |
396 | ||
397 | static DECLARE_TASKLET(smd_fake_irq_tasklet, smd_fake_irq_handler, 0); | |
398 | ||
37521a31 BS |
399 | static inline int smd_need_int(struct smd_channel *ch) |
400 | { | |
401 | if (ch_is_open(ch)) { | |
402 | if (ch->recv->fHEAD || ch->recv->fTAIL || ch->recv->fSTATE) | |
403 | return 1; | |
404 | if (ch->recv->state != ch->last_state) | |
405 | return 1; | |
406 | } | |
407 | return 0; | |
408 | } | |
409 | ||
2eb44eb9 BS |
410 | void smd_sleep_exit(void) |
411 | { | |
412 | unsigned long flags; | |
413 | struct smd_channel *ch; | |
2eb44eb9 BS |
414 | int need_int = 0; |
415 | ||
416 | spin_lock_irqsave(&smd_lock, flags); | |
37521a31 BS |
417 | list_for_each_entry(ch, &smd_ch_list_modem, ch_list) { |
418 | if (smd_need_int(ch)) { | |
419 | need_int = 1; | |
420 | break; | |
421 | } | |
422 | } | |
423 | list_for_each_entry(ch, &smd_ch_list_dsp, ch_list) { | |
424 | if (smd_need_int(ch)) { | |
425 | need_int = 1; | |
426 | break; | |
2eb44eb9 BS |
427 | } |
428 | } | |
429 | spin_unlock_irqrestore(&smd_lock, flags); | |
430 | do_smd_probe(); | |
37521a31 | 431 | |
2eb44eb9 BS |
432 | if (need_int) { |
433 | if (msm_smd_debug_mask & MSM_SMD_DEBUG) | |
434 | pr_info("smd_sleep_exit need interrupt\n"); | |
435 | tasklet_schedule(&smd_fake_irq_tasklet); | |
436 | } | |
437 | } | |
438 | ||
439 | ||
440 | void smd_kick(smd_channel_t *ch) | |
441 | { | |
442 | unsigned long flags; | |
443 | unsigned tmp; | |
444 | ||
445 | spin_lock_irqsave(&smd_lock, flags); | |
446 | ch->update_state(ch); | |
447 | tmp = ch->recv->state; | |
448 | if (tmp != ch->last_state) { | |
449 | ch->last_state = tmp; | |
450 | if (tmp == SMD_SS_OPENED) | |
451 | ch->notify(ch->priv, SMD_EVENT_OPEN); | |
452 | else | |
453 | ch->notify(ch->priv, SMD_EVENT_CLOSE); | |
454 | } | |
455 | ch->notify(ch->priv, SMD_EVENT_DATA); | |
5b0f5a3f | 456 | ch->notify_other_cpu(); |
2eb44eb9 BS |
457 | spin_unlock_irqrestore(&smd_lock, flags); |
458 | } | |
459 | ||
5b0f5a3f | 460 | static int smd_is_packet(int chn, unsigned type) |
2eb44eb9 | 461 | { |
5b0f5a3f BS |
462 | type &= SMD_KIND_MASK; |
463 | if (type == SMD_KIND_PACKET) | |
464 | return 1; | |
465 | if (type == SMD_KIND_STREAM) | |
466 | return 0; | |
467 | ||
468 | /* older AMSS reports SMD_KIND_UNKNOWN always */ | |
2eb44eb9 BS |
469 | if ((chn > 4) || (chn == 1)) |
470 | return 1; | |
471 | else | |
472 | return 0; | |
473 | } | |
474 | ||
475 | static int smd_stream_write(smd_channel_t *ch, const void *_data, int len) | |
476 | { | |
477 | void *ptr; | |
478 | const unsigned char *buf = _data; | |
479 | unsigned xfer; | |
480 | int orig_len = len; | |
481 | ||
482 | if (len < 0) | |
483 | return -EINVAL; | |
484 | ||
485 | while ((xfer = ch_write_buffer(ch, &ptr)) != 0) { | |
486 | if (!ch_is_open(ch)) | |
487 | break; | |
488 | if (xfer > len) | |
489 | xfer = len; | |
490 | memcpy(ptr, buf, xfer); | |
491 | ch_write_done(ch, xfer); | |
492 | len -= xfer; | |
493 | buf += xfer; | |
494 | if (len == 0) | |
495 | break; | |
496 | } | |
497 | ||
5b0f5a3f | 498 | ch->notify_other_cpu(); |
2eb44eb9 BS |
499 | |
500 | return orig_len - len; | |
501 | } | |
502 | ||
503 | static int smd_packet_write(smd_channel_t *ch, const void *_data, int len) | |
504 | { | |
505 | unsigned hdr[5]; | |
506 | ||
507 | if (len < 0) | |
508 | return -EINVAL; | |
509 | ||
510 | if (smd_stream_write_avail(ch) < (len + SMD_HEADER_SIZE)) | |
511 | return -ENOMEM; | |
512 | ||
513 | hdr[0] = len; | |
514 | hdr[1] = hdr[2] = hdr[3] = hdr[4] = 0; | |
515 | ||
516 | smd_stream_write(ch, hdr, sizeof(hdr)); | |
517 | smd_stream_write(ch, _data, len); | |
518 | ||
519 | return len; | |
520 | } | |
521 | ||
522 | static int smd_stream_read(smd_channel_t *ch, void *data, int len) | |
523 | { | |
524 | int r; | |
525 | ||
526 | if (len < 0) | |
527 | return -EINVAL; | |
528 | ||
529 | r = ch_read(ch, data, len); | |
530 | if (r > 0) | |
5b0f5a3f | 531 | ch->notify_other_cpu(); |
2eb44eb9 BS |
532 | |
533 | return r; | |
534 | } | |
535 | ||
536 | static int smd_packet_read(smd_channel_t *ch, void *data, int len) | |
537 | { | |
538 | unsigned long flags; | |
539 | int r; | |
540 | ||
541 | if (len < 0) | |
542 | return -EINVAL; | |
543 | ||
544 | if (len > ch->current_packet) | |
545 | len = ch->current_packet; | |
546 | ||
547 | r = ch_read(ch, data, len); | |
548 | if (r > 0) | |
5b0f5a3f | 549 | ch->notify_other_cpu(); |
2eb44eb9 BS |
550 | |
551 | spin_lock_irqsave(&smd_lock, flags); | |
552 | ch->current_packet -= r; | |
553 | update_packet_state(ch); | |
554 | spin_unlock_irqrestore(&smd_lock, flags); | |
555 | ||
556 | return r; | |
557 | } | |
558 | ||
34f719b0 | 559 | static int smd_alloc_channel(const char *name, uint32_t cid, uint32_t type) |
5b0f5a3f BS |
560 | { |
561 | struct smd_channel *ch; | |
2eb44eb9 BS |
562 | |
563 | ch = kzalloc(sizeof(struct smd_channel), GFP_KERNEL); | |
564 | if (ch == 0) { | |
565 | pr_err("smd_alloc_channel() out of memory\n"); | |
34f719b0 | 566 | return -1; |
2eb44eb9 | 567 | } |
2eb44eb9 BS |
568 | ch->n = cid; |
569 | ||
bf83de40 | 570 | if (_smd_alloc_channel(ch)) { |
5b0f5a3f | 571 | kfree(ch); |
34f719b0 | 572 | return -1; |
5b0f5a3f BS |
573 | } |
574 | ||
575 | ch->fifo_mask = ch->fifo_size - 1; | |
576 | ch->type = type; | |
577 | ||
578 | if ((type & SMD_TYPE_MASK) == SMD_TYPE_APPS_MODEM) | |
579 | ch->notify_other_cpu = notify_modem_smd; | |
580 | else | |
581 | ch->notify_other_cpu = notify_dsp_smd; | |
582 | ||
583 | if (smd_is_packet(cid, type)) { | |
2eb44eb9 BS |
584 | ch->read = smd_packet_read; |
585 | ch->write = smd_packet_write; | |
586 | ch->read_avail = smd_packet_read_avail; | |
587 | ch->write_avail = smd_packet_write_avail; | |
588 | ch->update_state = update_packet_state; | |
589 | } else { | |
590 | ch->read = smd_stream_read; | |
591 | ch->write = smd_stream_write; | |
592 | ch->read_avail = smd_stream_read_avail; | |
593 | ch->write_avail = smd_stream_write_avail; | |
594 | ch->update_state = update_stream_state; | |
595 | } | |
596 | ||
5b0f5a3f BS |
597 | if ((type & 0xff) == 0) |
598 | memcpy(ch->name, "SMD_", 4); | |
599 | else | |
600 | memcpy(ch->name, "DSP_", 4); | |
2eb44eb9 BS |
601 | memcpy(ch->name + 4, name, 20); |
602 | ch->name[23] = 0; | |
603 | ch->pdev.name = ch->name; | |
604 | ch->pdev.id = -1; | |
605 | ||
9be58f31 | 606 | pr_debug("smd_alloc_channel() cid=%02d size=%05d '%s'\n", |
5b0f5a3f | 607 | ch->n, ch->fifo_size, ch->name); |
2eb44eb9 BS |
608 | |
609 | mutex_lock(&smd_creation_mutex); | |
610 | list_add(&ch->ch_list, &smd_ch_closed_list); | |
611 | mutex_unlock(&smd_creation_mutex); | |
612 | ||
613 | platform_device_register(&ch->pdev); | |
34f719b0 | 614 | return 0; |
2eb44eb9 BS |
615 | } |
616 | ||
3843ac3a DW |
617 | static void smd_channel_probe_worker(struct work_struct *work) |
618 | { | |
619 | struct smd_alloc_elm *shared; | |
620 | unsigned ctype; | |
621 | unsigned type; | |
622 | unsigned n; | |
623 | ||
624 | shared = smem_find(ID_CH_ALLOC_TBL, sizeof(*shared) * 64); | |
625 | if (!shared) { | |
9be58f31 | 626 | pr_err("cannot find allocation table\n"); |
3843ac3a DW |
627 | return; |
628 | } | |
629 | for (n = 0; n < 64; n++) { | |
630 | if (smd_ch_allocated[n]) | |
631 | continue; | |
632 | if (!shared[n].ref_count) | |
633 | continue; | |
634 | if (!shared[n].name[0]) | |
635 | continue; | |
636 | ctype = shared[n].ctype; | |
637 | type = ctype & SMD_TYPE_MASK; | |
638 | ||
639 | /* DAL channels are stream but neither the modem, | |
640 | * nor the DSP correctly indicate this. Fixup manually. | |
641 | */ | |
642 | if (!memcmp(shared[n].name, "DAL", 3)) | |
643 | ctype = (ctype & (~SMD_KIND_MASK)) | SMD_KIND_STREAM; | |
644 | ||
645 | type = shared[n].ctype & SMD_TYPE_MASK; | |
646 | if ((type == SMD_TYPE_APPS_MODEM) || | |
647 | (type == SMD_TYPE_APPS_DSP)) | |
648 | if (!smd_alloc_channel(shared[n].name, shared[n].cid, ctype)) | |
649 | smd_ch_allocated[n] = 1; | |
650 | } | |
651 | } | |
652 | ||
2eb44eb9 BS |
653 | static void do_nothing_notify(void *priv, unsigned flags) |
654 | { | |
655 | } | |
656 | ||
657 | struct smd_channel *smd_get_channel(const char *name) | |
658 | { | |
659 | struct smd_channel *ch; | |
660 | ||
661 | mutex_lock(&smd_creation_mutex); | |
662 | list_for_each_entry(ch, &smd_ch_closed_list, ch_list) { | |
663 | if (!strcmp(name, ch->name)) { | |
664 | list_del(&ch->ch_list); | |
665 | mutex_unlock(&smd_creation_mutex); | |
666 | return ch; | |
667 | } | |
668 | } | |
669 | mutex_unlock(&smd_creation_mutex); | |
670 | ||
671 | return NULL; | |
672 | } | |
673 | ||
674 | int smd_open(const char *name, smd_channel_t **_ch, | |
675 | void *priv, void (*notify)(void *, unsigned)) | |
676 | { | |
677 | struct smd_channel *ch; | |
678 | unsigned long flags; | |
679 | ||
680 | if (smd_initialized == 0) { | |
681 | pr_info("smd_open() before smd_init()\n"); | |
682 | return -ENODEV; | |
683 | } | |
684 | ||
685 | ch = smd_get_channel(name); | |
686 | if (!ch) | |
687 | return -ENODEV; | |
688 | ||
689 | if (notify == 0) | |
690 | notify = do_nothing_notify; | |
691 | ||
692 | ch->notify = notify; | |
693 | ch->current_packet = 0; | |
694 | ch->last_state = SMD_SS_CLOSED; | |
695 | ch->priv = priv; | |
696 | ||
697 | *_ch = ch; | |
698 | ||
699 | spin_lock_irqsave(&smd_lock, flags); | |
37521a31 BS |
700 | |
701 | if ((ch->type & SMD_TYPE_MASK) == SMD_TYPE_APPS_MODEM) | |
702 | list_add(&ch->ch_list, &smd_ch_list_modem); | |
703 | else | |
704 | list_add(&ch->ch_list, &smd_ch_list_dsp); | |
2eb44eb9 BS |
705 | |
706 | /* If the remote side is CLOSING, we need to get it to | |
707 | * move to OPENING (which we'll do by moving from CLOSED to | |
708 | * OPENING) and then get it to move from OPENING to | |
709 | * OPENED (by doing the same state change ourselves). | |
710 | * | |
711 | * Otherwise, it should be OPENING and we can move directly | |
712 | * to OPENED so that it will follow. | |
713 | */ | |
714 | if (ch->recv->state == SMD_SS_CLOSING) { | |
715 | ch->send->head = 0; | |
5b0f5a3f | 716 | ch_set_state(ch, SMD_SS_OPENING); |
2eb44eb9 | 717 | } else { |
5b0f5a3f | 718 | ch_set_state(ch, SMD_SS_OPENED); |
2eb44eb9 BS |
719 | } |
720 | spin_unlock_irqrestore(&smd_lock, flags); | |
721 | smd_kick(ch); | |
722 | ||
723 | return 0; | |
724 | } | |
725 | ||
726 | int smd_close(smd_channel_t *ch) | |
727 | { | |
728 | unsigned long flags; | |
729 | ||
2eb44eb9 BS |
730 | if (ch == 0) |
731 | return -1; | |
732 | ||
733 | spin_lock_irqsave(&smd_lock, flags); | |
734 | ch->notify = do_nothing_notify; | |
735 | list_del(&ch->ch_list); | |
5b0f5a3f | 736 | ch_set_state(ch, SMD_SS_CLOSED); |
2eb44eb9 BS |
737 | spin_unlock_irqrestore(&smd_lock, flags); |
738 | ||
739 | mutex_lock(&smd_creation_mutex); | |
740 | list_add(&ch->ch_list, &smd_ch_closed_list); | |
741 | mutex_unlock(&smd_creation_mutex); | |
742 | ||
743 | return 0; | |
744 | } | |
745 | ||
746 | int smd_read(smd_channel_t *ch, void *data, int len) | |
747 | { | |
748 | return ch->read(ch, data, len); | |
749 | } | |
750 | ||
751 | int smd_write(smd_channel_t *ch, const void *data, int len) | |
752 | { | |
753 | return ch->write(ch, data, len); | |
754 | } | |
755 | ||
636eb9cb BS |
756 | int smd_write_atomic(smd_channel_t *ch, const void *data, int len) |
757 | { | |
758 | unsigned long flags; | |
759 | int res; | |
760 | spin_lock_irqsave(&smd_lock, flags); | |
761 | res = ch->write(ch, data, len); | |
762 | spin_unlock_irqrestore(&smd_lock, flags); | |
763 | return res; | |
764 | } | |
765 | ||
2eb44eb9 BS |
766 | int smd_read_avail(smd_channel_t *ch) |
767 | { | |
768 | return ch->read_avail(ch); | |
769 | } | |
770 | ||
771 | int smd_write_avail(smd_channel_t *ch) | |
772 | { | |
773 | return ch->write_avail(ch); | |
774 | } | |
775 | ||
776 | int smd_wait_until_readable(smd_channel_t *ch, int bytes) | |
777 | { | |
778 | return -1; | |
779 | } | |
780 | ||
781 | int smd_wait_until_writable(smd_channel_t *ch, int bytes) | |
782 | { | |
783 | return -1; | |
784 | } | |
785 | ||
786 | int smd_cur_packet_size(smd_channel_t *ch) | |
787 | { | |
788 | return ch->current_packet; | |
789 | } | |
790 | ||
791 | ||
792 | /* ------------------------------------------------------------------------- */ | |
793 | ||
794 | void *smem_alloc(unsigned id, unsigned size) | |
795 | { | |
796 | return smem_find(id, size); | |
797 | } | |
798 | ||
03e00cd3 | 799 | void *smem_item(unsigned id, unsigned *size) |
2eb44eb9 BS |
800 | { |
801 | struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE; | |
802 | struct smem_heap_entry *toc = shared->heap_toc; | |
803 | ||
804 | if (id >= SMEM_NUM_ITEMS) | |
805 | return 0; | |
806 | ||
807 | if (toc[id].allocated) { | |
808 | *size = toc[id].size; | |
809 | return (void *) (MSM_SHARED_RAM_BASE + toc[id].offset); | |
5b0f5a3f BS |
810 | } else { |
811 | *size = 0; | |
2eb44eb9 BS |
812 | } |
813 | ||
814 | return 0; | |
815 | } | |
816 | ||
817 | void *smem_find(unsigned id, unsigned size_in) | |
818 | { | |
819 | unsigned size; | |
820 | void *ptr; | |
821 | ||
5b0f5a3f | 822 | ptr = smem_item(id, &size); |
2eb44eb9 BS |
823 | if (!ptr) |
824 | return 0; | |
825 | ||
826 | size_in = ALIGN(size_in, 8); | |
827 | if (size_in != size) { | |
828 | pr_err("smem_find(%d, %d): wrong size %d\n", | |
829 | id, size_in, size); | |
830 | return 0; | |
831 | } | |
832 | ||
833 | return ptr; | |
834 | } | |
835 | ||
836 | static irqreturn_t smsm_irq_handler(int irq, void *data) | |
837 | { | |
838 | unsigned long flags; | |
5b0f5a3f | 839 | unsigned apps, modm; |
2eb44eb9 BS |
840 | |
841 | spin_lock_irqsave(&smem_lock, flags); | |
2eb44eb9 | 842 | |
28379410 AH |
843 | apps = raw_smsm_get_state(SMSM_STATE_APPS); |
844 | modm = raw_smsm_get_state(SMSM_STATE_MODEM); | |
2eb44eb9 | 845 | |
5b0f5a3f BS |
846 | if (msm_smd_debug_mask & MSM_SMSM_DEBUG) |
847 | pr_info("<SM %08x %08x>\n", apps, modm); | |
79848a2a | 848 | if (modm & SMSM_RESET) |
5b0f5a3f | 849 | handle_modem_crash(); |
79848a2a | 850 | |
5b0f5a3f BS |
851 | do_smd_probe(); |
852 | ||
2eb44eb9 BS |
853 | spin_unlock_irqrestore(&smem_lock, flags); |
854 | return IRQ_HANDLED; | |
855 | } | |
856 | ||
28379410 AH |
857 | int smsm_change_state(enum smsm_state_item item, |
858 | uint32_t clear_mask, uint32_t set_mask) | |
2eb44eb9 | 859 | { |
1a86fbc1 | 860 | unsigned long addr = smd_info.state + item * 4; |
2eb44eb9 | 861 | unsigned long flags; |
5b0f5a3f BS |
862 | unsigned state; |
863 | ||
864 | if (!smd_info.ready) | |
865 | return -EIO; | |
2eb44eb9 BS |
866 | |
867 | spin_lock_irqsave(&smem_lock, flags); | |
868 | ||
28379410 | 869 | if (raw_smsm_get_state(SMSM_STATE_MODEM) & SMSM_RESET) |
5b0f5a3f BS |
870 | handle_modem_crash(); |
871 | ||
28379410 AH |
872 | state = (readl(addr) & ~clear_mask) | set_mask; |
873 | writel(state, addr); | |
5b0f5a3f BS |
874 | |
875 | if (msm_smd_debug_mask & MSM_SMSM_DEBUG) | |
28379410 | 876 | pr_info("smsm_change_state %d %x\n", item, state); |
5b0f5a3f | 877 | notify_other_smsm(); |
2eb44eb9 BS |
878 | |
879 | spin_unlock_irqrestore(&smem_lock, flags); | |
880 | ||
2eb44eb9 BS |
881 | return 0; |
882 | } | |
883 | ||
28379410 | 884 | uint32_t smsm_get_state(enum smsm_state_item item) |
2eb44eb9 BS |
885 | { |
886 | unsigned long flags; | |
2eb44eb9 BS |
887 | uint32_t rv; |
888 | ||
889 | spin_lock_irqsave(&smem_lock, flags); | |
890 | ||
28379410 | 891 | rv = readl(smd_info.state + item * 4); |
2eb44eb9 | 892 | |
28379410 | 893 | if (item == SMSM_STATE_MODEM && (rv & SMSM_RESET)) |
2eb44eb9 BS |
894 | handle_modem_crash(); |
895 | ||
896 | spin_unlock_irqrestore(&smem_lock, flags); | |
897 | ||
2eb44eb9 BS |
898 | return rv; |
899 | } | |
900 | ||
ec9d3d14 AH |
901 | #ifdef CONFIG_ARCH_MSM_SCORPION |
902 | ||
2eb44eb9 BS |
903 | int smsm_set_sleep_duration(uint32_t delay) |
904 | { | |
03e00cd3 BS |
905 | struct msm_dem_slave_data *ptr; |
906 | ||
907 | ptr = smem_find(SMEM_APPS_DEM_SLAVE_DATA, sizeof(*ptr)); | |
2eb44eb9 | 908 | if (ptr == NULL) { |
ec9d3d14 | 909 | pr_err("smsm_set_sleep_duration <SM NO APPS_DEM_SLAVE_DATA>\n"); |
2eb44eb9 BS |
910 | return -EIO; |
911 | } | |
912 | if (msm_smd_debug_mask & MSM_SMSM_DEBUG) | |
913 | pr_info("smsm_set_sleep_duration %d -> %d\n", | |
ec9d3d14 AH |
914 | ptr->sleep_time, delay); |
915 | ptr->sleep_time = delay; | |
2eb44eb9 BS |
916 | return 0; |
917 | } | |
918 | ||
ec9d3d14 AH |
919 | #else |
920 | ||
921 | int smsm_set_sleep_duration(uint32_t delay) | |
2eb44eb9 | 922 | { |
ec9d3d14 | 923 | uint32_t *ptr; |
2eb44eb9 | 924 | |
03e00cd3 | 925 | ptr = smem_find(SMEM_SMSM_SLEEP_DELAY, sizeof(*ptr)); |
2eb44eb9 | 926 | if (ptr == NULL) { |
ec9d3d14 | 927 | pr_err("smsm_set_sleep_duration <SM NO SLEEP_DELAY>\n"); |
2eb44eb9 BS |
928 | return -EIO; |
929 | } | |
930 | if (msm_smd_debug_mask & MSM_SMSM_DEBUG) | |
ec9d3d14 AH |
931 | pr_info("smsm_set_sleep_duration %d -> %d\n", |
932 | *ptr, delay); | |
933 | *ptr = delay; | |
2eb44eb9 BS |
934 | return 0; |
935 | } | |
936 | ||
ec9d3d14 AH |
937 | #endif |
938 | ||
2eb44eb9 BS |
939 | int smd_core_init(void) |
940 | { | |
941 | int r; | |
2eb44eb9 | 942 | |
5b0f5a3f BS |
943 | /* wait for essential items to be initialized */ |
944 | for (;;) { | |
945 | unsigned size; | |
946 | void *state; | |
947 | state = smem_item(SMEM_SMSM_SHARED_STATE, &size); | |
28379410 AH |
948 | if (size == SMSM_V1_SIZE || size == SMSM_V2_SIZE) { |
949 | smd_info.state = (unsigned)state; | |
5b0f5a3f BS |
950 | break; |
951 | } | |
952 | } | |
953 | ||
954 | smd_info.ready = 1; | |
955 | ||
37521a31 | 956 | r = request_irq(INT_A9_M2A_0, smd_modem_irq_handler, |
2eb44eb9 BS |
957 | IRQF_TRIGGER_RISING, "smd_dev", 0); |
958 | if (r < 0) | |
959 | return r; | |
960 | r = enable_irq_wake(INT_A9_M2A_0); | |
961 | if (r < 0) | |
962 | pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_0\n"); | |
963 | ||
964 | r = request_irq(INT_A9_M2A_5, smsm_irq_handler, | |
965 | IRQF_TRIGGER_RISING, "smsm_dev", 0); | |
966 | if (r < 0) { | |
967 | free_irq(INT_A9_M2A_0, 0); | |
968 | return r; | |
969 | } | |
970 | r = enable_irq_wake(INT_A9_M2A_5); | |
971 | if (r < 0) | |
972 | pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_5\n"); | |
973 | ||
37521a31 BS |
974 | #if defined(CONFIG_QDSP6) |
975 | r = request_irq(INT_ADSP_A11, smd_dsp_irq_handler, | |
976 | IRQF_TRIGGER_RISING, "smd_dsp", 0); | |
977 | if (r < 0) { | |
978 | free_irq(INT_A9_M2A_0, 0); | |
979 | free_irq(INT_A9_M2A_5, 0); | |
980 | return r; | |
981 | } | |
982 | #endif | |
983 | ||
5b0f5a3f BS |
984 | /* check for any SMD channels that may already exist */ |
985 | do_smd_probe(); | |
986 | ||
987 | /* indicate that we're up and running */ | |
28379410 | 988 | smsm_change_state(SMSM_STATE_APPS, |
ec9d3d14 AH |
989 | ~0, SMSM_INIT | SMSM_SMDINIT | SMSM_RPCINIT | SMSM_RUN); |
990 | #ifdef CONFIG_ARCH_MSM_SCORPION | |
991 | smsm_change_state(SMSM_STATE_APPS_DEM, ~0, 0); | |
992 | #endif | |
2eb44eb9 | 993 | |
2eb44eb9 BS |
994 | return 0; |
995 | } | |
996 | ||
4416e9eb | 997 | static int __devinit msm_smd_probe(struct platform_device *pdev) |
2eb44eb9 | 998 | { |
0aec66d4 DW |
999 | /* |
1000 | * If we haven't waited for the ARM9 to boot up till now, | |
1001 | * then we need to wait here. Otherwise this should just | |
1002 | * return immediately. | |
1003 | */ | |
1004 | proc_comm_boot_wait(); | |
1005 | ||
2eb44eb9 BS |
1006 | INIT_WORK(&probe_work, smd_channel_probe_worker); |
1007 | ||
1008 | if (smd_core_init()) { | |
1009 | pr_err("smd_core_init() failed\n"); | |
1010 | return -1; | |
1011 | } | |
1012 | ||
1013 | do_smd_probe(); | |
1014 | ||
1015 | msm_check_for_modem_crash = check_for_modem_crash; | |
1016 | ||
1207babd IM |
1017 | msm_init_last_radio_log(THIS_MODULE); |
1018 | ||
2eb44eb9 BS |
1019 | smd_initialized = 1; |
1020 | ||
1021 | return 0; | |
1022 | } | |
1023 | ||
1024 | static struct platform_driver msm_smd_driver = { | |
1025 | .probe = msm_smd_probe, | |
1026 | .driver = { | |
1027 | .name = MODULE_NAME, | |
1028 | .owner = THIS_MODULE, | |
1029 | }, | |
1030 | }; | |
1031 | ||
1032 | static int __init msm_smd_init(void) | |
1033 | { | |
1034 | return platform_driver_register(&msm_smd_driver); | |
1035 | } | |
1036 | ||
1037 | module_init(msm_smd_init); | |
1038 | ||
1039 | MODULE_DESCRIPTION("MSM Shared Memory Core"); | |
1040 | MODULE_AUTHOR("Brian Swetland <swetland@google.com>"); | |
1041 | MODULE_LICENSE("GPL"); |