msm: smd: initial support for smd v2
[deliverable/linux.git] / arch / arm / mach-msm / smd.c
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1/* arch/arm/mach-msm/smd.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/platform_device.h>
18#include <linux/module.h>
19#include <linux/fs.h>
20#include <linux/cdev.h>
21#include <linux/device.h>
22#include <linux/wait.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/list.h>
26#include <linux/slab.h>
27#include <linux/debugfs.h>
28#include <linux/delay.h>
29#include <linux/io.h>
30
31#include <mach/msm_smd.h>
32#include <mach/msm_iomap.h>
33#include <mach/system.h>
34
35#include "smd_private.h"
36#include "proc_comm.h"
37
38void (*msm_hw_reset_hook)(void);
39
40#define MODULE_NAME "msm_smd"
41
42enum {
43 MSM_SMD_DEBUG = 1U << 0,
44 MSM_SMSM_DEBUG = 1U << 0,
45};
46
47static int msm_smd_debug_mask;
48
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49struct shared_info
50{
51 int ready;
52 unsigned state_apps;
53 unsigned state_modem;
54};
55
56static unsigned dummy_state_apps;
57static unsigned dummy_state_modem;
58
59static struct shared_info smd_info = {
60 .state_apps = (unsigned) &dummy_state_apps,
61 .state_modem = (unsigned) &dummy_state_modem,
62};
63
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64module_param_named(debug_mask, msm_smd_debug_mask,
65 int, S_IRUGO | S_IWUSR | S_IWGRP);
66
67void *smem_find(unsigned id, unsigned size);
5b0f5a3f 68static void *smem_item(unsigned id, unsigned *size);
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69static void smd_diag(void);
70
71static unsigned last_heap_free = 0xffffffff;
72
73#define MSM_A2M_INT(n) (MSM_CSR_BASE + 0x400 + (n) * 4)
74
75static inline void notify_other_smsm(void)
76{
77 writel(1, MSM_A2M_INT(5));
78}
79
5b0f5a3f 80static inline void notify_modem_smd(void)
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81{
82 writel(1, MSM_A2M_INT(0));
83}
84
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85static inline void notify_dsp_smd(void)
86{
87 writel(1, MSM_A2M_INT(8));
88}
89
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90static void smd_diag(void)
91{
92 char *x;
93
94 x = smem_find(ID_DIAG_ERR_MSG, SZ_DIAG_ERR_MSG);
95 if (x != 0) {
96 x[SZ_DIAG_ERR_MSG - 1] = 0;
97 pr_info("smem: DIAG '%s'\n", x);
98 }
99}
100
101/* call when SMSM_RESET flag is set in the A9's smsm_state */
102static void handle_modem_crash(void)
103{
104 pr_err("ARM9 has CRASHED\n");
105 smd_diag();
106
107 /* hard reboot if possible */
108 if (msm_hw_reset_hook)
109 msm_hw_reset_hook();
110
111 /* in this case the modem or watchdog should reboot us */
112 for (;;)
113 ;
114}
115
116extern int (*msm_check_for_modem_crash)(void);
117
118static int check_for_modem_crash(void)
119{
5b0f5a3f 120 if (readl(smd_info.state_modem) & SMSM_RESET) {
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121 handle_modem_crash();
122 return -1;
2eb44eb9 123 }
5b0f5a3f 124 return 0;
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125}
126
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127#define SMD_SS_CLOSED 0x00000000
128#define SMD_SS_OPENING 0x00000001
129#define SMD_SS_OPENED 0x00000002
130#define SMD_SS_FLUSHING 0x00000003
131#define SMD_SS_CLOSING 0x00000004
132#define SMD_SS_RESET 0x00000005
133#define SMD_SS_RESET_OPENING 0x00000006
2eb44eb9 134
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135#define SMD_BUF_SIZE 8192
136#define SMD_CHANNELS 64
2eb44eb9 137
5b0f5a3f 138#define SMD_HEADER_SIZE 20
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139
140
141/* the spinlock is used to synchronize between the
142** irq handler and code that mutates the channel
143** list or fiddles with channel state
144*/
145static DEFINE_SPINLOCK(smd_lock);
146static DEFINE_SPINLOCK(smem_lock);
147
148/* the mutex is used during open() and close()
149** operations to avoid races while creating or
150** destroying smd_channel structures
151*/
152static DEFINE_MUTEX(smd_creation_mutex);
153
154static int smd_initialized;
155
156struct smd_alloc_elm {
157 char name[20];
158 uint32_t cid;
159 uint32_t ctype;
160 uint32_t ref_count;
161};
162
163struct smd_half_channel {
164 unsigned state;
165 unsigned char fDSR;
166 unsigned char fCTS;
167 unsigned char fCD;
168 unsigned char fRI;
169 unsigned char fHEAD;
170 unsigned char fTAIL;
171 unsigned char fSTATE;
172 unsigned char fUNUSED;
173 unsigned tail;
174 unsigned head;
5b0f5a3f 175} __attribute__((packed));
2eb44eb9 176
5b0f5a3f 177struct smd_shared_v1 {
2eb44eb9 178 struct smd_half_channel ch0;
5b0f5a3f 179 unsigned char data0[SMD_BUF_SIZE];
2eb44eb9 180 struct smd_half_channel ch1;
5b0f5a3f 181 unsigned char data1[SMD_BUF_SIZE];
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182};
183
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184struct smd_shared_v2 {
185 struct smd_half_channel ch0;
186 struct smd_half_channel ch1;
187};
188
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189struct smd_channel {
190 volatile struct smd_half_channel *send;
191 volatile struct smd_half_channel *recv;
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192 unsigned char *send_data;
193 unsigned char *recv_data;
2eb44eb9 194
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195 unsigned fifo_mask;
196 unsigned fifo_size;
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197 unsigned current_packet;
198 unsigned n;
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199
200 struct list_head ch_list;
201
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202 void *priv;
203 void (*notify)(void *priv, unsigned flags);
204
205 int (*read)(smd_channel_t *ch, void *data, int len);
206 int (*write)(smd_channel_t *ch, const void *data, int len);
207 int (*read_avail)(smd_channel_t *ch);
208 int (*write_avail)(smd_channel_t *ch);
209
210 void (*update_state)(smd_channel_t *ch);
211 unsigned last_state;
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212 void (*notify_other_cpu)(void);
213 unsigned type;
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214
215 char name[32];
216 struct platform_device pdev;
217};
218
219static LIST_HEAD(smd_ch_closed_list);
5b0f5a3f 220static LIST_HEAD(smd_ch_list); /* todo: per-target lists */
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221
222static unsigned char smd_ch_allocated[64];
223static struct work_struct probe_work;
224
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225#define SMD_TYPE_MASK 0x0FF
226#define SMD_TYPE_APPS_MODEM 0x000
227#define SMD_TYPE_APPS_DSP 0x001
228#define SMD_TYPE_MODEM_DSP 0x002
229
230#define SMD_KIND_MASK 0xF00
231#define SMD_KIND_UNKNOWN 0x000
232#define SMD_KIND_STREAM 0x100
233#define SMD_KIND_PACKET 0x200
234
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235static void smd_alloc_channel(const char *name, uint32_t cid, uint32_t type);
236
237static void smd_channel_probe_worker(struct work_struct *work)
238{
239 struct smd_alloc_elm *shared;
5b0f5a3f 240 unsigned type;
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241 unsigned n;
242
243 shared = smem_find(ID_CH_ALLOC_TBL, sizeof(*shared) * 64);
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244 if (!shared) {
245 pr_err("smd: cannot find allocation table\n");
246 return;
247 }
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248 for (n = 0; n < 64; n++) {
249 if (smd_ch_allocated[n])
250 continue;
251 if (!shared[n].ref_count)
252 continue;
253 if (!shared[n].name[0])
254 continue;
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255 type = shared[n].ctype & SMD_TYPE_MASK;
256 if ((type == SMD_TYPE_APPS_MODEM) ||
257 (type == SMD_TYPE_APPS_DSP))
258 smd_alloc_channel(shared[n].name,
259 shared[n].cid,
260 shared[n].ctype);
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261 smd_ch_allocated[n] = 1;
262 }
263}
264
265static char *chstate(unsigned n)
266{
267 switch (n) {
268 case SMD_SS_CLOSED:
269 return "CLOSED";
270 case SMD_SS_OPENING:
271 return "OPENING";
272 case SMD_SS_OPENED:
273 return "OPENED";
274 case SMD_SS_FLUSHING:
275 return "FLUSHING";
276 case SMD_SS_CLOSING:
277 return "CLOSING";
278 case SMD_SS_RESET:
279 return "RESET";
280 case SMD_SS_RESET_OPENING:
281 return "ROPENING";
282 default:
283 return "UNKNOWN";
284 }
285}
286
287/* how many bytes are available for reading */
288static int smd_stream_read_avail(struct smd_channel *ch)
289{
5b0f5a3f 290 return (ch->recv->head - ch->recv->tail) & ch->fifo_mask;
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291}
292
293/* how many bytes we are free to write */
294static int smd_stream_write_avail(struct smd_channel *ch)
295{
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296 return ch->fifo_mask -
297 ((ch->send->head - ch->send->tail) & ch->fifo_mask);
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298}
299
300static int smd_packet_read_avail(struct smd_channel *ch)
301{
302 if (ch->current_packet) {
303 int n = smd_stream_read_avail(ch);
304 if (n > ch->current_packet)
305 n = ch->current_packet;
306 return n;
307 } else {
308 return 0;
309 }
310}
311
312static int smd_packet_write_avail(struct smd_channel *ch)
313{
314 int n = smd_stream_write_avail(ch);
315 return n > SMD_HEADER_SIZE ? n - SMD_HEADER_SIZE : 0;
316}
317
318static int ch_is_open(struct smd_channel *ch)
319{
320 return (ch->recv->state == SMD_SS_OPENED) &&
321 (ch->send->state == SMD_SS_OPENED);
322}
323
324/* provide a pointer and length to readable data in the fifo */
325static unsigned ch_read_buffer(struct smd_channel *ch, void **ptr)
326{
327 unsigned head = ch->recv->head;
328 unsigned tail = ch->recv->tail;
5b0f5a3f 329 *ptr = (void *) (ch->recv_data + tail);
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330
331 if (tail <= head)
332 return head - tail;
333 else
5b0f5a3f 334 return ch->fifo_size - tail;
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335}
336
337/* advance the fifo read pointer after data from ch_read_buffer is consumed */
338static void ch_read_done(struct smd_channel *ch, unsigned count)
339{
340 BUG_ON(count > smd_stream_read_avail(ch));
5b0f5a3f 341 ch->recv->tail = (ch->recv->tail + count) & ch->fifo_mask;
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342 ch->recv->fTAIL = 1;
343}
344
345/* basic read interface to ch_read_{buffer,done} used
346** by smd_*_read() and update_packet_state()
347** will read-and-discard if the _data pointer is null
348*/
349static int ch_read(struct smd_channel *ch, void *_data, int len)
350{
351 void *ptr;
352 unsigned n;
353 unsigned char *data = _data;
354 int orig_len = len;
355
356 while (len > 0) {
357 n = ch_read_buffer(ch, &ptr);
358 if (n == 0)
359 break;
360
361 if (n > len)
362 n = len;
363 if (_data)
364 memcpy(data, ptr, n);
365
366 data += n;
367 len -= n;
368 ch_read_done(ch, n);
369 }
370
371 return orig_len - len;
372}
373
374static void update_stream_state(struct smd_channel *ch)
375{
376 /* streams have no special state requiring updating */
377}
378
379static void update_packet_state(struct smd_channel *ch)
380{
381 unsigned hdr[5];
382 int r;
383
384 /* can't do anything if we're in the middle of a packet */
385 if (ch->current_packet != 0)
386 return;
387
388 /* don't bother unless we can get the full header */
389 if (smd_stream_read_avail(ch) < SMD_HEADER_SIZE)
390 return;
391
392 r = ch_read(ch, hdr, SMD_HEADER_SIZE);
393 BUG_ON(r != SMD_HEADER_SIZE);
394
395 ch->current_packet = hdr[0];
396}
397
398/* provide a pointer and length to next free space in the fifo */
399static unsigned ch_write_buffer(struct smd_channel *ch, void **ptr)
400{
401 unsigned head = ch->send->head;
402 unsigned tail = ch->send->tail;
5b0f5a3f 403 *ptr = (void *) (ch->send_data + head);
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404
405 if (head < tail) {
406 return tail - head - 1;
407 } else {
408 if (tail == 0)
5b0f5a3f 409 return ch->fifo_size - head - 1;
2eb44eb9 410 else
5b0f5a3f 411 return ch->fifo_size - head;
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412 }
413}
414
415/* advace the fifo write pointer after freespace
416 * from ch_write_buffer is filled
417 */
418static void ch_write_done(struct smd_channel *ch, unsigned count)
419{
420 BUG_ON(count > smd_stream_write_avail(ch));
5b0f5a3f 421 ch->send->head = (ch->send->head + count) & ch->fifo_mask;
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422 ch->send->fHEAD = 1;
423}
424
5b0f5a3f 425static void ch_set_state(struct smd_channel *ch, unsigned n)
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426{
427 if (n == SMD_SS_OPENED) {
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428 ch->send->fDSR = 1;
429 ch->send->fCTS = 1;
430 ch->send->fCD = 1;
2eb44eb9 431 } else {
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432 ch->send->fDSR = 0;
433 ch->send->fCTS = 0;
434 ch->send->fCD = 0;
2eb44eb9 435 }
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436 ch->send->state = n;
437 ch->send->fSTATE = 1;
438 ch->notify_other_cpu();
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439}
440
441static void do_smd_probe(void)
442{
443 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
444 if (shared->heap_info.free_offset != last_heap_free) {
445 last_heap_free = shared->heap_info.free_offset;
446 schedule_work(&probe_work);
447 }
448}
449
450static void smd_state_change(struct smd_channel *ch,
451 unsigned last, unsigned next)
452{
453 ch->last_state = next;
454
455 pr_info("SMD: ch %d %s -> %s\n", ch->n,
456 chstate(last), chstate(next));
457
458 switch (next) {
459 case SMD_SS_OPENING:
460 ch->recv->tail = 0;
461 case SMD_SS_OPENED:
462 if (ch->send->state != SMD_SS_OPENED)
5b0f5a3f 463 ch_set_state(ch, SMD_SS_OPENED);
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464 ch->notify(ch->priv, SMD_EVENT_OPEN);
465 break;
466 case SMD_SS_FLUSHING:
467 case SMD_SS_RESET:
468 /* we should force them to close? */
469 default:
470 ch->notify(ch->priv, SMD_EVENT_CLOSE);
471 }
472}
473
5b0f5a3f 474static void handle_smd_irq(struct list_head *list, void (*notify)(void))
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475{
476 unsigned long flags;
477 struct smd_channel *ch;
478 int do_notify = 0;
479 unsigned ch_flags;
480 unsigned tmp;
481
482 spin_lock_irqsave(&smd_lock, flags);
5b0f5a3f 483 list_for_each_entry(ch, list, ch_list) {
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484 ch_flags = 0;
485 if (ch_is_open(ch)) {
486 if (ch->recv->fHEAD) {
487 ch->recv->fHEAD = 0;
488 ch_flags |= 1;
489 do_notify |= 1;
490 }
491 if (ch->recv->fTAIL) {
492 ch->recv->fTAIL = 0;
493 ch_flags |= 2;
494 do_notify |= 1;
495 }
496 if (ch->recv->fSTATE) {
497 ch->recv->fSTATE = 0;
498 ch_flags |= 4;
499 do_notify |= 1;
500 }
501 }
502 tmp = ch->recv->state;
503 if (tmp != ch->last_state)
504 smd_state_change(ch, ch->last_state, tmp);
505 if (ch_flags) {
506 ch->update_state(ch);
507 ch->notify(ch->priv, SMD_EVENT_DATA);
508 }
509 }
510 if (do_notify)
5b0f5a3f 511 notify();
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512 spin_unlock_irqrestore(&smd_lock, flags);
513 do_smd_probe();
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514}
515
516static irqreturn_t smd_irq_handler(int irq, void *data)
517{
518 handle_smd_irq(&smd_ch_list, notify_modem_smd);
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519 return IRQ_HANDLED;
520}
521
522static void smd_fake_irq_handler(unsigned long arg)
523{
524 smd_irq_handler(0, NULL);
525}
526
527static DECLARE_TASKLET(smd_fake_irq_tasklet, smd_fake_irq_handler, 0);
528
529void smd_sleep_exit(void)
530{
531 unsigned long flags;
532 struct smd_channel *ch;
533 unsigned tmp;
534 int need_int = 0;
535
536 spin_lock_irqsave(&smd_lock, flags);
537 list_for_each_entry(ch, &smd_ch_list, ch_list) {
538 if (ch_is_open(ch)) {
539 if (ch->recv->fHEAD) {
540 if (msm_smd_debug_mask & MSM_SMD_DEBUG)
541 pr_info("smd_sleep_exit ch %d fHEAD "
542 "%x %x %x\n",
543 ch->n, ch->recv->fHEAD,
544 ch->recv->head, ch->recv->tail);
545 need_int = 1;
546 break;
547 }
548 if (ch->recv->fTAIL) {
549 if (msm_smd_debug_mask & MSM_SMD_DEBUG)
550 pr_info("smd_sleep_exit ch %d fTAIL "
551 "%x %x %x\n",
552 ch->n, ch->recv->fTAIL,
553 ch->send->head, ch->send->tail);
554 need_int = 1;
555 break;
556 }
557 if (ch->recv->fSTATE) {
558 if (msm_smd_debug_mask & MSM_SMD_DEBUG)
559 pr_info("smd_sleep_exit ch %d fSTATE %x"
560 "\n", ch->n, ch->recv->fSTATE);
561 need_int = 1;
562 break;
563 }
564 tmp = ch->recv->state;
565 if (tmp != ch->last_state) {
566 if (msm_smd_debug_mask & MSM_SMD_DEBUG)
567 pr_info("smd_sleep_exit ch %d "
568 "state %x != %x\n",
569 ch->n, tmp, ch->last_state);
570 need_int = 1;
571 break;
572 }
573 }
574 }
575 spin_unlock_irqrestore(&smd_lock, flags);
576 do_smd_probe();
577 if (need_int) {
578 if (msm_smd_debug_mask & MSM_SMD_DEBUG)
579 pr_info("smd_sleep_exit need interrupt\n");
580 tasklet_schedule(&smd_fake_irq_tasklet);
581 }
582}
583
584
585void smd_kick(smd_channel_t *ch)
586{
587 unsigned long flags;
588 unsigned tmp;
589
590 spin_lock_irqsave(&smd_lock, flags);
591 ch->update_state(ch);
592 tmp = ch->recv->state;
593 if (tmp != ch->last_state) {
594 ch->last_state = tmp;
595 if (tmp == SMD_SS_OPENED)
596 ch->notify(ch->priv, SMD_EVENT_OPEN);
597 else
598 ch->notify(ch->priv, SMD_EVENT_CLOSE);
599 }
600 ch->notify(ch->priv, SMD_EVENT_DATA);
5b0f5a3f 601 ch->notify_other_cpu();
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602 spin_unlock_irqrestore(&smd_lock, flags);
603}
604
5b0f5a3f 605static int smd_is_packet(int chn, unsigned type)
2eb44eb9 606{
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607 type &= SMD_KIND_MASK;
608 if (type == SMD_KIND_PACKET)
609 return 1;
610 if (type == SMD_KIND_STREAM)
611 return 0;
612
613 /* older AMSS reports SMD_KIND_UNKNOWN always */
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614 if ((chn > 4) || (chn == 1))
615 return 1;
616 else
617 return 0;
618}
619
620static int smd_stream_write(smd_channel_t *ch, const void *_data, int len)
621{
622 void *ptr;
623 const unsigned char *buf = _data;
624 unsigned xfer;
625 int orig_len = len;
626
627 if (len < 0)
628 return -EINVAL;
629
630 while ((xfer = ch_write_buffer(ch, &ptr)) != 0) {
631 if (!ch_is_open(ch))
632 break;
633 if (xfer > len)
634 xfer = len;
635 memcpy(ptr, buf, xfer);
636 ch_write_done(ch, xfer);
637 len -= xfer;
638 buf += xfer;
639 if (len == 0)
640 break;
641 }
642
5b0f5a3f 643 ch->notify_other_cpu();
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644
645 return orig_len - len;
646}
647
648static int smd_packet_write(smd_channel_t *ch, const void *_data, int len)
649{
650 unsigned hdr[5];
651
652 if (len < 0)
653 return -EINVAL;
654
655 if (smd_stream_write_avail(ch) < (len + SMD_HEADER_SIZE))
656 return -ENOMEM;
657
658 hdr[0] = len;
659 hdr[1] = hdr[2] = hdr[3] = hdr[4] = 0;
660
661 smd_stream_write(ch, hdr, sizeof(hdr));
662 smd_stream_write(ch, _data, len);
663
664 return len;
665}
666
667static int smd_stream_read(smd_channel_t *ch, void *data, int len)
668{
669 int r;
670
671 if (len < 0)
672 return -EINVAL;
673
674 r = ch_read(ch, data, len);
675 if (r > 0)
5b0f5a3f 676 ch->notify_other_cpu();
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677
678 return r;
679}
680
681static int smd_packet_read(smd_channel_t *ch, void *data, int len)
682{
683 unsigned long flags;
684 int r;
685
686 if (len < 0)
687 return -EINVAL;
688
689 if (len > ch->current_packet)
690 len = ch->current_packet;
691
692 r = ch_read(ch, data, len);
693 if (r > 0)
5b0f5a3f 694 ch->notify_other_cpu();
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695
696 spin_lock_irqsave(&smd_lock, flags);
697 ch->current_packet -= r;
698 update_packet_state(ch);
699 spin_unlock_irqrestore(&smd_lock, flags);
700
701 return r;
702}
703
5b0f5a3f 704static int smd_alloc_v2(struct smd_channel *ch)
2eb44eb9 705{
5b0f5a3f
BS
706 struct smd_shared_v2 *shared2;
707 void *buffer;
708 unsigned buffer_sz;
2eb44eb9 709
5b0f5a3f
BS
710 shared2 = smem_alloc(SMEM_SMD_BASE_ID + ch->n, sizeof(*shared2));
711 buffer = smem_item(SMEM_SMD_FIFO_BASE_ID + ch->n, &buffer_sz);
712
713 if (!buffer)
714 return -1;
715
716 /* buffer must be a power-of-two size */
717 if (buffer_sz & (buffer_sz - 1))
718 return -1;
719
720 buffer_sz /= 2;
721 ch->send = &shared2->ch0;
722 ch->recv = &shared2->ch1;
723 ch->send_data = buffer;
724 ch->recv_data = buffer + buffer_sz;
725 ch->fifo_size = buffer_sz;
726 return 0;
727}
728
729static int smd_alloc_v1(struct smd_channel *ch)
730{
731 struct smd_shared_v1 *shared1;
732 shared1 = smem_alloc(ID_SMD_CHANNELS + ch->n, sizeof(*shared1));
733 if (!shared1) {
734 pr_err("smd_alloc_channel() cid %d does not exist\n", ch->n);
735 return -1;
2eb44eb9 736 }
5b0f5a3f
BS
737 ch->send = &shared1->ch0;
738 ch->recv = &shared1->ch1;
739 ch->send_data = shared1->data0;
740 ch->recv_data = shared1->data1;
741 ch->fifo_size = SMD_BUF_SIZE;
742 return 0;
743}
744
745
746static void smd_alloc_channel(const char *name, uint32_t cid, uint32_t type)
747{
748 struct smd_channel *ch;
2eb44eb9
BS
749
750 ch = kzalloc(sizeof(struct smd_channel), GFP_KERNEL);
751 if (ch == 0) {
752 pr_err("smd_alloc_channel() out of memory\n");
753 return;
754 }
2eb44eb9
BS
755 ch->n = cid;
756
5b0f5a3f
BS
757 if (smd_alloc_v2(ch) && smd_alloc_v1(ch)) {
758 kfree(ch);
759 return;
760 }
761
762 ch->fifo_mask = ch->fifo_size - 1;
763 ch->type = type;
764
765 if ((type & SMD_TYPE_MASK) == SMD_TYPE_APPS_MODEM)
766 ch->notify_other_cpu = notify_modem_smd;
767 else
768 ch->notify_other_cpu = notify_dsp_smd;
769
770 if (smd_is_packet(cid, type)) {
2eb44eb9
BS
771 ch->read = smd_packet_read;
772 ch->write = smd_packet_write;
773 ch->read_avail = smd_packet_read_avail;
774 ch->write_avail = smd_packet_write_avail;
775 ch->update_state = update_packet_state;
776 } else {
777 ch->read = smd_stream_read;
778 ch->write = smd_stream_write;
779 ch->read_avail = smd_stream_read_avail;
780 ch->write_avail = smd_stream_write_avail;
781 ch->update_state = update_stream_state;
782 }
783
5b0f5a3f
BS
784 if ((type & 0xff) == 0)
785 memcpy(ch->name, "SMD_", 4);
786 else
787 memcpy(ch->name, "DSP_", 4);
2eb44eb9
BS
788 memcpy(ch->name + 4, name, 20);
789 ch->name[23] = 0;
790 ch->pdev.name = ch->name;
791 ch->pdev.id = -1;
792
5b0f5a3f
BS
793 pr_info("smd_alloc_channel() cid=%02d size=%05d '%s'\n",
794 ch->n, ch->fifo_size, ch->name);
2eb44eb9
BS
795
796 mutex_lock(&smd_creation_mutex);
797 list_add(&ch->ch_list, &smd_ch_closed_list);
798 mutex_unlock(&smd_creation_mutex);
799
800 platform_device_register(&ch->pdev);
801}
802
803static void do_nothing_notify(void *priv, unsigned flags)
804{
805}
806
807struct smd_channel *smd_get_channel(const char *name)
808{
809 struct smd_channel *ch;
810
811 mutex_lock(&smd_creation_mutex);
812 list_for_each_entry(ch, &smd_ch_closed_list, ch_list) {
813 if (!strcmp(name, ch->name)) {
814 list_del(&ch->ch_list);
815 mutex_unlock(&smd_creation_mutex);
816 return ch;
817 }
818 }
819 mutex_unlock(&smd_creation_mutex);
820
821 return NULL;
822}
823
824int smd_open(const char *name, smd_channel_t **_ch,
825 void *priv, void (*notify)(void *, unsigned))
826{
827 struct smd_channel *ch;
828 unsigned long flags;
829
830 if (smd_initialized == 0) {
831 pr_info("smd_open() before smd_init()\n");
832 return -ENODEV;
833 }
834
835 ch = smd_get_channel(name);
836 if (!ch)
837 return -ENODEV;
838
839 if (notify == 0)
840 notify = do_nothing_notify;
841
842 ch->notify = notify;
843 ch->current_packet = 0;
844 ch->last_state = SMD_SS_CLOSED;
845 ch->priv = priv;
846
847 *_ch = ch;
848
849 spin_lock_irqsave(&smd_lock, flags);
850 list_add(&ch->ch_list, &smd_ch_list);
851
852 /* If the remote side is CLOSING, we need to get it to
853 * move to OPENING (which we'll do by moving from CLOSED to
854 * OPENING) and then get it to move from OPENING to
855 * OPENED (by doing the same state change ourselves).
856 *
857 * Otherwise, it should be OPENING and we can move directly
858 * to OPENED so that it will follow.
859 */
860 if (ch->recv->state == SMD_SS_CLOSING) {
861 ch->send->head = 0;
5b0f5a3f 862 ch_set_state(ch, SMD_SS_OPENING);
2eb44eb9 863 } else {
5b0f5a3f 864 ch_set_state(ch, SMD_SS_OPENED);
2eb44eb9
BS
865 }
866 spin_unlock_irqrestore(&smd_lock, flags);
867 smd_kick(ch);
868
869 return 0;
870}
871
872int smd_close(smd_channel_t *ch)
873{
874 unsigned long flags;
875
876 pr_info("smd_close(%p)\n", ch);
877
878 if (ch == 0)
879 return -1;
880
881 spin_lock_irqsave(&smd_lock, flags);
882 ch->notify = do_nothing_notify;
883 list_del(&ch->ch_list);
5b0f5a3f 884 ch_set_state(ch, SMD_SS_CLOSED);
2eb44eb9
BS
885 spin_unlock_irqrestore(&smd_lock, flags);
886
887 mutex_lock(&smd_creation_mutex);
888 list_add(&ch->ch_list, &smd_ch_closed_list);
889 mutex_unlock(&smd_creation_mutex);
890
891 return 0;
892}
893
894int smd_read(smd_channel_t *ch, void *data, int len)
895{
896 return ch->read(ch, data, len);
897}
898
899int smd_write(smd_channel_t *ch, const void *data, int len)
900{
901 return ch->write(ch, data, len);
902}
903
904int smd_read_avail(smd_channel_t *ch)
905{
906 return ch->read_avail(ch);
907}
908
909int smd_write_avail(smd_channel_t *ch)
910{
911 return ch->write_avail(ch);
912}
913
914int smd_wait_until_readable(smd_channel_t *ch, int bytes)
915{
916 return -1;
917}
918
919int smd_wait_until_writable(smd_channel_t *ch, int bytes)
920{
921 return -1;
922}
923
924int smd_cur_packet_size(smd_channel_t *ch)
925{
926 return ch->current_packet;
927}
928
929
930/* ------------------------------------------------------------------------- */
931
932void *smem_alloc(unsigned id, unsigned size)
933{
934 return smem_find(id, size);
935}
936
5b0f5a3f 937static void *smem_item(unsigned id, unsigned *size)
2eb44eb9
BS
938{
939 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
940 struct smem_heap_entry *toc = shared->heap_toc;
941
942 if (id >= SMEM_NUM_ITEMS)
943 return 0;
944
945 if (toc[id].allocated) {
946 *size = toc[id].size;
947 return (void *) (MSM_SHARED_RAM_BASE + toc[id].offset);
5b0f5a3f
BS
948 } else {
949 *size = 0;
2eb44eb9
BS
950 }
951
952 return 0;
953}
954
955void *smem_find(unsigned id, unsigned size_in)
956{
957 unsigned size;
958 void *ptr;
959
5b0f5a3f 960 ptr = smem_item(id, &size);
2eb44eb9
BS
961 if (!ptr)
962 return 0;
963
964 size_in = ALIGN(size_in, 8);
965 if (size_in != size) {
966 pr_err("smem_find(%d, %d): wrong size %d\n",
967 id, size_in, size);
968 return 0;
969 }
970
971 return ptr;
972}
973
974static irqreturn_t smsm_irq_handler(int irq, void *data)
975{
976 unsigned long flags;
5b0f5a3f 977 unsigned apps, modm;
2eb44eb9
BS
978
979 spin_lock_irqsave(&smem_lock, flags);
2eb44eb9 980
5b0f5a3f
BS
981 apps = readl(smd_info.state_apps);
982 modm = readl(smd_info.state_modem);
2eb44eb9 983
5b0f5a3f
BS
984 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
985 pr_info("<SM %08x %08x>\n", apps, modm);
986 if (modm & SMSM_RESET) {
987 handle_modem_crash();
2eb44eb9 988 }
5b0f5a3f
BS
989 do_smd_probe();
990
2eb44eb9
BS
991 spin_unlock_irqrestore(&smem_lock, flags);
992 return IRQ_HANDLED;
993}
994
995int smsm_change_state(uint32_t clear_mask, uint32_t set_mask)
996{
997 unsigned long flags;
5b0f5a3f
BS
998 unsigned state;
999
1000 if (!smd_info.ready)
1001 return -EIO;
2eb44eb9
BS
1002
1003 spin_lock_irqsave(&smem_lock, flags);
1004
5b0f5a3f
BS
1005 if (readl(smd_info.state_modem) & SMSM_RESET)
1006 handle_modem_crash();
1007
1008 state = (readl(smd_info.state_apps) & ~clear_mask) | set_mask;
1009 writel(state, smd_info.state_apps);
1010
1011 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
1012 pr_info("smsm_change_state %x\n", state);
1013 notify_other_smsm();
2eb44eb9
BS
1014
1015 spin_unlock_irqrestore(&smem_lock, flags);
1016
2eb44eb9
BS
1017 return 0;
1018}
1019
1020uint32_t smsm_get_state(void)
1021{
1022 unsigned long flags;
2eb44eb9
BS
1023 uint32_t rv;
1024
1025 spin_lock_irqsave(&smem_lock, flags);
1026
5b0f5a3f 1027 rv = readl(smd_info.state_modem);
2eb44eb9
BS
1028
1029 if (rv & SMSM_RESET)
1030 handle_modem_crash();
1031
1032 spin_unlock_irqrestore(&smem_lock, flags);
1033
2eb44eb9
BS
1034 return rv;
1035}
1036
1037int smsm_set_sleep_duration(uint32_t delay)
1038{
1039 uint32_t *ptr;
1040
1041 ptr = smem_alloc(SMEM_SMSM_SLEEP_DELAY, sizeof(*ptr));
1042 if (ptr == NULL) {
1043 pr_err("smsm_set_sleep_duration <SM NO SLEEP_DELAY>\n");
1044 return -EIO;
1045 }
1046 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
1047 pr_info("smsm_set_sleep_duration %d -> %d\n",
1048 *ptr, delay);
1049 *ptr = delay;
1050 return 0;
1051}
1052
1053int smsm_set_interrupt_info(struct smsm_interrupt_info *info)
1054{
1055 struct smsm_interrupt_info *ptr;
1056
1057 ptr = smem_alloc(SMEM_SMSM_INT_INFO, sizeof(*ptr));
1058 if (ptr == NULL) {
1059 pr_err("smsm_set_sleep_duration <SM NO INT_INFO>\n");
1060 return -EIO;
1061 }
1062 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
1063 pr_info("smsm_set_interrupt_info %x %x -> %x %x\n",
1064 ptr->aArm_en_mask, ptr->aArm_interrupts_pending,
1065 info->aArm_en_mask, info->aArm_interrupts_pending);
1066 *ptr = *info;
1067 return 0;
1068}
1069
1070#define MAX_NUM_SLEEP_CLIENTS 64
1071#define MAX_SLEEP_NAME_LEN 8
1072
1073#define NUM_GPIO_INT_REGISTERS 6
1074#define GPIO_SMEM_NUM_GROUPS 2
1075#define GPIO_SMEM_MAX_PC_INTERRUPTS 8
1076
1077struct tramp_gpio_save {
1078 unsigned int enable;
1079 unsigned int detect;
1080 unsigned int polarity;
1081};
1082
1083struct tramp_gpio_smem {
1084 uint16_t num_fired[GPIO_SMEM_NUM_GROUPS];
1085 uint16_t fired[GPIO_SMEM_NUM_GROUPS][GPIO_SMEM_MAX_PC_INTERRUPTS];
1086 uint32_t enabled[NUM_GPIO_INT_REGISTERS];
1087 uint32_t detection[NUM_GPIO_INT_REGISTERS];
1088 uint32_t polarity[NUM_GPIO_INT_REGISTERS];
1089};
1090
1091
1092void smsm_print_sleep_info(void)
1093{
1094 unsigned long flags;
1095 uint32_t *ptr;
1096 struct tramp_gpio_smem *gpio;
1097 struct smsm_interrupt_info *int_info;
1098
1099
1100 spin_lock_irqsave(&smem_lock, flags);
1101
1102 ptr = smem_alloc(SMEM_SMSM_SLEEP_DELAY, sizeof(*ptr));
1103 if (ptr)
1104 pr_info("SMEM_SMSM_SLEEP_DELAY: %x\n", *ptr);
1105
1106 ptr = smem_alloc(SMEM_SMSM_LIMIT_SLEEP, sizeof(*ptr));
1107 if (ptr)
1108 pr_info("SMEM_SMSM_LIMIT_SLEEP: %x\n", *ptr);
1109
1110 ptr = smem_alloc(SMEM_SLEEP_POWER_COLLAPSE_DISABLED, sizeof(*ptr));
1111 if (ptr)
1112 pr_info("SMEM_SLEEP_POWER_COLLAPSE_DISABLED: %x\n", *ptr);
1113
1114 int_info = smem_alloc(SMEM_SMSM_INT_INFO, sizeof(*int_info));
1115 if (int_info)
1116 pr_info("SMEM_SMSM_INT_INFO %x %x %x\n",
1117 int_info->aArm_en_mask,
1118 int_info->aArm_interrupts_pending,
1119 int_info->aArm_wakeup_reason);
1120
1121 gpio = smem_alloc(SMEM_GPIO_INT, sizeof(*gpio));
1122 if (gpio) {
1123 int i;
1124 for (i = 0; i < NUM_GPIO_INT_REGISTERS; i++)
1125 pr_info("SMEM_GPIO_INT: %d: e %x d %x p %x\n",
1126 i, gpio->enabled[i], gpio->detection[i],
1127 gpio->polarity[i]);
1128
1129 for (i = 0; i < GPIO_SMEM_NUM_GROUPS; i++)
1130 pr_info("SMEM_GPIO_INT: %d: f %d: %d %d...\n",
1131 i, gpio->num_fired[i], gpio->fired[i][0],
1132 gpio->fired[i][1]);
1133 }
1134
1135 spin_unlock_irqrestore(&smem_lock, flags);
1136}
1137
1138int smd_core_init(void)
1139{
1140 int r;
1141 pr_info("smd_core_init()\n");
1142
5b0f5a3f
BS
1143 /* wait for essential items to be initialized */
1144 for (;;) {
1145 unsigned size;
1146 void *state;
1147 state = smem_item(SMEM_SMSM_SHARED_STATE, &size);
1148 if (size == SMSM_V1_SIZE) {
1149 smd_info.state_apps = state + SMSM_V1_STATE_APPS;
1150 smd_info.state_modem = state + SMSM_V1_STATE_MODEM;
1151 break;
1152 }
1153 if (size == SMSM_V2_SIZE) {
1154 smd_info.state_apps = state + SMSM_V2_STATE_APPS;
1155 smd_info.state_modem = state + SMSM_V2_STATE_MODEM;
1156 break;
1157 }
1158 }
1159
1160 smd_info.ready = 1;
1161
2eb44eb9
BS
1162 r = request_irq(INT_A9_M2A_0, smd_irq_handler,
1163 IRQF_TRIGGER_RISING, "smd_dev", 0);
1164 if (r < 0)
1165 return r;
1166 r = enable_irq_wake(INT_A9_M2A_0);
1167 if (r < 0)
1168 pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_0\n");
1169
1170 r = request_irq(INT_A9_M2A_5, smsm_irq_handler,
1171 IRQF_TRIGGER_RISING, "smsm_dev", 0);
1172 if (r < 0) {
1173 free_irq(INT_A9_M2A_0, 0);
1174 return r;
1175 }
1176 r = enable_irq_wake(INT_A9_M2A_5);
1177 if (r < 0)
1178 pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_5\n");
1179
5b0f5a3f
BS
1180 /* check for any SMD channels that may already exist */
1181 do_smd_probe();
1182
1183 /* indicate that we're up and running */
1184 writel(SMSM_INIT | SMSM_SMDINIT | SMSM_RPCINIT, smd_info.state_apps);
1185 notify_other_smsm();
2eb44eb9
BS
1186
1187 pr_info("smd_core_init() done\n");
1188
1189 return 0;
1190}
1191
1192#if defined(CONFIG_DEBUG_FS)
1193
5b0f5a3f 1194static int dump_ch(char *buf, int max, struct smd_channel *ch)
2eb44eb9 1195{
5b0f5a3f
BS
1196 volatile struct smd_half_channel *s = ch->send;
1197 volatile struct smd_half_channel *r = ch->recv;
1198
2eb44eb9
BS
1199 return scnprintf(
1200 buf, max,
1201 "ch%02d:"
5b0f5a3f
BS
1202 " %8s(%05d/%05d) %c%c%c%c%c%c%c <->"
1203 " %8s(%05d/%05d) %c%c%c%c%c%c%c\n", ch->n,
2eb44eb9
BS
1204 chstate(s->state), s->tail, s->head,
1205 s->fDSR ? 'D' : 'd',
1206 s->fCTS ? 'C' : 'c',
1207 s->fCD ? 'C' : 'c',
1208 s->fRI ? 'I' : 'i',
1209 s->fHEAD ? 'W' : 'w',
1210 s->fTAIL ? 'R' : 'r',
1211 s->fSTATE ? 'S' : 's',
1212 chstate(r->state), r->tail, r->head,
1213 r->fDSR ? 'D' : 'd',
1214 r->fCTS ? 'R' : 'r',
1215 r->fCD ? 'C' : 'c',
1216 r->fRI ? 'I' : 'i',
1217 r->fHEAD ? 'W' : 'w',
1218 r->fTAIL ? 'R' : 'r',
1219 r->fSTATE ? 'S' : 's'
1220 );
1221}
1222
1223static int debug_read_stat(char *buf, int max)
1224{
2eb44eb9
BS
1225 char *msg;
1226 int i = 0;
1227
2eb44eb9
BS
1228 msg = smem_find(ID_DIAG_ERR_MSG, SZ_DIAG_ERR_MSG);
1229
5b0f5a3f
BS
1230 if (readl(smd_info.state_modem) & SMSM_RESET)
1231 i += scnprintf(buf + i, max - i,
1232 "smsm: ARM9 HAS CRASHED\n");
1233
1234 i += scnprintf(buf + i, max - i, "smsm: a9: %08x a11: %08x\n",
1235 readl(smd_info.state_modem),
1236 readl(smd_info.state_apps));
1237
2eb44eb9
BS
1238 if (msg) {
1239 msg[SZ_DIAG_ERR_MSG - 1] = 0;
1240 i += scnprintf(buf + i, max - i, "diag: '%s'\n", msg);
1241 }
1242 return i;
1243}
1244
1245static int debug_read_mem(char *buf, int max)
1246{
1247 unsigned n;
1248 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
1249 struct smem_heap_entry *toc = shared->heap_toc;
1250 int i = 0;
1251
1252 i += scnprintf(buf + i, max - i,
1253 "heap: init=%d free=%d remain=%d\n",
1254 shared->heap_info.initialized,
1255 shared->heap_info.free_offset,
1256 shared->heap_info.heap_remaining);
1257
1258 for (n = 0; n < SMEM_NUM_ITEMS; n++) {
1259 if (toc[n].allocated == 0)
1260 continue;
1261 i += scnprintf(buf + i, max - i,
5b0f5a3f 1262 "%04d: offset %08x size %08x\n",
2eb44eb9
BS
1263 n, toc[n].offset, toc[n].size);
1264 }
1265 return i;
1266}
1267
1268static int debug_read_ch(char *buf, int max)
1269{
5b0f5a3f
BS
1270 struct smd_channel *ch;
1271 unsigned long flags;
1272 int i = 0;
2eb44eb9 1273
5b0f5a3f
BS
1274 spin_lock_irqsave(&smd_lock, flags);
1275 list_for_each_entry(ch, &smd_ch_list, ch_list)
1276 i += dump_ch(buf + i, max - i, ch);
1277 list_for_each_entry(ch, &smd_ch_closed_list, ch_list)
1278 i += dump_ch(buf + i, max - i, ch);
1279 spin_unlock_irqrestore(&smd_lock, flags);
2eb44eb9
BS
1280
1281 return i;
1282}
1283
1284static int debug_read_version(char *buf, int max)
1285{
1286 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
1287 unsigned version = shared->version[VERSION_MODEM];
1288 return sprintf(buf, "%d.%d\n", version >> 16, version & 0xffff);
1289}
1290
1291static int debug_read_build_id(char *buf, int max)
1292{
1293 unsigned size;
1294 void *data;
1295
5b0f5a3f 1296 data = smem_item(SMEM_HW_SW_BUILD_ID, &size);
2eb44eb9
BS
1297 if (!data)
1298 return 0;
1299
1300 if (size >= max)
1301 size = max;
1302 memcpy(buf, data, size);
1303
1304 return size;
1305}
1306
1307static int debug_read_alloc_tbl(char *buf, int max)
1308{
1309 struct smd_alloc_elm *shared;
1310 int n, i = 0;
1311
1312 shared = smem_find(ID_CH_ALLOC_TBL, sizeof(*shared) * 64);
1313
1314 for (n = 0; n < 64; n++) {
1315 if (shared[n].ref_count == 0)
1316 continue;
1317 i += scnprintf(buf + i, max - i,
5b0f5a3f
BS
1318 "%03d: %-20s cid=%02d type=%03d "
1319 "kind=%02d ref_count=%d\n",
2eb44eb9 1320 n, shared[n].name, shared[n].cid,
5b0f5a3f
BS
1321 shared[n].ctype & 0xff,
1322 (shared[n].ctype >> 8) & 0xf,
1323 shared[n].ref_count);
2eb44eb9
BS
1324 }
1325
1326 return i;
1327}
1328
1329static int debug_boom(char *buf, int max)
1330{
1331 unsigned ms = 5000;
1332 msm_proc_comm(PCOM_RESET_MODEM, &ms, 0);
1333 return 0;
1334}
1335
1336#define DEBUG_BUFMAX 4096
1337static char debug_buffer[DEBUG_BUFMAX];
1338
1339static ssize_t debug_read(struct file *file, char __user *buf,
1340 size_t count, loff_t *ppos)
1341{
1342 int (*fill)(char *buf, int max) = file->private_data;
1343 int bsize = fill(debug_buffer, DEBUG_BUFMAX);
1344 return simple_read_from_buffer(buf, count, ppos, debug_buffer, bsize);
1345}
1346
1347static int debug_open(struct inode *inode, struct file *file)
1348{
1349 file->private_data = inode->i_private;
1350 return 0;
1351}
1352
1353static const struct file_operations debug_ops = {
1354 .read = debug_read,
1355 .open = debug_open,
1356};
1357
1358static void debug_create(const char *name, mode_t mode,
1359 struct dentry *dent,
1360 int (*fill)(char *buf, int max))
1361{
1362 debugfs_create_file(name, mode, dent, fill, &debug_ops);
1363}
1364
1365static void smd_debugfs_init(void)
1366{
1367 struct dentry *dent;
1368
1369 dent = debugfs_create_dir("smd", 0);
1370 if (IS_ERR(dent))
1371 return;
1372
1373 debug_create("ch", 0444, dent, debug_read_ch);
1374 debug_create("stat", 0444, dent, debug_read_stat);
1375 debug_create("mem", 0444, dent, debug_read_mem);
1376 debug_create("version", 0444, dent, debug_read_version);
1377 debug_create("tbl", 0444, dent, debug_read_alloc_tbl);
1378 debug_create("build", 0444, dent, debug_read_build_id);
1379 debug_create("boom", 0444, dent, debug_boom);
1380}
1381#else
1382static void smd_debugfs_init(void) {}
1383#endif
1384
1385static int __init msm_smd_probe(struct platform_device *pdev)
1386{
1387 pr_info("smd_init()\n");
1388
1389 INIT_WORK(&probe_work, smd_channel_probe_worker);
1390
1391 if (smd_core_init()) {
1392 pr_err("smd_core_init() failed\n");
1393 return -1;
1394 }
1395
1396 do_smd_probe();
1397
1398 msm_check_for_modem_crash = check_for_modem_crash;
1399
1400 smd_debugfs_init();
1401 smd_initialized = 1;
1402
1403 return 0;
1404}
1405
1406static struct platform_driver msm_smd_driver = {
1407 .probe = msm_smd_probe,
1408 .driver = {
1409 .name = MODULE_NAME,
1410 .owner = THIS_MODULE,
1411 },
1412};
1413
1414static int __init msm_smd_init(void)
1415{
1416 return platform_driver_register(&msm_smd_driver);
1417}
1418
1419module_init(msm_smd_init);
1420
1421MODULE_DESCRIPTION("MSM Shared Memory Core");
1422MODULE_AUTHOR("Brian Swetland <swetland@google.com>");
1423MODULE_LICENSE("GPL");
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