projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 569106c7 LB |
1 | /* |
| 2 | * arch/arm/mach-mv78x00/rd78x00-masa-setup.c | |
| 3 | * | |
| 4 | * Marvell RD-78x00-mASA Development Board Setup | |
| 5 | * | |
| 6 | * This file is licensed under the terms of the GNU General Public | |
| 7 | * License version 2. This program is licensed "as is" without any | |
| 8 | * warranty of any kind, whether express or implied. | |
| 9 | */ | |
| 10 | ||
| 11 | #include <linux/kernel.h> | |
| 12 | #include <linux/init.h> | |
| 13 | #include <linux/platform_device.h> | |
| 14 | #include <linux/ata_platform.h> | |
| 15 | #include <linux/mv643xx_eth.h> | |
| 16 | #include <linux/ethtool.h> | |
| 17 | #include <mach/mv78xx0.h> | |
| 18 | #include <asm/mach-types.h> | |
| 19 | #include <asm/mach/arch.h> | |
| 20 | #include "common.h" | |
| 21 | ||
| 22 | static struct mv643xx_eth_platform_data rd78x00_masa_ge00_data = { | |
| 23 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | |
| 24 | }; | |
| 25 | ||
| 26 | static struct mv643xx_eth_platform_data rd78x00_masa_ge01_data = { | |
| 27 | .phy_addr = MV643XX_ETH_PHY_ADDR(9), | |
| 28 | }; | |
| 29 | ||
| 30 | static struct mv643xx_eth_platform_data rd78x00_masa_ge10_data = { | |
| 31 | }; | |
| 32 | ||
| 33 | static struct mv643xx_eth_platform_data rd78x00_masa_ge11_data = { | |
| 34 | }; | |
| 35 | ||
| 36 | static struct mv_sata_platform_data rd78x00_masa_sata_data = { | |
| 37 | .n_ports = 2, | |
| 38 | }; | |
| 39 | ||
| 40 | static void __init rd78x00_masa_init(void) | |
| 41 | { | |
| 42 | /* | |
| 43 | * Basic MV78x00 setup. Needs to be called early. | |
| 44 | */ | |
| 45 | mv78xx0_init(); | |
| 46 | ||
| 47 | /* | |
| 48 | * Partition on-chip peripherals between the two CPU cores. | |
| 49 | */ | |
| 50 | if (mv78xx0_core_index() == 0) { | |
| 51 | mv78xx0_ehci0_init(); | |
| 52 | mv78xx0_ehci1_init(); | |
| 53 | mv78xx0_ge00_init(&rd78x00_masa_ge00_data); | |
| 54 | mv78xx0_ge10_init(&rd78x00_masa_ge10_data); | |
| 55 | mv78xx0_sata_init(&rd78x00_masa_sata_data); | |
| 56 | mv78xx0_uart0_init(); | |
| 57 | mv78xx0_uart2_init(); | |
| 58 | } else { | |
| 59 | mv78xx0_ehci2_init(); | |
| 60 | mv78xx0_ge01_init(&rd78x00_masa_ge01_data); | |
| 61 | mv78xx0_ge11_init(&rd78x00_masa_ge11_data); | |
| 62 | mv78xx0_uart1_init(); | |
| 63 | mv78xx0_uart3_init(); | |
| 64 | } | |
| 65 | } | |
| 66 | ||
| 67 | static int __init rd78x00_pci_init(void) | |
| 68 | { | |
| 69 | /* | |
| 70 | * Assign all PCIe devices to CPU core #0. | |
| 71 | */ | |
| 72 | if (machine_is_rd78x00_masa() && mv78xx0_core_index() == 0) | |
| 73 | mv78xx0_pcie_init(1, 1); | |
| 74 | ||
| 75 | return 0; | |
| 76 | } | |
| 77 | subsys_initcall(rd78x00_pci_init); | |
| 78 | ||
| 79 | MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board") | |
| 80 | /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ | |
| 5bc9291a | 81 | .atag_offset = 0x100, |
| 569106c7 LB |
82 | .init_machine = rd78x00_masa_init, |
| 83 | .map_io = mv78xx0_map_io, | |
| 4ee1f6b5 | 84 | .init_early = mv78xx0_init_early, |
| 569106c7 | 85 | .init_irq = mv78xx0_init_irq, |
| 6bb27d73 | 86 | .init_time = mv78xx0_timer_init, |
| 9635f9cd | 87 | .restart = mv78xx0_restart, |
| 569106c7 | 88 | MACHINE_END |