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31af49db GC |
1 | /* |
2 | * Core functions for Marvell System On Chip | |
3 | * | |
4 | * Copyright (C) 2012 Marvell | |
5 | * | |
6 | * Lior Amsalem <alior@marvell.com> | |
7 | * Gregory CLEMENT <gregory.clement@free-electrons.com> | |
8 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
9 | * | |
10 | * This file is licensed under the terms of the GNU General Public | |
11 | * License version 2. This program is licensed "as is" without any | |
12 | * warranty of any kind, whether express or implied. | |
13 | */ | |
14 | ||
15 | #ifndef __ARCH_MVEBU_COMMON_H | |
16 | #define __ARCH_MVEBU_COMMON_H | |
17 | ||
18 | void mvebu_restart(char mode, const char *cmd); | |
19 | ||
9ae6f740 TP |
20 | void armada_370_xp_init_irq(void); |
21 | void armada_370_xp_handle_irq(struct pt_regs *regs); | |
22 | ||
45f5984a | 23 | void armada_xp_cpu_die(unsigned int cpu); |
009f1315 | 24 | int armada_370_xp_coherency_init(void); |
7444dad2 | 25 | int armada_370_xp_pmsu_init(void); |
45f5984a GC |
26 | void armada_xp_secondary_startup(void); |
27 | extern struct smp_operations armada_xp_smp_ops; | |
31af49db | 28 | #endif |