[deliverable/linux.git] / arch / arm / mach-mvebu / platsmp.c

/*
 * Symmetric Multi Processing (SMP) support for Armada XP
 *
 * Copyright (C) 2012 Marvell
 *
 * Lior Amsalem <alior@marvell.com>
 * Yehuda Yitschak <yehuday@marvell.com>
 * Gregory CLEMENT <gregory.clement@free-electrons.com>
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 *
 * The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency
 * This file implements the routines for preparing the SMP infrastructure
 * and waking up the secondary CPUs
 */

#include <linux/init.h>
#include <linux/smp.h>
#include <linux/clk.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/mbus.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
#include "common.h"
#include "armada-370-xp.h"
#include "pmsu.h"
#include "coherency.h"

#define AXP_BOOTROM_BASE 0xfff00000
#define AXP_BOOTROM_SIZE 0x100000

static struct clk *__init get_cpu_clk(int cpu)
{
	struct clk *cpu_clk;
	struct device_node *np = of_get_cpu_node(cpu, NULL);

	if (WARN(!np, "missing cpu node\n"))
		return NULL;
	cpu_clk = of_clk_get(np, 0);
	if (WARN_ON(IS_ERR(cpu_clk)))
		return NULL;
	return cpu_clk;
}

static void __init set_secondary_cpus_clock(void)
{
	int thiscpu, cpu;
	unsigned long rate;
	struct clk *cpu_clk;

	thiscpu = smp_processor_id();
	cpu_clk = get_cpu_clk(thiscpu);
	if (!cpu_clk)
		return;
	clk_prepare_enable(cpu_clk);
	rate = clk_get_rate(cpu_clk);

	/* set all the other CPU clk to the same rate than the boot CPU */
	for_each_possible_cpu(cpu) {
		if (cpu == thiscpu)
			continue;
		cpu_clk = get_cpu_clk(cpu);
		if (!cpu_clk)
			return;
		clk_set_rate(cpu_clk, rate);
		clk_prepare_enable(cpu_clk);
	}
}

static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
	int ret, hw_cpu;

	pr_info("Booting CPU %d\n", cpu);

	hw_cpu = cpu_logical_map(cpu);
	mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup);

	/*
	 * This is needed to wake up CPUs in the offline state after
	 * using CPU hotplug.
	 */
	arch_send_wakeup_ipi_mask(cpumask_of(cpu));

	/*
	 * This is needed to take secondary CPUs out of reset on the
	 * initial boot.
	 */
	ret = mvebu_cpu_reset_deassert(hw_cpu);
	if (ret) {
		pr_warn("unable to boot CPU: %d\n", ret);
		return ret;
	}

	return 0;
}

/*
 * When a CPU is brought back online, either through CPU hotplug, or
 * because of the boot of a kexec'ed kernel, the PMSU configuration
 * for this CPU might be in the deep idle state, preventing this CPU
 * from receiving interrupts. Here, we therefore take out the current
 * CPU from this state, which was entered by armada_xp_cpu_die()
 * below.
 */
static void armada_xp_secondary_init(unsigned int cpu)
{
	mvebu_v7_pmsu_idle_exit();
}

static void __init armada_xp_smp_init_cpus(void)
{
	unsigned int ncores = num_possible_cpus();

	if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS)
		panic("Invalid number of CPUs in DT\n");
}

static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
{
	struct device_node *node;
	struct resource res;
	int err;

	set_secondary_cpus_clock();
	flush_cache_all();
	set_cpu_coherent();

	/*
	 * In order to boot the secondary CPUs we need to ensure
	 * the bootROM is mapped at the correct address.
	 */
	node = of_find_compatible_node(NULL, NULL, "marvell,bootrom");
	if (!node)
		panic("Cannot find 'marvell,bootrom' compatible node");

	err = of_address_to_resource(node, 0, &res);
	if (err < 0)
		panic("Cannot get 'bootrom' node address");

	if (res.start != AXP_BOOTROM_BASE ||
	    resource_size(&res) != AXP_BOOTROM_SIZE)
		panic("The address for the BootROM is incorrect");
}

#ifdef CONFIG_HOTPLUG_CPU
static void armada_xp_cpu_die(unsigned int cpu)
{
	/*
	 * CPU hotplug is implemented by putting offline CPUs into the
	 * deep idle sleep state.
	 */
	armada_370_xp_pmsu_idle_enter(true);
}

/*
 * We need a dummy function, so that platform_can_cpu_hotplug() knows
 * we support CPU hotplug. However, the function does not need to do
 * anything, because CPUs going offline can enter the deep idle state
 * by themselves, without any help from a still alive CPU.
 */
static int armada_xp_cpu_kill(unsigned int cpu)
{
	return 1;
}
#endif

struct smp_operations armada_xp_smp_ops __initdata = {
	.smp_init_cpus		= armada_xp_smp_init_cpus,
	.smp_prepare_cpus	= armada_xp_smp_prepare_cpus,
	.smp_boot_secondary	= armada_xp_boot_secondary,
	.smp_secondary_init     = armada_xp_secondary_init,
#ifdef CONFIG_HOTPLUG_CPU
	.cpu_die		= armada_xp_cpu_die,
	.cpu_kill               = armada_xp_cpu_kill,
#endif
};

CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp",
		      &armada_xp_smp_ops);
Commit	Line	Data
45f5984a GC	1	/*
	2	* Symmetric Multi Processing (SMP) support for Armada XP
	3	*
	4	* Copyright (C) 2012 Marvell
	5	*
	6	* Lior Amsalem <alior@marvell.com>
	7	* Yehuda Yitschak <yehuday@marvell.com>
	8	* Gregory CLEMENT <gregory.clement@free-electrons.com>
	9	* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
	10	*
	11	* This file is licensed under the terms of the GNU General Public
	12	* License version 2. This program is licensed "as is" without any
	13	* warranty of any kind, whether express or implied.
	14	*
	15	* The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency
	16	* This file implements the routines for preparing the SMP infrastructure
	17	* and waking up the secondary CPUs
	18	*/
	19
	20	#include <linux/init.h>
	21	#include <linux/smp.h>
	22	#include <linux/clk.h>
	23	#include <linux/of.h>
994c8c94	24	#include <linux/of_address.h>
87e1bed4	25	#include <linux/mbus.h>
45f5984a GC	26	#include <asm/cacheflush.h>
	27	#include <asm/smp_plat.h>
	28	#include "common.h"
	29	#include "armada-370-xp.h"
	30	#include "pmsu.h"
	31	#include "coherency.h"
	32
994c8c94 EG	33	#define AXP_BOOTROM_BASE 0xfff00000
	34	#define AXP_BOOTROM_SIZE 0x100000
	35
f6cec7cd SK	36	static struct clk *__init get_cpu_clk(int cpu)
	37	{
	38	struct clk *cpu_clk;
	39	struct device_node *np = of_get_cpu_node(cpu, NULL);
	40
	41	if (WARN(!np, "missing cpu node\n"))
	42	return NULL;
	43	cpu_clk = of_clk_get(np, 0);
	44	if (WARN_ON(IS_ERR(cpu_clk)))
	45	return NULL;
	46	return cpu_clk;
	47	}
	48
b12634e3	49	static void __init set_secondary_cpus_clock(void)
45f5984a	50	{
f6cec7cd	51	int thiscpu, cpu;
45f5984a	52	unsigned long rate;
f6cec7cd	53	struct clk *cpu_clk;
45f5984a GC	54
45f5984a GC	55	thiscpu = smp_processor_id();
f6cec7cd SK	56	cpu_clk = get_cpu_clk(thiscpu);
f6cec7cd SK	57	if (!cpu_clk)
45f5984a GC	58	return;
	59	clk_prepare_enable(cpu_clk);
	60	rate = clk_get_rate(cpu_clk);
	61
	62	/* set all the other CPU clk to the same rate than the boot CPU */
f6cec7cd SK	63	for_each_possible_cpu(cpu) {
	64	if (cpu == thiscpu)
	65	continue;
	66	cpu_clk = get_cpu_clk(cpu);
	67	if (!cpu_clk)
45f5984a	68	return;
f6cec7cd	69	clk_set_rate(cpu_clk, rate);
831e2518	70	clk_prepare_enable(cpu_clk);
45f5984a GC	71	}
	72	}
	73
8bd26e3a	74	static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
45f5984a	75	{
05ad6906 TP	76	int ret, hw_cpu;
05ad6906 TP	77
45f5984a GC	78	pr_info("Booting CPU %d\n", cpu);
45f5984a GC	79
05ad6906 TP	80	hw_cpu = cpu_logical_map(cpu);
05ad6906 TP	81	mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup);
26337779 TP	82
	83	/*
	84	* This is needed to wake up CPUs in the offline state after
	85	* using CPU hotplug.
	86	*/
	87	arch_send_wakeup_ipi_mask(cpumask_of(cpu));
	88
	89	/*
	90	* This is needed to take secondary CPUs out of reset on the
	91	* initial boot.
	92	*/
05ad6906 TP	93	ret = mvebu_cpu_reset_deassert(hw_cpu);
	94	if (ret) {
	95	pr_warn("unable to boot CPU: %d\n", ret);
	96	return ret;
	97	}
45f5984a GC	98
	99	return 0;
	100	}
	101
26337779 TP	102	/*
	103	* When a CPU is brought back online, either through CPU hotplug, or
	104	* because of the boot of a kexec'ed kernel, the PMSU configuration
	105	* for this CPU might be in the deep idle state, preventing this CPU
	106	* from receiving interrupts. Here, we therefore take out the current
	107	* CPU from this state, which was entered by armada_xp_cpu_die()
	108	* below.
	109	*/
	110	static void armada_xp_secondary_init(unsigned int cpu)
	111	{
898ef3e9	112	mvebu_v7_pmsu_idle_exit();
26337779 TP	113	}
26337779 TP	114
45f5984a GC	115	static void __init armada_xp_smp_init_cpus(void)
45f5984a GC	116	{
a7160b7e	117	unsigned int ncores = num_possible_cpus();
b21dcafe	118
b21dcafe TP	119	if (ncores == 0 \|\| ncores > ARMADA_XP_MAX_CPUS)
b21dcafe TP	120	panic("Invalid number of CPUs in DT\n");
45f5984a GC	121	}
45f5984a GC	122
b12634e3	123	static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
45f5984a	124	{
994c8c94 EG	125	struct device_node *node;
	126	struct resource res;
	127	int err;
	128
45f5984a GC	129	set_secondary_cpus_clock();
45f5984a GC	130	flush_cache_all();
952f4ca7	131	set_cpu_coherent();
994c8c94 EG	132
	133	/*
	134	* In order to boot the secondary CPUs we need to ensure
	135	* the bootROM is mapped at the correct address.
	136	*/
	137	node = of_find_compatible_node(NULL, NULL, "marvell,bootrom");
	138	if (!node)
	139	panic("Cannot find 'marvell,bootrom' compatible node");
	140
	141	err = of_address_to_resource(node, 0, &res);
	142	if (err < 0)
	143	panic("Cannot get 'bootrom' node address");
	144
	145	if (res.start != AXP_BOOTROM_BASE \|\|
	146	resource_size(&res) != AXP_BOOTROM_SIZE)
	147	panic("The address for the BootROM is incorrect");
45f5984a GC	148	}
45f5984a GC	149
26337779 TP	150	#ifdef CONFIG_HOTPLUG_CPU
	151	static void armada_xp_cpu_die(unsigned int cpu)
	152	{
	153	/*
	154	* CPU hotplug is implemented by putting offline CPUs into the
	155	* deep idle sleep state.
	156	*/
	157	armada_370_xp_pmsu_idle_enter(true);
	158	}
	159
	160	/*
	161	* We need a dummy function, so that platform_can_cpu_hotplug() knows
	162	* we support CPU hotplug. However, the function does not need to do
	163	* anything, because CPUs going offline can enter the deep idle state
	164	* by themselves, without any help from a still alive CPU.
	165	*/
	166	static int armada_xp_cpu_kill(unsigned int cpu)
	167	{
	168	return 1;
	169	}
	170	#endif
	171
45f5984a GC	172	struct smp_operations armada_xp_smp_ops __initdata = {
	173	.smp_init_cpus = armada_xp_smp_init_cpus,
	174	.smp_prepare_cpus = armada_xp_smp_prepare_cpus,
45f5984a	175	.smp_boot_secondary = armada_xp_boot_secondary,
26337779	176	.smp_secondary_init = armada_xp_secondary_init,
45f5984a GC	177	#ifdef CONFIG_HOTPLUG_CPU
45f5984a GC	178	.cpu_die = armada_xp_cpu_die,
26337779	179	.cpu_kill = armada_xp_cpu_kill,
45f5984a GC	180	#endif
45f5984a GC	181	};
2c9b2240 TP	182
	183	CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp",
	184	&armada_xp_smp_ops);