projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 31af49db GC |
1 | /* |
| 2 | * System controller support for Armada 370 and XP platforms. | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Marvell | |
| 5 | * | |
| 6 | * Lior Amsalem <alior@marvell.com> | |
| 7 | * Gregory CLEMENT <gregory.clement@free-electrons.com> | |
| 8 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
| 9 | * | |
| 10 | * This file is licensed under the terms of the GNU General Public | |
| 11 | * License version 2. This program is licensed "as is" without any | |
| 12 | * warranty of any kind, whether express or implied. | |
| 13 | * | |
| 14 | * The Armada 370 and Armada XP SoCs both have a range of | |
| 15 | * miscellaneous registers, that do not belong to a particular device, | |
| 16 | * but rather provide system-level features. This basic | |
| 17 | * system-controller driver provides a device tree binding for those | |
| 18 | * registers, and implements utility functions offering various | |
| 19 | * features related to those registers. | |
| 20 | * | |
| 21 | * For now, the feature set is limited to restarting the platform by a | |
| 22 | * soft-reset, but it might be extended in the future. | |
| 23 | */ | |
| 24 | ||
| 25 | #include <linux/kernel.h> | |
| 26 | #include <linux/init.h> | |
| 27 | #include <linux/of_address.h> | |
| 28 | #include <linux/io.h> | |
| 7b6d864b | 29 | #include <linux/reboot.h> |
| b12634e3 | 30 | #include "common.h" |
| 31af49db GC |
31 | |
| 32 | static void __iomem *system_controller_base; | |
| 33 | ||
| 34 | struct mvebu_system_controller { | |
| 35 | u32 rstoutn_mask_offset; | |
| 36 | u32 system_soft_reset_offset; | |
| 37 | ||
| 38 | u32 rstoutn_mask_reset_out_en; | |
| 39 | u32 system_soft_reset; | |
| 40 | }; | |
| 41 | static struct mvebu_system_controller *mvebu_sc; | |
| 42 | ||
| b12634e3 | 43 | static const struct mvebu_system_controller armada_370_xp_system_controller = { |
| 31af49db GC |
44 | .rstoutn_mask_offset = 0x60, |
| 45 | .system_soft_reset_offset = 0x64, | |
| 46 | .rstoutn_mask_reset_out_en = 0x1, | |
| 47 | .system_soft_reset = 0x1, | |
| 48 | }; | |
| 49 | ||
| b12634e3 | 50 | static const struct mvebu_system_controller orion_system_controller = { |
| 31af49db GC |
51 | .rstoutn_mask_offset = 0x108, |
| 52 | .system_soft_reset_offset = 0x10c, | |
| 53 | .rstoutn_mask_reset_out_en = 0x4, | |
| 54 | .system_soft_reset = 0x1, | |
| 55 | }; | |
| 56 | ||
| 57 | static struct of_device_id of_system_controller_table[] = { | |
| 58 | { | |
| 59 | .compatible = "marvell,orion-system-controller", | |
| 60 | .data = (void *) &orion_system_controller, | |
| 61 | }, { | |
| 62 | .compatible = "marvell,armada-370-xp-system-controller", | |
| 63 | .data = (void *) &armada_370_xp_system_controller, | |
| 64 | }, | |
| 65 | { /* end of list */ }, | |
| 66 | }; | |
| 67 | ||
| 7b6d864b | 68 | void mvebu_restart(enum reboot_mode mode, const char *cmd) |
| 31af49db GC |
69 | { |
| 70 | if (!system_controller_base) { | |
| 71 | pr_err("Cannot restart, system-controller not available: check the device tree\n"); | |
| 72 | } else { | |
| 73 | /* | |
| 74 | * Enable soft reset to assert RSTOUTn. | |
| 75 | */ | |
| 76 | writel(mvebu_sc->rstoutn_mask_reset_out_en, | |
| 77 | system_controller_base + | |
| 78 | mvebu_sc->rstoutn_mask_offset); | |
| 79 | /* | |
| 80 | * Assert soft reset. | |
| 81 | */ | |
| 82 | writel(mvebu_sc->system_soft_reset, | |
| 83 | system_controller_base + | |
| 84 | mvebu_sc->system_soft_reset_offset); | |
| 85 | } | |
| 86 | ||
| 87 | while (1) | |
| 88 | ; | |
| 89 | } | |
| 90 | ||
| 91 | static int __init mvebu_system_controller_init(void) | |
| 92 | { | |
| 93 | struct device_node *np; | |
| 94 | ||
| 95 | np = of_find_matching_node(NULL, of_system_controller_table); | |
| 96 | if (np) { | |
| 97 | const struct of_device_id *match = | |
| 98 | of_match_node(of_system_controller_table, np); | |
| 99 | BUG_ON(!match); | |
| 100 | system_controller_base = of_iomap(np, 0); | |
| 101 | mvebu_sc = (struct mvebu_system_controller *)match->data; | |
| abe511ac | 102 | of_node_put(np); |
| 31af49db GC |
103 | } |
| 104 | ||
| 105 | return 0; | |
| 106 | } | |
| 107 | ||
| 108 | arch_initcall(mvebu_system_controller_init); |