ARM: imx: rename mxc_uart_devicex to follow a common naming scheme
[deliverable/linux.git] / arch / arm / mach-mx1 / devices.c
CommitLineData
cfca8b53
PZ
1/*
2 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
4 * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
219fed75 5 * Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
cfca8b53
PZ
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
19 * Boston, MA 02110-1301, USA.
20 */
21
22#include <linux/kernel.h>
23#include <linux/init.h>
05a3185c 24#include <linux/dma-mapping.h>
cfca8b53
PZ
25#include <linux/platform_device.h>
26#include <linux/gpio.h>
ccfe30a7 27#include <mach/irqs.h>
cfca8b53
PZ
28#include <mach/hardware.h>
29
87bbb197
SH
30#include "devices.h"
31
68a9c5ba 32static struct resource imx1_camera_resources[] = {
9b0e6db0 33 {
219fed75
DA
34 .start = 0x00224000,
35 .end = 0x00224010,
36 .flags = IORESOURCE_MEM,
9b0e6db0 37 }, {
05a3185c
UKK
38 .start = MX1_CSI_INT,
39 .end = MX1_CSI_INT,
219fed75
DA
40 .flags = IORESOURCE_IRQ,
41 },
42};
43
68a9c5ba 44static u64 imx1_camera_dmamask = DMA_BIT_MASK(32);
219fed75 45
68a9c5ba 46struct platform_device imx1_camera_device = {
6acc81c3 47 .name = "mx1-camera",
219fed75
DA
48 .id = 0, /* This is used to put cameras on this interface */
49 .dev = {
68a9c5ba 50 .dma_mask = &imx1_camera_dmamask,
05a3185c 51 .coherent_dma_mask = DMA_BIT_MASK(32),
219fed75 52 },
68a9c5ba
UKK
53 .resource = imx1_camera_resources,
54 .num_resources = ARRAY_SIZE(imx1_camera_resources),
219fed75
DA
55};
56
57static struct resource imx_i2c_resources[] = {
9b0e6db0 58 {
219fed75
DA
59 .start = 0x00217000,
60 .end = 0x00217010,
61 .flags = IORESOURCE_MEM,
9b0e6db0 62 }, {
05a3185c
UKK
63 .start = MX1_I2C_INT,
64 .end = MX1_I2C_INT,
219fed75
DA
65 .flags = IORESOURCE_IRQ,
66 },
67};
68
8f785e85 69struct platform_device imx_i2c_device0 = {
219fed75
DA
70 .name = "imx-i2c",
71 .id = 0,
72 .resource = imx_i2c_resources,
73 .num_resources = ARRAY_SIZE(imx_i2c_resources),
74};
75
3e876935
UKK
76#define DEFINE_IMX1_UART_DEVICE(n, baseaddr, irqrx, irqtx, irqrts) \
77 static struct resource imx1_uart_resources ## n[] = { \
78 { \
79 .start = baseaddr, \
80 .end = baseaddr + 0xd0, \
81 .flags = IORESOURCE_MEM, \
82 }, { \
83 .start = irqrx, \
84 .end = irqrx, \
85 .flags = IORESOURCE_IRQ, \
86 }, { \
87 .start = irqtx, \
88 .end = irqtx, \
89 .flags = IORESOURCE_IRQ, \
90 }, { \
91 .start = irqrts, \
92 .end = irqrts, \
93 .flags = IORESOURCE_IRQ, \
94 }, \
95 }; \
96 \
97 struct platform_device imx1_uart_device ## n = { \
98 .name = "imx-uart", \
99 .id = n, \
100 .num_resources = ARRAY_SIZE(imx1_uart_resources ## n), \
101 .resource = imx1_uart_resources ## n, \
102 }
cfca8b53 103
3e876935
UKK
104DEFINE_IMX1_UART_DEVICE(0, MX1_UART1_BASE_ADDR, MX1_UART1_MINT_RX, MX1_UART1_MINT_TX, MX1_UART1_MINT_RTS);
105DEFINE_IMX1_UART_DEVICE(1, MX1_UART2_BASE_ADDR, MX1_UART2_MINT_RX, MX1_UART2_MINT_TX, MX1_UART2_MINT_RTS);
cfca8b53 106
219fed75 107static struct resource imx_rtc_resources[] = {
9b0e6db0 108 {
219fed75
DA
109 .start = 0x00204000,
110 .end = 0x00204024,
111 .flags = IORESOURCE_MEM,
9b0e6db0 112 }, {
05a3185c
UKK
113 .start = MX1_RTC_INT,
114 .end = MX1_RTC_INT,
219fed75 115 .flags = IORESOURCE_IRQ,
9b0e6db0 116 }, {
05a3185c
UKK
117 .start = MX1_RTC_SAMINT,
118 .end = MX1_RTC_SAMINT,
219fed75
DA
119 .flags = IORESOURCE_IRQ,
120 },
121};
122
123struct platform_device imx_rtc_device = {
124 .name = "rtc-imx",
125 .id = 0,
126 .resource = imx_rtc_resources,
127 .num_resources = ARRAY_SIZE(imx_rtc_resources),
128};
129
130static struct resource imx_wdt_resources[] = {
9b0e6db0 131 {
219fed75
DA
132 .start = 0x00201000,
133 .end = 0x00201008,
134 .flags = IORESOURCE_MEM,
9b0e6db0 135 }, {
05a3185c
UKK
136 .start = MX1_WDT_INT,
137 .end = MX1_WDT_INT,
219fed75
DA
138 .flags = IORESOURCE_IRQ,
139 },
140};
141
142struct platform_device imx_wdt_device = {
143 .name = "imx-wdt",
144 .id = 0,
145 .resource = imx_wdt_resources,
146 .num_resources = ARRAY_SIZE(imx_wdt_resources),
147};
148
149static struct resource imx_usb_resources[] = {
9b0e6db0 150 {
219fed75
DA
151 .start = 0x00212000,
152 .end = 0x00212148,
153 .flags = IORESOURCE_MEM,
9b0e6db0 154 }, {
05a3185c
UKK
155 .start = MX1_USBD_INT0,
156 .end = MX1_USBD_INT0,
219fed75 157 .flags = IORESOURCE_IRQ,
9b0e6db0 158 }, {
05a3185c
UKK
159 .start = MX1_USBD_INT1,
160 .end = MX1_USBD_INT1,
219fed75 161 .flags = IORESOURCE_IRQ,
9b0e6db0 162 }, {
05a3185c
UKK
163 .start = MX1_USBD_INT2,
164 .end = MX1_USBD_INT2,
219fed75 165 .flags = IORESOURCE_IRQ,
9b0e6db0 166 }, {
05a3185c
UKK
167 .start = MX1_USBD_INT3,
168 .end = MX1_USBD_INT3,
219fed75 169 .flags = IORESOURCE_IRQ,
9b0e6db0 170 }, {
05a3185c
UKK
171 .start = MX1_USBD_INT4,
172 .end = MX1_USBD_INT4,
219fed75 173 .flags = IORESOURCE_IRQ,
9b0e6db0 174 }, {
05a3185c
UKK
175 .start = MX1_USBD_INT5,
176 .end = MX1_USBD_INT5,
219fed75 177 .flags = IORESOURCE_IRQ,
9b0e6db0 178 }, {
05a3185c
UKK
179 .start = MX1_USBD_INT6,
180 .end = MX1_USBD_INT6,
219fed75
DA
181 .flags = IORESOURCE_IRQ,
182 },
183};
184
185struct platform_device imx_usb_device = {
186 .name = "imx_udc",
187 .id = 0,
188 .num_resources = ARRAY_SIZE(imx_usb_resources),
189 .resource = imx_usb_resources,
190};
191
cfca8b53
PZ
192/* GPIO port description */
193static struct mxc_gpio_port imx_gpio_ports[] = {
9b0e6db0 194 {
cfca8b53 195 .chip.label = "gpio-0",
05a3185c
UKK
196 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
197 .irq = MX1_GPIO_INT_PORTA,
9b0e6db0
SH
198 .virtual_irq_start = MXC_GPIO_IRQ_START,
199 }, {
cfca8b53 200 .chip.label = "gpio-1",
05a3185c
UKK
201 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100),
202 .irq = MX1_GPIO_INT_PORTB,
9b0e6db0
SH
203 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
204 }, {
cfca8b53 205 .chip.label = "gpio-2",
05a3185c
UKK
206 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200),
207 .irq = MX1_GPIO_INT_PORTC,
9b0e6db0
SH
208 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
209 }, {
cfca8b53 210 .chip.label = "gpio-3",
05a3185c
UKK
211 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300),
212 .irq = MX1_GPIO_INT_PORTD,
9b0e6db0 213 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
cfca8b53
PZ
214 }
215};
216
9a763bfb 217int __init imx1_register_gpios(void)
cfca8b53
PZ
218{
219 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
220}
This page took 0.124737 seconds and 5 git commands to generate.