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1 | /* |
2 | * Copyright (C) 2009 Eric Benard - eric@eukrea.com | |
3 | * | |
4 | * Based on pcm038.c which is : | |
5 | * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix | |
6 | * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * as published by the Free Software Foundation; either version 2 | |
11 | * of the License, or (at your option) any later version. | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | |
20 | * MA 02110-1301, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/i2c.h> | |
24 | #include <linux/io.h> | |
25 | #include <linux/mtd/plat-ram.h> | |
26 | #include <linux/mtd/physmap.h> | |
27 | #include <linux/platform_device.h> | |
28 | #include <linux/serial_8250.h> | |
29 | ||
30 | #include <asm/mach-types.h> | |
31 | #include <asm/mach/arch.h> | |
32 | #include <asm/mach/time.h> | |
33 | #include <asm/mach/map.h> | |
34 | ||
35 | #include <mach/board-eukrea_cpuimx27.h> | |
36 | #include <mach/common.h> | |
37 | #include <mach/hardware.h> | |
38 | #include <mach/i2c.h> | |
39 | #include <mach/iomux.h> | |
40 | #include <mach/imx-uart.h> | |
41 | #include <mach/mxc_nand.h> | |
42 | ||
43 | #include "devices.h" | |
44 | ||
45 | static int eukrea_cpuimx27_pins[] = { | |
46 | /* UART1 */ | |
47 | PE12_PF_UART1_TXD, | |
48 | PE13_PF_UART1_RXD, | |
49 | PE14_PF_UART1_CTS, | |
50 | PE15_PF_UART1_RTS, | |
51 | /* UART4 */ | |
52 | PB26_AF_UART4_RTS, | |
53 | PB28_AF_UART4_TXD, | |
54 | PB29_AF_UART4_CTS, | |
55 | PB31_AF_UART4_RXD, | |
56 | /* FEC */ | |
57 | PD0_AIN_FEC_TXD0, | |
58 | PD1_AIN_FEC_TXD1, | |
59 | PD2_AIN_FEC_TXD2, | |
60 | PD3_AIN_FEC_TXD3, | |
61 | PD4_AOUT_FEC_RX_ER, | |
62 | PD5_AOUT_FEC_RXD1, | |
63 | PD6_AOUT_FEC_RXD2, | |
64 | PD7_AOUT_FEC_RXD3, | |
65 | PD8_AF_FEC_MDIO, | |
66 | PD9_AIN_FEC_MDC, | |
67 | PD10_AOUT_FEC_CRS, | |
68 | PD11_AOUT_FEC_TX_CLK, | |
69 | PD12_AOUT_FEC_RXD0, | |
70 | PD13_AOUT_FEC_RX_DV, | |
71 | PD14_AOUT_FEC_RX_CLK, | |
72 | PD15_AOUT_FEC_COL, | |
73 | PD16_AIN_FEC_TX_ER, | |
74 | PF23_AIN_FEC_TX_EN, | |
75 | /* I2C1 */ | |
76 | PD17_PF_I2C_DATA, | |
77 | PD18_PF_I2C_CLK, | |
78 | /* SDHC2 */ | |
79 | PB4_PF_SD2_D0, | |
80 | PB5_PF_SD2_D1, | |
81 | PB6_PF_SD2_D2, | |
82 | PB7_PF_SD2_D3, | |
83 | PB8_PF_SD2_CMD, | |
84 | PB9_PF_SD2_CLK, | |
85 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) | |
86 | /* Quad UART's IRQ */ | |
87 | GPIO_PORTD | 22 | GPIO_GPIO | GPIO_IN, | |
88 | GPIO_PORTD | 23 | GPIO_GPIO | GPIO_IN, | |
89 | GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN, | |
90 | GPIO_PORTD | 30 | GPIO_GPIO | GPIO_IN, | |
91 | #endif | |
92 | }; | |
93 | ||
94 | static struct physmap_flash_data eukrea_cpuimx27_flash_data = { | |
95 | .width = 2, | |
96 | }; | |
97 | ||
98 | static struct resource eukrea_cpuimx27_flash_resource = { | |
99 | .start = 0xc0000000, | |
100 | .end = 0xc3ffffff, | |
101 | .flags = IORESOURCE_MEM, | |
102 | }; | |
103 | ||
104 | static struct platform_device eukrea_cpuimx27_nor_mtd_device = { | |
105 | .name = "physmap-flash", | |
106 | .id = 0, | |
107 | .dev = { | |
108 | .platform_data = &eukrea_cpuimx27_flash_data, | |
109 | }, | |
110 | .num_resources = 1, | |
111 | .resource = &eukrea_cpuimx27_flash_resource, | |
112 | }; | |
113 | ||
114 | static struct imxuart_platform_data uart_pdata[] = { | |
115 | { | |
116 | .flags = IMXUART_HAVE_RTSCTS, | |
117 | }, { | |
118 | .flags = IMXUART_HAVE_RTSCTS, | |
119 | }, | |
120 | }; | |
121 | ||
122 | static struct mxc_nand_platform_data eukrea_cpuimx27_nand_board_info = { | |
123 | .width = 1, | |
124 | .hw_ecc = 1, | |
125 | }; | |
126 | ||
127 | static struct platform_device *platform_devices[] __initdata = { | |
128 | &eukrea_cpuimx27_nor_mtd_device, | |
129 | &mxc_fec_device, | |
130 | }; | |
131 | ||
132 | static struct imxi2c_platform_data eukrea_cpuimx27_i2c_1_data = { | |
133 | .bitrate = 100000, | |
134 | }; | |
135 | ||
136 | static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = { | |
137 | { | |
cf87a6e2 | 138 | I2C_BOARD_INFO("pcf8563", 0x51), |
af5b1df7 EB |
139 | }, |
140 | }; | |
141 | ||
142 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) | |
143 | static struct plat_serial8250_port serial_platform_data[] = { | |
144 | { | |
3f35d1f5 | 145 | .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000), |
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146 | .irq = IRQ_GPIOB(23), |
147 | .uartclk = 14745600, | |
148 | .regshift = 1, | |
149 | .iotype = UPIO_MEM, | |
150 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, | |
151 | }, { | |
3f35d1f5 | 152 | .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000), |
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153 | .irq = IRQ_GPIOB(22), |
154 | .uartclk = 14745600, | |
155 | .regshift = 1, | |
156 | .iotype = UPIO_MEM, | |
157 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, | |
158 | }, { | |
3f35d1f5 | 159 | .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000), |
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160 | .irq = IRQ_GPIOB(27), |
161 | .uartclk = 14745600, | |
162 | .regshift = 1, | |
163 | .iotype = UPIO_MEM, | |
164 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, | |
165 | }, { | |
3f35d1f5 | 166 | .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000), |
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167 | .irq = IRQ_GPIOB(30), |
168 | .uartclk = 14745600, | |
169 | .regshift = 1, | |
170 | .iotype = UPIO_MEM, | |
171 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, | |
172 | }, { | |
173 | } | |
174 | }; | |
175 | ||
176 | static struct platform_device serial_device = { | |
177 | .name = "serial8250", | |
178 | .id = 0, | |
179 | .dev = { | |
180 | .platform_data = serial_platform_data, | |
181 | }, | |
182 | }; | |
183 | #endif | |
184 | ||
185 | static void __init eukrea_cpuimx27_init(void) | |
186 | { | |
187 | mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins, | |
188 | ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27"); | |
189 | ||
190 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); | |
191 | ||
192 | mxc_register_device(&mxc_nand_device, &eukrea_cpuimx27_nand_board_info); | |
193 | ||
194 | i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices, | |
195 | ARRAY_SIZE(eukrea_cpuimx27_i2c_devices)); | |
196 | ||
197 | mxc_register_device(&mxc_i2c_device0, &eukrea_cpuimx27_i2c_1_data); | |
198 | ||
199 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | |
200 | ||
201 | #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2) | |
202 | /* SDHC2 can be used for Wifi */ | |
203 | mxc_register_device(&mxc_sdhc_device1, NULL); | |
204 | /* in which case UART4 is also used for Bluetooth */ | |
205 | mxc_register_device(&mxc_uart_device3, &uart_pdata[1]); | |
206 | #endif | |
207 | ||
208 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) | |
209 | platform_device_register(&serial_device); | |
210 | #endif | |
211 | ||
212 | #ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD | |
213 | eukrea_mbimx27_baseboard_init(); | |
214 | #endif | |
215 | } | |
216 | ||
217 | static void __init eukrea_cpuimx27_timer_init(void) | |
218 | { | |
219 | mx27_clocks_init(26000000); | |
220 | } | |
221 | ||
222 | static struct sys_timer eukrea_cpuimx27_timer = { | |
223 | .init = eukrea_cpuimx27_timer_init, | |
224 | }; | |
225 | ||
226 | MACHINE_START(CPUIMX27, "EUKREA CPUIMX27") | |
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227 | .phys_io = MX27_AIPI_BASE_ADDR, |
228 | .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, | |
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229 | .boot_params = PHYS_OFFSET + 0x100, |
230 | .map_io = mx27_map_io, | |
231 | .init_irq = mx27_init_irq, | |
232 | .init_machine = eukrea_cpuimx27_init, | |
233 | .timer = &eukrea_cpuimx27_timer, | |
234 | MACHINE_END |