Add support for Eukrea's CPUIMX27
[deliverable/linux.git] / arch / arm / mach-mx2 / eukrea_cpuimx27.c
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1/*
2 * Copyright (C) 2009 Eric Benard - eric@eukrea.com
3 *
4 * Based on pcm038.c which is :
5 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
6 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
20 * MA 02110-1301, USA.
21 */
22
23#include <linux/i2c.h>
24#include <linux/io.h>
25#include <linux/mtd/plat-ram.h>
26#include <linux/mtd/physmap.h>
27#include <linux/platform_device.h>
28#include <linux/serial_8250.h>
29
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32#include <asm/mach/time.h>
33#include <asm/mach/map.h>
34
35#include <mach/board-eukrea_cpuimx27.h>
36#include <mach/common.h>
37#include <mach/hardware.h>
38#include <mach/i2c.h>
39#include <mach/iomux.h>
40#include <mach/imx-uart.h>
41#include <mach/mxc_nand.h>
42
43#include "devices.h"
44
45static int eukrea_cpuimx27_pins[] = {
46 /* UART1 */
47 PE12_PF_UART1_TXD,
48 PE13_PF_UART1_RXD,
49 PE14_PF_UART1_CTS,
50 PE15_PF_UART1_RTS,
51 /* UART4 */
52 PB26_AF_UART4_RTS,
53 PB28_AF_UART4_TXD,
54 PB29_AF_UART4_CTS,
55 PB31_AF_UART4_RXD,
56 /* FEC */
57 PD0_AIN_FEC_TXD0,
58 PD1_AIN_FEC_TXD1,
59 PD2_AIN_FEC_TXD2,
60 PD3_AIN_FEC_TXD3,
61 PD4_AOUT_FEC_RX_ER,
62 PD5_AOUT_FEC_RXD1,
63 PD6_AOUT_FEC_RXD2,
64 PD7_AOUT_FEC_RXD3,
65 PD8_AF_FEC_MDIO,
66 PD9_AIN_FEC_MDC,
67 PD10_AOUT_FEC_CRS,
68 PD11_AOUT_FEC_TX_CLK,
69 PD12_AOUT_FEC_RXD0,
70 PD13_AOUT_FEC_RX_DV,
71 PD14_AOUT_FEC_RX_CLK,
72 PD15_AOUT_FEC_COL,
73 PD16_AIN_FEC_TX_ER,
74 PF23_AIN_FEC_TX_EN,
75 /* I2C1 */
76 PD17_PF_I2C_DATA,
77 PD18_PF_I2C_CLK,
78 /* SDHC2 */
79 PB4_PF_SD2_D0,
80 PB5_PF_SD2_D1,
81 PB6_PF_SD2_D2,
82 PB7_PF_SD2_D3,
83 PB8_PF_SD2_CMD,
84 PB9_PF_SD2_CLK,
85#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
86 /* Quad UART's IRQ */
87 GPIO_PORTD | 22 | GPIO_GPIO | GPIO_IN,
88 GPIO_PORTD | 23 | GPIO_GPIO | GPIO_IN,
89 GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN,
90 GPIO_PORTD | 30 | GPIO_GPIO | GPIO_IN,
91#endif
92};
93
94static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
95 .width = 2,
96};
97
98static struct resource eukrea_cpuimx27_flash_resource = {
99 .start = 0xc0000000,
100 .end = 0xc3ffffff,
101 .flags = IORESOURCE_MEM,
102};
103
104static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
105 .name = "physmap-flash",
106 .id = 0,
107 .dev = {
108 .platform_data = &eukrea_cpuimx27_flash_data,
109 },
110 .num_resources = 1,
111 .resource = &eukrea_cpuimx27_flash_resource,
112};
113
114static struct imxuart_platform_data uart_pdata[] = {
115 {
116 .flags = IMXUART_HAVE_RTSCTS,
117 }, {
118 .flags = IMXUART_HAVE_RTSCTS,
119 },
120};
121
122static struct mxc_nand_platform_data eukrea_cpuimx27_nand_board_info = {
123 .width = 1,
124 .hw_ecc = 1,
125};
126
127static struct platform_device *platform_devices[] __initdata = {
128 &eukrea_cpuimx27_nor_mtd_device,
129 &mxc_fec_device,
130};
131
132static struct imxi2c_platform_data eukrea_cpuimx27_i2c_1_data = {
133 .bitrate = 100000,
134};
135
136static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
137 {
138 I2C_BOARD_INFO("rtc-pcf8563", 0x51),
139 .type = "pcf8563"
140 },
141};
142
143#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
144static struct plat_serial8250_port serial_platform_data[] = {
145 {
146 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x200000),
147 .irq = IRQ_GPIOB(23),
148 .uartclk = 14745600,
149 .regshift = 1,
150 .iotype = UPIO_MEM,
151 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
152 }, {
153 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x400000),
154 .irq = IRQ_GPIOB(22),
155 .uartclk = 14745600,
156 .regshift = 1,
157 .iotype = UPIO_MEM,
158 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
159 }, {
160 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x800000),
161 .irq = IRQ_GPIOB(27),
162 .uartclk = 14745600,
163 .regshift = 1,
164 .iotype = UPIO_MEM,
165 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
166 }, {
167 .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x1000000),
168 .irq = IRQ_GPIOB(30),
169 .uartclk = 14745600,
170 .regshift = 1,
171 .iotype = UPIO_MEM,
172 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
173 }, {
174 }
175};
176
177static struct platform_device serial_device = {
178 .name = "serial8250",
179 .id = 0,
180 .dev = {
181 .platform_data = serial_platform_data,
182 },
183};
184#endif
185
186static void __init eukrea_cpuimx27_init(void)
187{
188 mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
189 ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
190
191 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
192
193 mxc_register_device(&mxc_nand_device, &eukrea_cpuimx27_nand_board_info);
194
195 i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
196 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
197
198 mxc_register_device(&mxc_i2c_device0, &eukrea_cpuimx27_i2c_1_data);
199
200 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
201
202#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
203 /* SDHC2 can be used for Wifi */
204 mxc_register_device(&mxc_sdhc_device1, NULL);
205 /* in which case UART4 is also used for Bluetooth */
206 mxc_register_device(&mxc_uart_device3, &uart_pdata[1]);
207#endif
208
209#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
210 platform_device_register(&serial_device);
211#endif
212
213#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
214 eukrea_mbimx27_baseboard_init();
215#endif
216}
217
218static void __init eukrea_cpuimx27_timer_init(void)
219{
220 mx27_clocks_init(26000000);
221}
222
223static struct sys_timer eukrea_cpuimx27_timer = {
224 .init = eukrea_cpuimx27_timer_init,
225};
226
227MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
228 .phys_io = AIPI_BASE_ADDR,
229 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
230 .boot_params = PHYS_OFFSET + 0x100,
231 .map_io = mx27_map_io,
232 .init_irq = mx27_init_irq,
233 .init_machine = eukrea_cpuimx27_init,
234 .timer = &eukrea_cpuimx27_timer,
235MACHINE_END
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