Commit | Line | Data |
---|---|---|
80eedae6 JB |
1 | /* |
2 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
3 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | |
4 | * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | #include <linux/platform_device.h> | |
22 | #include <linux/mtd/mtd.h> | |
23 | #include <linux/mtd/map.h> | |
24 | #include <linux/mtd/partitions.h> | |
25 | #include <linux/mtd/physmap.h> | |
c981214a | 26 | #include <linux/i2c.h> |
60c24dc7 | 27 | #include <linux/irq.h> |
a09e64fb RK |
28 | #include <mach/common.h> |
29 | #include <mach/hardware.h> | |
80eedae6 JB |
30 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | |
32 | #include <asm/mach/time.h> | |
33 | #include <asm/mach/map.h> | |
a09e64fb RK |
34 | #include <mach/gpio.h> |
35 | #include <mach/imx-uart.h> | |
ccfe30a7 | 36 | #include <mach/iomux.h> |
a09e64fb | 37 | #include <mach/board-mx27ads.h> |
8d4fd258 | 38 | #include <mach/mxc_nand.h> |
c981214a | 39 | #include <mach/i2c.h> |
11cda13d | 40 | #include <mach/imxfb.h> |
60c24dc7 | 41 | #include <mach/mmc.h> |
80eedae6 | 42 | |
7e90534a SH |
43 | #include "devices.h" |
44 | ||
c1a6f123 VB |
45 | static unsigned int mx27ads_pins[] = { |
46 | /* UART0 */ | |
80eedae6 JB |
47 | PE12_PF_UART1_TXD, |
48 | PE13_PF_UART1_RXD, | |
49 | PE14_PF_UART1_CTS, | |
c1a6f123 VB |
50 | PE15_PF_UART1_RTS, |
51 | /* UART1 */ | |
80eedae6 JB |
52 | PE3_PF_UART2_CTS, |
53 | PE4_PF_UART2_RTS, | |
54 | PE6_PF_UART2_TXD, | |
c1a6f123 VB |
55 | PE7_PF_UART2_RXD, |
56 | /* UART2 */ | |
80eedae6 JB |
57 | PE8_PF_UART3_TXD, |
58 | PE9_PF_UART3_RXD, | |
59 | PE10_PF_UART3_CTS, | |
c1a6f123 VB |
60 | PE11_PF_UART3_RTS, |
61 | /* UART3 */ | |
80eedae6 JB |
62 | PB26_AF_UART4_RTS, |
63 | PB28_AF_UART4_TXD, | |
64 | PB29_AF_UART4_CTS, | |
c1a6f123 VB |
65 | PB31_AF_UART4_RXD, |
66 | /* UART4 */ | |
80eedae6 JB |
67 | PB18_AF_UART5_TXD, |
68 | PB19_AF_UART5_RXD, | |
69 | PB20_AF_UART5_CTS, | |
c1a6f123 VB |
70 | PB21_AF_UART5_RTS, |
71 | /* UART5 */ | |
80eedae6 JB |
72 | PB10_AF_UART6_TXD, |
73 | PB12_AF_UART6_CTS, | |
74 | PB11_AF_UART6_RXD, | |
c1a6f123 VB |
75 | PB13_AF_UART6_RTS, |
76 | /* FEC */ | |
80eedae6 JB |
77 | PD0_AIN_FEC_TXD0, |
78 | PD1_AIN_FEC_TXD1, | |
79 | PD2_AIN_FEC_TXD2, | |
80 | PD3_AIN_FEC_TXD3, | |
81 | PD4_AOUT_FEC_RX_ER, | |
82 | PD5_AOUT_FEC_RXD1, | |
83 | PD6_AOUT_FEC_RXD2, | |
84 | PD7_AOUT_FEC_RXD3, | |
85 | PD8_AF_FEC_MDIO, | |
86 | PD9_AIN_FEC_MDC, | |
87 | PD10_AOUT_FEC_CRS, | |
88 | PD11_AOUT_FEC_TX_CLK, | |
89 | PD12_AOUT_FEC_RXD0, | |
90 | PD13_AOUT_FEC_RX_DV, | |
ccfe30a7 | 91 | PD14_AOUT_FEC_RX_CLK, |
80eedae6 JB |
92 | PD15_AOUT_FEC_COL, |
93 | PD16_AIN_FEC_TX_ER, | |
c1a6f123 | 94 | PF23_AIN_FEC_TX_EN, |
c981214a VB |
95 | /* I2C2 */ |
96 | PC5_PF_I2C2_SDA, | |
97 | PC6_PF_I2C2_SCL, | |
11cda13d VB |
98 | /* FB */ |
99 | PA5_PF_LSCLK, | |
100 | PA6_PF_LD0, | |
101 | PA7_PF_LD1, | |
102 | PA8_PF_LD2, | |
103 | PA9_PF_LD3, | |
104 | PA10_PF_LD4, | |
105 | PA11_PF_LD5, | |
106 | PA12_PF_LD6, | |
107 | PA13_PF_LD7, | |
108 | PA14_PF_LD8, | |
109 | PA15_PF_LD9, | |
110 | PA16_PF_LD10, | |
111 | PA17_PF_LD11, | |
112 | PA18_PF_LD12, | |
113 | PA19_PF_LD13, | |
114 | PA20_PF_LD14, | |
115 | PA21_PF_LD15, | |
116 | PA22_PF_LD16, | |
117 | PA23_PF_LD17, | |
118 | PA24_PF_REV, | |
119 | PA25_PF_CLS, | |
120 | PA26_PF_PS, | |
121 | PA27_PF_SPL_SPR, | |
122 | PA28_PF_HSYNC, | |
123 | PA29_PF_VSYNC, | |
124 | PA30_PF_CONTRAST, | |
125 | PA31_PF_OE_ACD, | |
9366d8f6 VB |
126 | /* OWIRE */ |
127 | PE16_AF_OWIRE, | |
60c24dc7 VB |
128 | /* SDHC1*/ |
129 | PE18_PF_SD1_D0, | |
130 | PE19_PF_SD1_D1, | |
131 | PE20_PF_SD1_D2, | |
132 | PE21_PF_SD1_D3, | |
133 | PE22_PF_SD1_CMD, | |
134 | PE23_PF_SD1_CLK, | |
135 | /* SDHC2*/ | |
136 | PB4_PF_SD2_D0, | |
137 | PB5_PF_SD2_D1, | |
138 | PB6_PF_SD2_D2, | |
139 | PB7_PF_SD2_D3, | |
140 | PB8_PF_SD2_CMD, | |
141 | PB9_PF_SD2_CLK, | |
80eedae6 JB |
142 | }; |
143 | ||
8d4fd258 VB |
144 | static struct mxc_nand_platform_data mx27ads_nand_board_info = { |
145 | .width = 1, | |
146 | .hw_ecc = 1, | |
147 | }; | |
148 | ||
c1a6f123 VB |
149 | /* ADS's NOR flash */ |
150 | static struct physmap_flash_data mx27ads_flash_data = { | |
151 | .width = 2, | |
152 | }; | |
153 | ||
154 | static struct resource mx27ads_flash_resource = { | |
155 | .start = 0xc0000000, | |
156 | .end = 0xc0000000 + 0x02000000 - 1, | |
157 | .flags = IORESOURCE_MEM, | |
158 | ||
159 | }; | |
160 | ||
161 | static struct platform_device mx27ads_nor_mtd_device = { | |
162 | .name = "physmap-flash", | |
163 | .id = 0, | |
164 | .dev = { | |
165 | .platform_data = &mx27ads_flash_data, | |
166 | }, | |
167 | .num_resources = 1, | |
168 | .resource = &mx27ads_flash_resource, | |
169 | }; | |
170 | ||
c981214a VB |
171 | static struct imxi2c_platform_data mx27ads_i2c_data = { |
172 | .bitrate = 100000, | |
173 | }; | |
174 | ||
175 | static struct i2c_board_info mx27ads_i2c_devices[] = { | |
176 | }; | |
177 | ||
11cda13d VB |
178 | void lcd_power(int on) |
179 | { | |
180 | if (on) | |
181 | __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_SET_REG); | |
182 | else | |
183 | __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_CLEAR_REG); | |
184 | } | |
185 | ||
343684ff SH |
186 | static struct imx_fb_videomode mx27ads_modes[] = { |
187 | { | |
188 | .mode = { | |
189 | .name = "Sharp-LQ035Q7", | |
190 | .refresh = 60, | |
191 | .xres = 240, | |
192 | .yres = 320, | |
193 | .pixclock = 188679, /* in ps (5.3MHz) */ | |
194 | .hsync_len = 1, | |
195 | .left_margin = 9, | |
196 | .right_margin = 16, | |
197 | .vsync_len = 1, | |
198 | .upper_margin = 7, | |
199 | .lower_margin = 9, | |
200 | }, | |
201 | .bpp = 16, | |
202 | .pcr = 0xFB008BC0, | |
203 | }, | |
204 | }; | |
11cda13d | 205 | |
343684ff SH |
206 | static struct imx_fb_platform_data mx27ads_fb_data = { |
207 | .mode = mx27ads_modes, | |
208 | .num_modes = ARRAY_SIZE(mx27ads_modes), | |
11cda13d VB |
209 | |
210 | /* | |
211 | * - HSYNC active high | |
212 | * - VSYNC active high | |
213 | * - clk notenabled while idle | |
214 | * - clock inverted | |
215 | * - data not inverted | |
216 | * - data enable low active | |
217 | * - enable sharp mode | |
218 | */ | |
11cda13d VB |
219 | .pwmr = 0x00A903FF, |
220 | .lscr1 = 0x00120300, | |
221 | .dmacr = 0x00020010, | |
222 | ||
223 | .lcd_power = lcd_power, | |
224 | }; | |
225 | ||
60c24dc7 VB |
226 | static int mx27ads_sdhc1_init(struct device *dev, irq_handler_t detect_irq, |
227 | void *data) | |
228 | { | |
229 | return request_irq(IRQ_GPIOE(21), detect_irq, IRQF_TRIGGER_RISING, | |
230 | "sdhc1-card-detect", data); | |
231 | } | |
232 | ||
233 | static int mx27ads_sdhc2_init(struct device *dev, irq_handler_t detect_irq, | |
234 | void *data) | |
235 | { | |
236 | return request_irq(IRQ_GPIOB(7), detect_irq, IRQF_TRIGGER_RISING, | |
237 | "sdhc2-card-detect", data); | |
238 | } | |
239 | ||
240 | static void mx27ads_sdhc1_exit(struct device *dev, void *data) | |
241 | { | |
242 | free_irq(IRQ_GPIOE(21), data); | |
243 | } | |
244 | ||
245 | static void mx27ads_sdhc2_exit(struct device *dev, void *data) | |
246 | { | |
247 | free_irq(IRQ_GPIOB(7), data); | |
248 | } | |
249 | ||
250 | static struct imxmmc_platform_data sdhc1_pdata = { | |
251 | .init = mx27ads_sdhc1_init, | |
252 | .exit = mx27ads_sdhc1_exit, | |
253 | }; | |
254 | ||
255 | static struct imxmmc_platform_data sdhc2_pdata = { | |
256 | .init = mx27ads_sdhc2_init, | |
257 | .exit = mx27ads_sdhc2_exit, | |
258 | }; | |
259 | ||
c1a6f123 VB |
260 | static struct platform_device *platform_devices[] __initdata = { |
261 | &mx27ads_nor_mtd_device, | |
262 | &mxc_fec_device, | |
9366d8f6 | 263 | &mxc_w1_master_device, |
c1a6f123 | 264 | }; |
80eedae6 | 265 | |
80eedae6 JB |
266 | static struct imxuart_platform_data uart_pdata[] = { |
267 | { | |
80eedae6 JB |
268 | .flags = IMXUART_HAVE_RTSCTS, |
269 | }, { | |
80eedae6 JB |
270 | .flags = IMXUART_HAVE_RTSCTS, |
271 | }, { | |
80eedae6 JB |
272 | .flags = IMXUART_HAVE_RTSCTS, |
273 | }, { | |
80eedae6 JB |
274 | .flags = IMXUART_HAVE_RTSCTS, |
275 | }, { | |
80eedae6 JB |
276 | .flags = IMXUART_HAVE_RTSCTS, |
277 | }, { | |
80eedae6 JB |
278 | .flags = IMXUART_HAVE_RTSCTS, |
279 | }, | |
280 | }; | |
281 | ||
282 | static void __init mx27ads_board_init(void) | |
283 | { | |
c1a6f123 VB |
284 | mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins), |
285 | "mx27ads"); | |
80eedae6 | 286 | |
7e90534a SH |
287 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); |
288 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); | |
289 | mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); | |
290 | mxc_register_device(&mxc_uart_device3, &uart_pdata[3]); | |
291 | mxc_register_device(&mxc_uart_device4, &uart_pdata[4]); | |
292 | mxc_register_device(&mxc_uart_device5, &uart_pdata[5]); | |
8d4fd258 | 293 | mxc_register_device(&mxc_nand_device, &mx27ads_nand_board_info); |
c981214a VB |
294 | |
295 | /* only the i2c master 1 is used on this CPU card */ | |
296 | i2c_register_board_info(1, mx27ads_i2c_devices, | |
297 | ARRAY_SIZE(mx27ads_i2c_devices)); | |
298 | mxc_register_device(&mxc_i2c_device1, &mx27ads_i2c_data); | |
11cda13d | 299 | mxc_register_device(&mxc_fb_device, &mx27ads_fb_data); |
60c24dc7 VB |
300 | mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); |
301 | mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata); | |
80eedae6 JB |
302 | |
303 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | |
304 | } | |
305 | ||
306 | static void __init mx27ads_timer_init(void) | |
307 | { | |
308 | unsigned long fref = 26000000; | |
309 | ||
310 | if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0) | |
311 | fref = 27000000; | |
312 | ||
30c730f8 | 313 | mx27_clocks_init(fref); |
80eedae6 JB |
314 | } |
315 | ||
058b7a6f | 316 | static struct sys_timer mx27ads_timer = { |
80eedae6 JB |
317 | .init = mx27ads_timer_init, |
318 | }; | |
319 | ||
320 | static struct map_desc mx27ads_io_desc[] __initdata = { | |
321 | { | |
322 | .virtual = PBC_BASE_ADDRESS, | |
3f35d1f5 | 323 | .pfn = __phys_to_pfn(MX27_CS4_BASE_ADDR), |
80eedae6 JB |
324 | .length = SZ_1M, |
325 | .type = MT_DEVICE, | |
326 | }, | |
327 | }; | |
328 | ||
058b7a6f | 329 | static void __init mx27ads_map_io(void) |
80eedae6 | 330 | { |
cd4a05f9 | 331 | mx27_map_io(); |
80eedae6 JB |
332 | iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc)); |
333 | } | |
334 | ||
335 | MACHINE_START(MX27ADS, "Freescale i.MX27ADS") | |
336 | /* maintainer: Freescale Semiconductor, Inc. */ | |
3f35d1f5 UKK |
337 | .phys_io = MX27_AIPI_BASE_ADDR, |
338 | .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, | |
34101237 | 339 | .boot_params = MX27_PHYS_OFFSET + 0x100, |
80eedae6 | 340 | .map_io = mx27ads_map_io, |
c5aa0ad0 | 341 | .init_irq = mx27_init_irq, |
80eedae6 JB |
342 | .init_machine = mx27ads_board_init, |
343 | .timer = &mx27ads_timer, | |
344 | MACHINE_END | |
345 |