[deliverable/linux.git] / arch / arm / mach-mx2 / pcm038.c

/*
 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/io.h>
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/regulator/machine.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/irq.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>

#include <mach/board-pcm038.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/i2c.h>
#include <mach/iomux.h>
#include <mach/imx-uart.h>
#include <mach/mxc_nand.h>
#include <mach/spi.h>

#include "devices.h"

static int pcm038_pins[] = {
	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* UART2 */
	PE3_PF_UART2_CTS,
	PE4_PF_UART2_RTS,
	PE6_PF_UART2_TXD,
	PE7_PF_UART2_RXD,
	/* UART3 */
	PE8_PF_UART3_TXD,
	PE9_PF_UART3_RXD,
	PE10_PF_UART3_CTS,
	PE11_PF_UART3_RTS,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* I2C2 */
	PC5_PF_I2C2_SDA,
	PC6_PF_I2C2_SCL,
	/* SPI1 */
	PD25_PF_CSPI1_RDY,
	PD29_PF_CSPI1_SCLK,
	PD30_PF_CSPI1_MISO,
	PD31_PF_CSPI1_MOSI,
	/* SSI1 */
	PC20_PF_SSI1_FS,
	PC21_PF_SSI1_RXD,
	PC22_PF_SSI1_TXD,
	PC23_PF_SSI1_CLK,
	/* SSI4 */
	PC16_PF_SSI4_FS,
	PC17_PF_SSI4_RXD,
	PC18_PF_SSI4_TXD,
	PC19_PF_SSI4_CLK,
};

/*
 * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
 * 16 bit width
 */

static struct platdata_mtd_ram pcm038_sram_data = {
	.bankwidth = 2,
};

static struct resource pcm038_sram_resource = {
	.start = CS1_BASE_ADDR,
	.end   = CS1_BASE_ADDR + 512 * 1024 - 1,
	.flags = IORESOURCE_MEM,
};

static struct platform_device pcm038_sram_mtd_device = {
	.name = "mtd-ram",
	.id = 0,
	.dev = {
		.platform_data = &pcm038_sram_data,
	},
	.num_resources = 1,
	.resource = &pcm038_sram_resource,
};

/*
 * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
 * 16 bit width
 */
static struct physmap_flash_data pcm038_flash_data = {
	.width = 2,
};

static struct resource pcm038_flash_resource = {
	.start = 0xc0000000,
	.end   = 0xc1ffffff,
	.flags = IORESOURCE_MEM,
};

static struct platform_device pcm038_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &pcm038_flash_data,
	},
	.num_resources = 1,
	.resource = &pcm038_flash_resource,
};

static struct imxuart_platform_data uart_pdata[] = {
	{
		.flags = IMXUART_HAVE_RTSCTS,
	}, {
		.flags = IMXUART_HAVE_RTSCTS,
	}, {
		.flags = IMXUART_HAVE_RTSCTS,
	},
};

static struct mxc_nand_platform_data pcm038_nand_board_info = {
	.width = 1,
	.hw_ecc = 1,
};

static struct platform_device *platform_devices[] __initdata = {
	&pcm038_nor_mtd_device,
	&mxc_w1_master_device,
	&mxc_fec_device,
	&pcm038_sram_mtd_device,
};

/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
 * setup other stuffs to access the sram. */
static void __init pcm038_init_sram(void)
{
	__raw_writel(0x0000d843, CSCR_U(1));
	__raw_writel(0x22252521, CSCR_L(1));
	__raw_writel(0x22220a00, CSCR_A(1));
}

static struct imxi2c_platform_data pcm038_i2c_1_data = {
	.bitrate = 100000,
};

static struct at24_platform_data board_eeprom = {
	.byte_len = 4096,
	.page_size = 32,
	.flags = AT24_FLAG_ADDR16,
};

static struct i2c_board_info pcm038_i2c_devices[] = {
	{
		I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
		.platform_data = &board_eeprom,
	}, {
		I2C_BOARD_INFO("pcf8563", 0x51),
	}, {
		I2C_BOARD_INFO("lm75", 0x4a),
	}
};

static int pcm038_spi_cs[] = {GPIO_PORTD + 28};

static struct spi_imx_master pcm038_spi_0_data = {
	.chipselect = pcm038_spi_cs,
	.num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
};

static struct regulator_consumer_supply sdhc1_consumers[] = {
	{
		.dev	= &mxc_sdhc_device1.dev,
		.supply	= "sdhc_vcc",
	},
};

static struct regulator_init_data sdhc1_data = {
	.constraints = {
		.min_uV = 3000000,
		.max_uV = 3400000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
			REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
		.valid_modes_mask = REGULATOR_MODE_NORMAL |
			REGULATOR_MODE_FAST,
		.always_on = 0,
		.boot_on = 0,
	},
	.num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
	.consumer_supplies = sdhc1_consumers,
};

static struct regulator_consumer_supply cam_consumers[] = {
	{
		.dev	= NULL,
		.supply	= "imx_cam_vcc",
	},
};

static struct regulator_init_data cam_data = {
	.constraints = {
		.min_uV = 3000000,
		.max_uV = 3400000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
			REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
		.valid_modes_mask = REGULATOR_MODE_NORMAL |
			REGULATOR_MODE_FAST,
		.always_on = 0,
		.boot_on = 0,
	},
	.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
	.consumer_supplies = cam_consumers,
};

struct mc13783_regulator_init_data pcm038_regulators[] = {
	{
		.id = MC13783_REGU_VCAM,
		.init_data = &cam_data,
	}, {
		.id = MC13783_REGU_VMMC1,
		.init_data = &sdhc1_data,
	},
};

static struct mc13783_platform_data pcm038_pmic = {
	.regulators = pcm038_regulators,
	.num_regulators = ARRAY_SIZE(pcm038_regulators),
	.flags = MC13783_USE_ADC | MC13783_USE_REGULATOR |
		 MC13783_USE_TOUCHSCREEN,
};

static struct spi_board_info pcm038_spi_board_info[] __initdata = {
	{
		.modalias = "mc13783",
		.irq = IRQ_GPIOB(23),
		.max_speed_hz = 300000,
		.bus_num = 0,
		.chip_select = 0,
		.platform_data = &pcm038_pmic,
		.mode = SPI_CS_HIGH,
	}
};

static void __init pcm038_init(void)
{
	mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
			"PCM038");

	pcm038_init_sram();

	mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
	mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
	mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);

	mxc_gpio_mode(PE16_AF_OWIRE);
	mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info);

	/* only the i2c master 1 is used on this CPU card */
	i2c_register_board_info(1, pcm038_i2c_devices,
				ARRAY_SIZE(pcm038_i2c_devices));

	mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data);

	/* PE18 for user-LED D40 */
	mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);

	mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);

	/* MC13783 IRQ */
	mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);

	mxc_register_device(&mxc_spi_device0, &pcm038_spi_0_data);
	spi_register_board_info(pcm038_spi_board_info,
				ARRAY_SIZE(pcm038_spi_board_info));

	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));

#ifdef CONFIG_MACH_PCM970_BASEBOARD
	pcm970_baseboard_init();
#endif
}

static void __init pcm038_timer_init(void)
{
	mx27_clocks_init(26000000);
}

static struct sys_timer pcm038_timer = {
	.init = pcm038_timer_init,
};

MACHINE_START(PCM038, "phyCORE-i.MX27")
	.phys_io        = AIPI_BASE_ADDR,
	.io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
	.boot_params    = PHYS_OFFSET + 0x100,
	.map_io         = mx27_map_io,
	.init_irq       = mx27_init_irq,
	.init_machine   = pcm038_init,
	.timer          = &pcm038_timer,
MACHINE_END
Commit	Line	Data
7e5e9f54 JB	1	/*
	2	* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
	3	* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* as published by the Free Software Foundation; either version 2
	8	* of the License, or (at your option) any later version.
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	17	* MA 02110-1301, USA.
	18	*/
	19
a4e9a65a SH	20	#include <linux/i2c.h>
a4e9a65a SH	21	#include <linux/i2c/at24.h>
bff0b53b SH	22	#include <linux/io.h>
	23	#include <linux/mtd/plat-ram.h>
	24	#include <linux/mtd/physmap.h>
	25	#include <linux/platform_device.h>
61533841 SH	26	#include <linux/regulator/machine.h>
	27	#include <linux/mfd/mc13783.h>
	28	#include <linux/spi/spi.h>
	29	#include <linux/irq.h>
a4e9a65a	30
7e5e9f54	31	#include <asm/mach-types.h>
bff0b53b SH	32	#include <asm/mach/arch.h>
	33	#include <asm/mach/time.h>
	34
	35	#include <mach/board-pcm038.h>
a09e64fb RK	36	#include <mach/common.h>
a09e64fb RK	37	#include <mach/hardware.h>
a4e9a65a	38	#include <mach/i2c.h>
bff0b53b	39	#include <mach/iomux.h>
a09e64fb	40	#include <mach/imx-uart.h>
01f71a37	41	#include <mach/mxc_nand.h>
61533841	42	#include <mach/spi.h>
7e5e9f54	43
7e90534a SH	44	#include "devices.h"
7e90534a SH	45
f231ea44 SH	46	static int pcm038_pins[] = {
	47	/* UART1 */
	48	PE12_PF_UART1_TXD,
	49	PE13_PF_UART1_RXD,
	50	PE14_PF_UART1_CTS,
	51	PE15_PF_UART1_RTS,
	52	/* UART2 */
	53	PE3_PF_UART2_CTS,
	54	PE4_PF_UART2_RTS,
	55	PE6_PF_UART2_TXD,
	56	PE7_PF_UART2_RXD,
	57	/* UART3 */
	58	PE8_PF_UART3_TXD,
	59	PE9_PF_UART3_RXD,
	60	PE10_PF_UART3_CTS,
	61	PE11_PF_UART3_RTS,
	62	/* FEC */
	63	PD0_AIN_FEC_TXD0,
	64	PD1_AIN_FEC_TXD1,
	65	PD2_AIN_FEC_TXD2,
	66	PD3_AIN_FEC_TXD3,
	67	PD4_AOUT_FEC_RX_ER,
	68	PD5_AOUT_FEC_RXD1,
	69	PD6_AOUT_FEC_RXD2,
	70	PD7_AOUT_FEC_RXD3,
	71	PD8_AF_FEC_MDIO,
	72	PD9_AIN_FEC_MDC,
	73	PD10_AOUT_FEC_CRS,
	74	PD11_AOUT_FEC_TX_CLK,
	75	PD12_AOUT_FEC_RXD0,
	76	PD13_AOUT_FEC_RX_DV,
	77	PD14_AOUT_FEC_RX_CLK,
	78	PD15_AOUT_FEC_COL,
	79	PD16_AIN_FEC_TX_ER,
	80	PF23_AIN_FEC_TX_EN,
	81	/* I2C2 */
	82	PC5_PF_I2C2_SDA,
	83	PC6_PF_I2C2_SCL,
	84	/* SPI1 */
	85	PD25_PF_CSPI1_RDY,
f231ea44 SH	86	PD29_PF_CSPI1_SCLK,
	87	PD30_PF_CSPI1_MISO,
	88	PD31_PF_CSPI1_MOSI,
	89	/* SSI1 */
	90	PC20_PF_SSI1_FS,
	91	PC21_PF_SSI1_RXD,
	92	PC22_PF_SSI1_TXD,
	93	PC23_PF_SSI1_CLK,
	94	/* SSI4 */
	95	PC16_PF_SSI4_FS,
	96	PC17_PF_SSI4_RXD,
	97	PC18_PF_SSI4_TXD,
	98	PC19_PF_SSI4_CLK,
	99	};
	100
3620c0dc SH	101	/*
	102	* Phytec's PCM038 comes with 2MiB battery buffered SRAM,
	103	* 16 bit width
	104	*/
	105
	106	static struct platdata_mtd_ram pcm038_sram_data = {
	107	.bankwidth = 2,
	108	};
	109
	110	static struct resource pcm038_sram_resource = {
	111	.start = CS1_BASE_ADDR,
	112	.end = CS1_BASE_ADDR + 512 * 1024 - 1,
	113	.flags = IORESOURCE_MEM,
	114	};
	115
	116	static struct platform_device pcm038_sram_mtd_device = {
	117	.name = "mtd-ram",
	118	.id = 0,
	119	.dev = {
	120	.platform_data = &pcm038_sram_data,
	121	},
	122	.num_resources = 1,
	123	.resource = &pcm038_sram_resource,
	124	};
	125
7e5e9f54 JB	126	/*
	127	* Phytec's phyCORE-i.MX27 comes with 32MiB flash,
	128	* 16 bit width
	129	*/
	130	static struct physmap_flash_data pcm038_flash_data = {
	131	.width = 2,
	132	};
	133
	134	static struct resource pcm038_flash_resource = {
	135	.start = 0xc0000000,
	136	.end = 0xc1ffffff,
	137	.flags = IORESOURCE_MEM,
	138	};
	139
	140	static struct platform_device pcm038_nor_mtd_device = {
	141	.name = "physmap-flash",
	142	.id = 0,
	143	.dev = {
	144	.platform_data = &pcm038_flash_data,
	145	},
	146	.num_resources = 1,
	147	.resource = &pcm038_flash_resource,
	148	};
	149
7e5e9f54 JB	150	static struct imxuart_platform_data uart_pdata[] = {
7e5e9f54 JB	151	{
7e5e9f54 JB	152	.flags = IMXUART_HAVE_RTSCTS,
7e5e9f54 JB	153	}, {
7e5e9f54 JB	154	.flags = IMXUART_HAVE_RTSCTS,
7e5e9f54 JB	155	}, {
7e5e9f54 JB	156	.flags = IMXUART_HAVE_RTSCTS,
	157	},
	158	};
	159
01f71a37 SH	160	static struct mxc_nand_platform_data pcm038_nand_board_info = {
	161	.width = 1,
	162	.hw_ecc = 1,
	163	};
	164
7e5e9f54 JB	165	static struct platform_device *platform_devices[] __initdata = {
7e5e9f54 JB	166	&pcm038_nor_mtd_device,
d40a0992	167	&mxc_w1_master_device,
879fea1b	168	&mxc_fec_device,
3620c0dc	169	&pcm038_sram_mtd_device,
7e5e9f54 JB	170	};
7e5e9f54 JB	171
3620c0dc SH	172	/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
	173	* setup other stuffs to access the sram. */
	174	static void __init pcm038_init_sram(void)
	175	{
	176	__raw_writel(0x0000d843, CSCR_U(1));
	177	__raw_writel(0x22252521, CSCR_L(1));
	178	__raw_writel(0x22220a00, CSCR_A(1));
	179	}
	180
a4e9a65a SH	181	static struct imxi2c_platform_data pcm038_i2c_1_data = {
a4e9a65a SH	182	.bitrate = 100000,
a4e9a65a SH	183	};
	184
	185	static struct at24_platform_data board_eeprom = {
	186	.byte_len = 4096,
	187	.page_size = 32,
	188	.flags = AT24_FLAG_ADDR16,
	189	};
	190
	191	static struct i2c_board_info pcm038_i2c_devices[] = {
cf87a6e2	192	{
a4e9a65a SH	193	I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
a4e9a65a SH	194	.platform_data = &board_eeprom,
cf87a6e2 SH	195	}, {
	196	I2C_BOARD_INFO("pcf8563", 0x51),
	197	}, {
a4e9a65a	198	I2C_BOARD_INFO("lm75", 0x4a),
a4e9a65a SH	199	}
a4e9a65a SH	200	};
a4e9a65a	201
61533841 SH	202	static int pcm038_spi_cs[] = {GPIO_PORTD + 28};
	203
	204	static struct spi_imx_master pcm038_spi_0_data = {
	205	.chipselect = pcm038_spi_cs,
	206	.num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
	207	};
	208
	209	static struct regulator_consumer_supply sdhc1_consumers[] = {
	210	{
	211	.dev = &mxc_sdhc_device1.dev,
	212	.supply = "sdhc_vcc",
	213	},
	214	};
	215
	216	static struct regulator_init_data sdhc1_data = {
	217	.constraints = {
	218	.min_uV = 3000000,
	219	.max_uV = 3400000,
	220	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE \|
	221	REGULATOR_CHANGE_MODE \| REGULATOR_CHANGE_STATUS,
	222	.valid_modes_mask = REGULATOR_MODE_NORMAL \|
	223	REGULATOR_MODE_FAST,
	224	.always_on = 0,
	225	.boot_on = 0,
	226	},
	227	.num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
	228	.consumer_supplies = sdhc1_consumers,
	229	};
	230
	231	static struct regulator_consumer_supply cam_consumers[] = {
	232	{
	233	.dev = NULL,
	234	.supply = "imx_cam_vcc",
	235	},
	236	};
	237
	238	static struct regulator_init_data cam_data = {
	239	.constraints = {
	240	.min_uV = 3000000,
	241	.max_uV = 3400000,
	242	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE \|
	243	REGULATOR_CHANGE_MODE \| REGULATOR_CHANGE_STATUS,
	244	.valid_modes_mask = REGULATOR_MODE_NORMAL \|
	245	REGULATOR_MODE_FAST,
	246	.always_on = 0,
	247	.boot_on = 0,
	248	},
	249	.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
	250	.consumer_supplies = cam_consumers,
	251	};
	252
	253	struct mc13783_regulator_init_data pcm038_regulators[] = {
	254	{
	255	.id = MC13783_REGU_VCAM,
	256	.init_data = &cam_data,
	257	}, {
	258	.id = MC13783_REGU_VMMC1,
	259	.init_data = &sdhc1_data,
	260	},
	261	};
	262
	263	static struct mc13783_platform_data pcm038_pmic = {
	264	.regulators = pcm038_regulators,
	265	.num_regulators = ARRAY_SIZE(pcm038_regulators),
266	.flags = MC13783_USE_ADC \| MC13783_USE_REGULATOR \|
267	MC13783_USE_TOUCHSCREEN,
268	};
269
270	static struct spi_board_info pcm038_spi_board_info[] __initdata = {
271	{
272	.modalias = "mc13783",
273	.irq = IRQ_GPIOB(23),
274	.max_speed_hz = 300000,
275	.bus_num = 0,
276	.chip_select = 0,
277	.platform_data = &pcm038_pmic,
278	.mode = SPI_CS_HIGH,
279	}
280	};
281
7e5e9f54 JB	282	static void __init pcm038_init(void)
7e5e9f54 JB	283	{
f231ea44 SH	284	mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
	285	"PCM038");
	286
3620c0dc	287	pcm038_init_sram();
7e5e9f54	288
7e90534a SH	289	mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
	290	mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
	291	mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
01f71a37	292
ccfe30a7	293	mxc_gpio_mode(PE16_AF_OWIRE);
01f71a37	294	mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info);
7e5e9f54	295
a4e9a65a SH	296	/* only the i2c master 1 is used on this CPU card */
	297	i2c_register_board_info(1, pcm038_i2c_devices,
	298	ARRAY_SIZE(pcm038_i2c_devices));
	299
	300	mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data);
a4e9a65a	301
0160651a LF	302	/* PE18 for user-LED D40 */
	303	mxc_gpio_mode(GPIO_PORTE \| 18 \| GPIO_GPIO \| GPIO_OUT);
	304
61533841 SH	305	mxc_gpio_mode(GPIO_PORTD \| 28 \| GPIO_GPIO \| GPIO_OUT);
	306
	307	/* MC13783 IRQ */
	308	mxc_gpio_mode(GPIO_PORTB \| 23 \| GPIO_GPIO \| GPIO_IN);
	309
	310	mxc_register_device(&mxc_spi_device0, &pcm038_spi_0_data);
	311	spi_register_board_info(pcm038_spi_board_info,
	312	ARRAY_SIZE(pcm038_spi_board_info));
	313
7e5e9f54	314	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
ff6552e4 JB	315
	316	#ifdef CONFIG_MACH_PCM970_BASEBOARD
	317	pcm970_baseboard_init();
	318	#endif
7e5e9f54 JB	319	}
	320
	321	static void __init pcm038_timer_init(void)
	322	{
30c730f8	323	mx27_clocks_init(26000000);
7e5e9f54 JB	324	}
7e5e9f54 JB	325
058b7a6f	326	static struct sys_timer pcm038_timer = {
7e5e9f54 JB	327	.init = pcm038_timer_init,
	328	};
	329
	330	MACHINE_START(PCM038, "phyCORE-i.MX27")
	331	.phys_io = AIPI_BASE_ADDR,
	332	.io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
	333	.boot_params = PHYS_OFFSET + 0x100,
cd4a05f9	334	.map_io = mx27_map_io,
c5aa0ad0	335	.init_irq = mx27_init_irq,
7e5e9f54 JB	336	.init_machine = pcm038_init,
	337	.timer = &pcm038_timer,
	338	MACHINE_END