[deliverable/linux.git] / arch / arm / mach-mx3 / mach-mx31_3ds.c

/*
 *  Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/delay.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/regulator/machine.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
#include <mach/common.h>
#include <mach/iomux-mx3.h>
#include <mach/3ds_debugboard.h>

#include "devices-imx31.h"
#include "devices.h"

/* CPLD IRQ line for external uart, external ethernet etc */
#define EXPIO_PARENT_INT	IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)

/*
 * This file contains the board-specific initialization routines.
 */

static int mx31_3ds_pins[] = {
	/* UART1 */
	MX31_PIN_CTS1__CTS1,
	MX31_PIN_RTS1__RTS1,
	MX31_PIN_TXD1__TXD1,
	MX31_PIN_RXD1__RXD1,
	IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
	/* SPI 1 */
	MX31_PIN_CSPI2_SCLK__SCLK,
	MX31_PIN_CSPI2_MOSI__MOSI,
	MX31_PIN_CSPI2_MISO__MISO,
	MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
	MX31_PIN_CSPI2_SS0__SS0,
	MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
	/* MC13783 IRQ */
	IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
	/* USB OTG reset */
	IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
	/* USB OTG */
	MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
	MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
	MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
	MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
	MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
	MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
	MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
	MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
	MX31_PIN_USBOTG_CLK__USBOTG_CLK,
	MX31_PIN_USBOTG_DIR__USBOTG_DIR,
	MX31_PIN_USBOTG_NXT__USBOTG_NXT,
	MX31_PIN_USBOTG_STP__USBOTG_STP,
	/*Keyboard*/
	MX31_PIN_KEY_ROW0_KEY_ROW0,
	MX31_PIN_KEY_ROW1_KEY_ROW1,
	MX31_PIN_KEY_ROW2_KEY_ROW2,
	MX31_PIN_KEY_COL0_KEY_COL0,
	MX31_PIN_KEY_COL1_KEY_COL1,
	MX31_PIN_KEY_COL2_KEY_COL2,
	MX31_PIN_KEY_COL3_KEY_COL3,
};

/*
 * Matrix keyboard
 */

static const uint32_t mx31_3ds_keymap[] = {
	KEY(0, 0, KEY_UP),
	KEY(0, 1, KEY_DOWN),
	KEY(1, 0, KEY_RIGHT),
	KEY(1, 1, KEY_LEFT),
	KEY(1, 2, KEY_ENTER),
	KEY(2, 0, KEY_F6),
	KEY(2, 1, KEY_F8),
	KEY(2, 2, KEY_F9),
	KEY(2, 3, KEY_F10),
};

static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
	.keymap		= mx31_3ds_keymap,
	.keymap_size	= ARRAY_SIZE(mx31_3ds_keymap),
};

/* Regulators */
static struct regulator_init_data pwgtx_init = {
	.constraints = {
		.boot_on	= 1,
		.always_on	= 1,
	},
};

static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
	{
		.id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */
		.init_data = &pwgtx_init,
	}, {
		.id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */
		.init_data = &pwgtx_init,
	},
};

/* MC13783 */
static struct mc13783_platform_data mc13783_pdata __initdata = {
	.regulators = mx31_3ds_regulators,
	.num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
	.flags  = MC13783_USE_REGULATOR,
};

/* SPI */
static int spi1_internal_chipselect[] = {
	MXC_SPI_CS(0),
	MXC_SPI_CS(2),
};

static const struct spi_imx_master spi1_pdata __initconst = {
	.chipselect	= spi1_internal_chipselect,
	.num_chipselect	= ARRAY_SIZE(spi1_internal_chipselect),
};

static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
	{
		.modalias	= "mc13783",
		.max_speed_hz	= 1000000,
		.bus_num	= 1,
		.chip_select	= 1, /* SS2 */
		.platform_data	= &mc13783_pdata,
		.irq		= IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
		.mode = SPI_CS_HIGH,
	},
};

/*
 * NAND Flash
 */
static const struct mxc_nand_platform_data
mx31_3ds_nand_board_info __initconst = {
	.width		= 1,
	.hw_ecc		= 1,
#ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
	.flash_bbt	= 1,
#endif
};

/*
 * USB OTG
 */

#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
		     PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)

#define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)

static int mx31_3ds_usbotg_init(void)
{
	int err;

	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);

	err = gpio_request(USBOTG_RST_B, "otgusb-reset");
	if (err) {
		pr_err("Failed to request the USB OTG reset gpio\n");
		return err;
	}

	err = gpio_direction_output(USBOTG_RST_B, 0);
	if (err) {
		pr_err("Failed to drive the USB OTG reset gpio\n");
		goto usbotg_free_reset;
	}

	mdelay(1);
	gpio_set_value(USBOTG_RST_B, 1);
	return 0;

usbotg_free_reset:
	gpio_free(USBOTG_RST_B);
	return err;
}

static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
	.operating_mode = FSL_USB2_DR_DEVICE,
	.phy_mode	= FSL_USB2_PHY_ULPI,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

/*
 * Set up static virtual mappings.
 */
static void __init mx31_3ds_map_io(void)
{
	mx31_map_io();
}

/*!
 * Board specific initialization.
 */
static void __init mxc_board_init(void)
{
	mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
				      "mx31_3ds");

	imx31_add_imx_uart0(&uart_pdata);
	imx31_add_mxc_nand(&mx31_3ds_nand_board_info);

	imx31_add_spi_imx1(&spi1_pdata);
	spi_register_board_info(mx31_3ds_spi_devs,
						ARRAY_SIZE(mx31_3ds_spi_devs));

	imx31_add_imx_keypad(&mx31_3ds_keymap_data);

	mx31_3ds_usbotg_init();
	imx31_add_fsl_usb2_udc(&usbotg_pdata);

	if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT))
		printk(KERN_WARNING "Init of the debug board failed, all "
				    "devices on the debug board are unusable.\n");
}

static void __init mx31_3ds_timer_init(void)
{
	mx31_clocks_init(26000000);
}

static struct sys_timer mx31_3ds_timer = {
	.init	= mx31_3ds_timer_init,
};

/*
 * The following uses standard kernel macros defined in arch.h in order to
 * initialize __mach_desc_MX31_3DS data structure.
 */
MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
	/* Maintainer: Freescale Semiconductor, Inc. */
	.boot_params    = MX3x_PHYS_OFFSET + 0x100,
	.map_io         = mx31_3ds_map_io,
	.init_irq       = mx31_init_irq,
	.init_machine   = mxc_board_init,
	.timer          = &mx31_3ds_timer,
MACHINE_END
Commit	Line	Data
1553a1ec FE	1	/*
	2	* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
1553a1ec FE	13	*/
1553a1ec FE	14
a2ef4562	15	#include <linux/delay.h>
1553a1ec FE	16	#include <linux/types.h>
	17	#include <linux/init.h>
	18	#include <linux/clk.h>
	19	#include <linux/irq.h>
135cad36	20	#include <linux/gpio.h>
2b0c3677	21	#include <linux/platform_device.h>
ae7a3f13 AP	22	#include <linux/mfd/mc13783.h>
	23	#include <linux/spi/spi.h>
	24	#include <linux/regulator/machine.h>
1553a1ec FE	25
	26	#include <mach/hardware.h>
	27	#include <asm/mach-types.h>
	28	#include <asm/mach/arch.h>
	29	#include <asm/mach/time.h>
	30	#include <asm/memory.h>
	31	#include <asm/mach/map.h>
	32	#include <mach/common.h>
1553a1ec	33	#include <mach/iomux-mx3.h>
c5d38f08	34	#include <mach/3ds_debugboard.h>
a2ceeef5 UKK	35
a2ceeef5 UKK	36	#include "devices-imx31.h"
1553a1ec FE	37	#include "devices.h"
1553a1ec FE	38
b396dc45 UKK	39	/* CPLD IRQ line for external uart, external ethernet etc */
	40	#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
	41
b396dc45 UKK	42	/*
b396dc45 UKK	43	* This file contains the board-specific initialization routines.
1553a1ec FE	44	*/
1553a1ec FE	45
11a332ad	46	static int mx31_3ds_pins[] = {
153fa1d8	47	/* UART1 */
63d97667 VL	48	MX31_PIN_CTS1__CTS1,
	49	MX31_PIN_RTS1__RTS1,
	50	MX31_PIN_TXD1__TXD1,
135cad36 ML	51	MX31_PIN_RXD1__RXD1,
135cad36 ML	52	IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
a1ac4424 AP	53	/* SPI 1 */
	54	MX31_PIN_CSPI2_SCLK__SCLK,
	55	MX31_PIN_CSPI2_MOSI__MOSI,
	56	MX31_PIN_CSPI2_MISO__MISO,
	57	MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
	58	MX31_PIN_CSPI2_SS0__SS0,
	59	MX31_PIN_CSPI2_SS2__SS2, /CS for MC13783 /
ae7a3f13 AP	60	/* MC13783 IRQ */
ae7a3f13 AP	61	IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
a2ef4562 ML	62	/* USB OTG reset */
	63	IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
	64	/* USB OTG */
	65	MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
	66	MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
	67	MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
	68	MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
	69	MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
	70	MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
	71	MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
	72	MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
	73	MX31_PIN_USBOTG_CLK__USBOTG_CLK,
	74	MX31_PIN_USBOTG_DIR__USBOTG_DIR,
	75	MX31_PIN_USBOTG_NXT__USBOTG_NXT,
	76	MX31_PIN_USBOTG_STP__USBOTG_STP,
54c1f636 AP	77	/Keyboard/
	78	MX31_PIN_KEY_ROW0_KEY_ROW0,
	79	MX31_PIN_KEY_ROW1_KEY_ROW1,
	80	MX31_PIN_KEY_ROW2_KEY_ROW2,
	81	MX31_PIN_KEY_COL0_KEY_COL0,
	82	MX31_PIN_KEY_COL1_KEY_COL1,
	83	MX31_PIN_KEY_COL2_KEY_COL2,
	84	MX31_PIN_KEY_COL3_KEY_COL3,
	85	};
	86
	87	/*
	88	* Matrix keyboard
	89	*/
	90
	91	static const uint32_t mx31_3ds_keymap[] = {
	92	KEY(0, 0, KEY_UP),
	93	KEY(0, 1, KEY_DOWN),
	94	KEY(1, 0, KEY_RIGHT),
	95	KEY(1, 1, KEY_LEFT),
	96	KEY(1, 2, KEY_ENTER),
	97	KEY(2, 0, KEY_F6),
	98	KEY(2, 1, KEY_F8),
	99	KEY(2, 2, KEY_F9),
	100	KEY(2, 3, KEY_F10),
	101	};
	102
d690b4c4	103	static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
54c1f636 AP	104	.keymap = mx31_3ds_keymap,
54c1f636 AP	105	.keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
ae7a3f13 AP	106	};
	107
	108	/* Regulators */
	109	static struct regulator_init_data pwgtx_init = {
	110	.constraints = {
	111	.boot_on = 1,
	112	.always_on = 1,
	113	},
	114	};
	115
	116	static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
	117	{
	118	.id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */
	119	.init_data = &pwgtx_init,
	120	}, {
	121	.id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */
	122	.init_data = &pwgtx_init,
	123	},
	124	};
	125
	126	/* MC13783 */
	127	static struct mc13783_platform_data mc13783_pdata __initdata = {
	128	.regulators = mx31_3ds_regulators,
	129	.num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
	130	.flags = MC13783_USE_REGULATOR,
a1ac4424 AP	131	};
	132
	133	/* SPI */
	134	static int spi1_internal_chipselect[] = {
	135	MXC_SPI_CS(0),
	136	MXC_SPI_CS(2),
	137	};
	138
06606ff1	139	static const struct spi_imx_master spi1_pdata __initconst = {
a1ac4424 AP	140	.chipselect = spi1_internal_chipselect,
a1ac4424 AP	141	.num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
63d97667 VL	142	};
63d97667 VL	143
ae7a3f13 AP	144	static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
	145	{
	146	.modalias = "mc13783",
	147	.max_speed_hz = 1000000,
	148	.bus_num = 1,
	149	.chip_select = 1, /* SS2 */
	150	.platform_data = &mc13783_pdata,
	151	.irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
	152	.mode = SPI_CS_HIGH,
	153	},
	154	};
	155
a1b67b95 AP	156	/*
	157	* NAND Flash
	158	*/
a2ceeef5 UKK	159	static const struct mxc_nand_platform_data
a2ceeef5 UKK	160	mx31_3ds_nand_board_info __initconst = {
a1b67b95 AP	161	.width = 1,
	162	.hw_ecc = 1,
	163	#ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
	164	.flash_bbt = 1,
	165	#endif
	166	};
	167
a2ef4562 ML	168	/*
	169	* USB OTG
	170	*/
	171
	172	#define USB_PAD_CFG (PAD_CTL_DRV_MAX \| PAD_CTL_SRE_FAST \| PAD_CTL_HYS_CMOS \| \
	173	PAD_CTL_ODE_CMOS \| PAD_CTL_100K_PU)
	174
	175	#define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
	176
41f63475	177	static int mx31_3ds_usbotg_init(void)
a2ef4562	178	{
41f63475 FE	179	int err;
41f63475 FE	180
a2ef4562 ML	181	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
	182	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
	183	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
	184	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
	185	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
	186	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
	187	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
	188	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
	189	mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
	190	mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
	191	mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
	192	mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
	193
41f63475 FE	194	err = gpio_request(USBOTG_RST_B, "otgusb-reset");
	195	if (err) {
	196	pr_err("Failed to request the USB OTG reset gpio\n");
	197	return err;
	198	}
	199
	200	err = gpio_direction_output(USBOTG_RST_B, 0);
	201	if (err) {
	202	pr_err("Failed to drive the USB OTG reset gpio\n");
	203	goto usbotg_free_reset;
	204	}
	205
a2ef4562 ML	206	mdelay(1);
a2ef4562 ML	207	gpio_set_value(USBOTG_RST_B, 1);
41f63475 FE	208	return 0;
	209
	210	usbotg_free_reset:
	211	gpio_free(USBOTG_RST_B);
	212	return err;
a2ef4562 ML	213	}
a2ef4562 ML	214
9e1dde33	215	static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
a2ef4562 ML	216	.operating_mode = FSL_USB2_DR_DEVICE,
	217	.phy_mode = FSL_USB2_PHY_ULPI,
	218	};
	219
16cf5c41	220	static const struct imxuart_platform_data uart_pdata __initconst = {
153fa1d8 ML	221	.flags = IMXUART_HAVE_RTSCTS,
153fa1d8 ML	222	};
1553a1ec	223
135cad36 ML	224	/*
	225	* Set up static virtual mappings.
	226	*/
11a332ad	227	static void __init mx31_3ds_map_io(void)
135cad36 ML	228	{
135cad36 ML	229	mx31_map_io();
135cad36 ML	230	}
135cad36 ML	231
1553a1ec FE	232	/*!
	233	* Board specific initialization.
	234	*/
	235	static void __init mxc_board_init(void)
	236	{
11a332ad AP	237	mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
11a332ad AP	238	"mx31_3ds");
153fa1d8	239
16cf5c41	240	imx31_add_imx_uart0(&uart_pdata);
a2ceeef5	241	imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
ae7a3f13	242
4a74bddc	243	imx31_add_spi_imx1(&spi1_pdata);
ae7a3f13 AP	244	spi_register_board_info(mx31_3ds_spi_devs,
ae7a3f13 AP	245	ARRAY_SIZE(mx31_3ds_spi_devs));
135cad36	246
d690b4c4	247	imx31_add_imx_keypad(&mx31_3ds_keymap_data);
54c1f636	248
a2ef4562	249	mx31_3ds_usbotg_init();
9e1dde33	250	imx31_add_fsl_usb2_udc(&usbotg_pdata);
a2ef4562	251
b8be7b9a RP	252	if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT))
	253	printk(KERN_WARNING "Init of the debug board failed, all "
	254	"devices on the debug board are unusable.\n");
1553a1ec FE	255	}
1553a1ec FE	256
11a332ad	257	static void __init mx31_3ds_timer_init(void)
1553a1ec	258	{
30c730f8	259	mx31_clocks_init(26000000);
1553a1ec FE	260	}
1553a1ec FE	261
11a332ad AP	262	static struct sys_timer mx31_3ds_timer = {
11a332ad AP	263	.init = mx31_3ds_timer_init,
1553a1ec FE	264	};
	265
	266	/*
	267	* The following uses standard kernel macros defined in arch.h in order to
11a332ad	268	* initialize __mach_desc_MX31_3DS data structure.
1553a1ec FE	269	*/
	270	MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
	271	/* Maintainer: Freescale Semiconductor, Inc. */
34101237	272	.boot_params = MX3x_PHYS_OFFSET + 0x100,
11a332ad	273	.map_io = mx31_3ds_map_io,
c5aa0ad0	274	.init_irq = mx31_init_irq,
1553a1ec	275	.init_machine = mxc_board_init,
11a332ad	276	.timer = &mx31_3ds_timer,
1553a1ec	277	MACHINE_END