ARM i.MX ehci: do ehci init in board specific functions
[deliverable/linux.git] / arch / arm / mach-mx3 / mach-mx31lilly.c
CommitLineData
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1/*
2 * LILLY-1131 module support
3 *
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5 *
6 * based on code for other MX31 boards,
7 *
8 * Copyright 2005-2007 Freescale Semiconductor
9 * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
10 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
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21 */
22
23#include <linux/types.h>
24#include <linux/init.h>
25#include <linux/clk.h>
066fb847 26#include <linux/gpio.h>
4bd597b6 27#include <linux/delay.h>
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28#include <linux/platform_device.h>
29#include <linux/interrupt.h>
30#include <linux/smsc911x.h>
38160e0b 31#include <linux/mtd/physmap.h>
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32#include <linux/spi/spi.h>
33#include <linux/mfd/mc13783.h>
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34#include <linux/usb/otg.h>
35#include <linux/usb/ulpi.h>
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36
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/time.h>
40#include <asm/mach/map.h>
41
42#include <mach/hardware.h>
43#include <mach/common.h>
44#include <mach/iomux-mx3.h>
45#include <mach/board-mx31lilly.h>
066fb847 46#include <mach/ulpi.h>
65b1aa13 47
06606ff1 48#include "devices-imx31.h"
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49#include "devices.h"
50
51/*
52 * This file contains module-specific initialization routines for LILLY-1131.
53 * Initialization of peripherals found on the baseboard is implemented in the
54 * appropriate baseboard support code.
55 */
56
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57/* SMSC ethernet support */
58
59static struct resource smsc91x_resources[] = {
60 {
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61 .start = MX31_CS4_BASE_ADDR,
62 .end = MX31_CS4_BASE_ADDR + 0xffff,
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63 .flags = IORESOURCE_MEM,
64 },
65 {
66 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
67 .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
68 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
69 }
70};
71
72static struct smsc911x_platform_config smsc911x_config = {
73 .phy_interface = PHY_INTERFACE_MODE_MII,
74 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
75 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
76 .flags = SMSC911X_USE_32BIT |
77 SMSC911X_SAVE_MAC_ADDRESS |
78 SMSC911X_FORCE_INTERNAL_PHY,
79};
80
81static struct platform_device smsc91x_device = {
82 .name = "smsc911x",
83 .id = -1,
84 .num_resources = ARRAY_SIZE(smsc91x_resources),
85 .resource = smsc91x_resources,
86 .dev = {
87 .platform_data = &smsc911x_config,
88 }
89};
90
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91/* NOR flash */
92static struct physmap_flash_data nor_flash_data = {
93 .width = 2,
94};
95
96static struct resource nor_flash_resource = {
97 .start = 0xa0000000,
98 .end = 0xa1ffffff,
99 .flags = IORESOURCE_MEM,
100};
101
102static struct platform_device physmap_flash_device = {
103 .name = "physmap-flash",
104 .id = 0,
105 .dev = {
106 .platform_data = &nor_flash_data,
107 },
108 .resource = &nor_flash_resource,
109 .num_resources = 1,
110};
111
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112/* USB */
113
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114#if defined(CONFIG_USB_ULPI)
115
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116#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
117 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
118
119static int usbotg_init(struct platform_device *pdev)
120{
121 unsigned int pins[] = {
122 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
123 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
124 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
125 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
126 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
127 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
128 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
129 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
130 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
131 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
132 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
133 MX31_PIN_USBOTG_STP__USBOTG_STP,
134 };
135
136 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB OTG");
137
138 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
139 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
140 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
141 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
142 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
143 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
144 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
145 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
146 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
147 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
148 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
149 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
150
151 mxc_iomux_set_gpr(MUX_PGP_USB_4WIRE, true);
152 mxc_iomux_set_gpr(MUX_PGP_USB_COMMON, true);
153
154 /* chip select */
155 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE2, IOMUX_CONFIG_GPIO),
156 "USBOTG_CS");
157 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), "USBH1 CS");
158 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), 0);
159
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160 mdelay(10);
161
162 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
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163}
164
165static int usbh1_init(struct platform_device *pdev)
166{
167 int pins[] = {
168 MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
169 MX31_PIN_CSPI1_MISO__USBH1_RXDP,
170 MX31_PIN_CSPI1_SS0__USBH1_TXDM,
171 MX31_PIN_CSPI1_SS1__USBH1_TXDP,
172 MX31_PIN_CSPI1_SS2__USBH1_RCV,
173 MX31_PIN_CSPI1_SCLK__USBH1_OEB,
174 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS,
175 };
176
177 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1");
178
179 mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
180 mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
181 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
182 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
183 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
184 mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
185 mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
186
187 mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
188
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189 mdelay(10);
190
191 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
192 MXC_EHCI_INTERFACE_SINGLE_UNI);
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193}
194
195static int usbh2_init(struct platform_device *pdev)
196{
197 int pins[] = {
198 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
199 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
200 MX31_PIN_USBH2_CLK__USBH2_CLK,
201 MX31_PIN_USBH2_DIR__USBH2_DIR,
202 MX31_PIN_USBH2_NXT__USBH2_NXT,
203 MX31_PIN_USBH2_STP__USBH2_STP,
204 };
205
206 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
207
208 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
209 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
210 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
211 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
212 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
213 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
214 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
215 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
216 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
217 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
218 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
219 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
220
221 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
222
223 /* chip select */
224 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
225 "USBH2_CS");
226 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
227 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
228
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229 mdelay(10);
230
231 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
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232}
233
234static struct mxc_usbh_platform_data usbotg_pdata = {
235 .init = usbotg_init,
236 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
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237};
238
2d58de28 239static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {
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240 .init = usbh1_init,
241 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
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242};
243
2d58de28 244static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
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245 .init = usbh2_init,
246 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
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247};
248
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249static void lilly1131_usb_init(void)
250{
251 usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
13dd0c97 252 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
4d5d8590 253 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
13dd0c97 254 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
4d5d8590 255
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256 imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
257 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
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258}
259
260#else
261static inline void lilly1131_usb_init(void) {}
262#endif /* CONFIG_USB_ULPI */
cbaa6ca1 263
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264/* SPI */
265
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266static int spi_internal_chipselect[] = {
267 MXC_SPI_CS(0),
268 MXC_SPI_CS(1),
269 MXC_SPI_CS(2),
270};
271
06606ff1 272static const struct spi_imx_master spi0_pdata __initconst = {
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273 .chipselect = spi_internal_chipselect,
274 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
275};
276
06606ff1 277static const struct spi_imx_master spi1_pdata __initconst = {
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278 .chipselect = spi_internal_chipselect,
279 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
280};
281
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282static struct mc13xxx_platform_data mc13783_pdata __initdata = {
283 .flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
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284};
285
286static struct spi_board_info mc13783_dev __initdata = {
287 .modalias = "mc13783",
288 .max_speed_hz = 1000000,
289 .bus_num = 1,
290 .chip_select = 0,
291 .platform_data = &mc13783_pdata,
21b07344 292 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
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293};
294
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295static struct platform_device *devices[] __initdata = {
296 &smsc91x_device,
297 &physmap_flash_device,
298};
299
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300static int mx31lilly_baseboard;
301core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
302
303static void __init mx31lilly_board_init(void)
304{
305 switch (mx31lilly_baseboard) {
306 case MX31LILLY_NOBOARD:
307 break;
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308 case MX31LILLY_DB:
309 mx31lilly_db_init();
310 break;
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311 default:
312 printk(KERN_ERR "Illegal mx31lilly_baseboard type %d\n",
313 mx31lilly_baseboard);
314 }
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315
316 mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS");
317
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318 /* SPI */
319 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK");
320 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX");
321 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX");
322 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY");
323 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0");
324 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1");
325 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2");
326
327 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK");
328 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX");
329 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX");
330 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY");
331 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0");
332 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
333 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
334
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335 imx31_add_spi_imx0(&spi0_pdata);
336 imx31_add_spi_imx1(&spi1_pdata);
2cc32683 337 spi_register_board_info(&mc13783_dev, 1);
3ea2e1a4 338
cbaa6ca1 339 platform_add_devices(devices, ARRAY_SIZE(devices));
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340
341 /* USB */
4d5d8590 342 lilly1131_usb_init();
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343}
344
345static void __init mx31lilly_timer_init(void)
346{
347 mx31_clocks_init(26000000);
348}
349
350static struct sys_timer mx31lilly_timer = {
351 .init = mx31lilly_timer_init,
352};
353
354MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
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355 .boot_params = MX3x_PHYS_OFFSET + 0x100,
356 .map_io = mx31_map_io,
357 .init_early = imx31_init_early,
358 .init_irq = mx31_init_irq,
359 .timer = &mx31lilly_timer,
360 .init_machine = mx31lilly_board_init,
65b1aa13 361MACHINE_END
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