i.MX31ADS: Enable the first IMX serial port. (take 3)
[deliverable/linux.git] / arch / arm / mach-mx3 / mx31ads.c
CommitLineData
52c543f9
QJ
1/*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/types.h>
22#include <linux/init.h>
23#include <linux/clk.h>
24#include <linux/serial_8250.h>
25
a09e64fb 26#include <mach/hardware.h>
52c543f9
QJ
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
d0f349fb 29#include <asm/mach/time.h>
52c543f9
QJ
30#include <asm/memory.h>
31#include <asm/mach/map.h>
a09e64fb
RK
32#include <mach/common.h>
33#include <mach/board-mx31ads.h>
0741794c
GC
34#include <mach/imx-uart.h>
35#include <mach/iomux-mx3.h>
52c543f9
QJ
36
37/*!
38 * @file mx31ads.c
39 *
40 * @brief This file contains the board-specific initialization routines.
41 *
42 * @ingroup System
43 */
44
45#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
46/*!
47 * The serial port definition structure.
48 */
49static struct plat_serial8250_port serial_platform_data[] = {
50 {
51 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
52 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA),
53 .irq = EXPIO_INT_XUART_INTA,
54 .uartclk = 14745600,
55 .regshift = 0,
56 .iotype = UPIO_MEM,
57 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
58 }, {
59 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
60 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB),
61 .irq = EXPIO_INT_XUART_INTB,
62 .uartclk = 14745600,
63 .regshift = 0,
64 .iotype = UPIO_MEM,
65 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
66 },
67 {},
68};
69
70static struct platform_device serial_device = {
71 .name = "serial8250",
72 .id = 0,
73 .dev = {
74 .platform_data = serial_platform_data,
75 },
76};
77
78static int __init mxc_init_extuart(void)
79{
80 return platform_device_register(&serial_device);
81}
82#else
83static inline int mxc_init_extuart(void)
84{
85 return 0;
86}
87#endif
88
0741794c
GC
89#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
90static struct imxuart_platform_data uart_pdata = {
91 .flags = IMXUART_HAVE_RTSCTS,
92};
93
94static inline void mxc_init_imx_uart(void)
95{
96 mxc_iomux_mode(MX31_PIN_CTS1__CTS1);
97 mxc_iomux_mode(MX31_PIN_RTS1__RTS1);
98 mxc_iomux_mode(MX31_PIN_TXD1__TXD1);
99 mxc_iomux_mode(MX31_PIN_RXD1__RXD1);
100
101 mxc_register_device(&mxc_uart_device0, &uart_pdata);
102}
103#else /* !SERIAL_IMX */
104static inline void mxc_init_imx_uart(void)
105{
106}
107#endif /* !SERIAL_IMX */
108
52c543f9
QJ
109/*!
110 * This structure defines static mappings for the i.MX31ADS board.
111 */
112static struct map_desc mx31ads_io_desc[] __initdata = {
113 {
114 .virtual = AIPS1_BASE_ADDR_VIRT,
115 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
116 .length = AIPS1_SIZE,
117 .type = MT_NONSHARED_DEVICE
118 }, {
119 .virtual = SPBA0_BASE_ADDR_VIRT,
120 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
121 .length = SPBA0_SIZE,
122 .type = MT_NONSHARED_DEVICE
123 }, {
124 .virtual = AIPS2_BASE_ADDR_VIRT,
125 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
126 .length = AIPS2_SIZE,
127 .type = MT_NONSHARED_DEVICE
128 }, {
129 .virtual = CS4_BASE_ADDR_VIRT,
130 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
131 .length = CS4_SIZE / 2,
132 .type = MT_DEVICE
133 },
134};
135
136/*!
137 * Set up static virtual mappings.
138 */
139void __init mx31ads_map_io(void)
140{
141 mxc_map_io();
142 iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc));
143}
144
145/*!
146 * Board specific initialization.
147 */
148static void __init mxc_board_init(void)
149{
150 mxc_init_extuart();
0741794c 151 mxc_init_imx_uart();
52c543f9
QJ
152}
153
d0f349fb
JB
154static void __init mx31ads_timer_init(void)
155{
156 mxc_clocks_init(26000000);
157 mxc_timer_init("ipg_clk.0");
158}
159
160struct sys_timer mx31ads_timer = {
161 .init = mx31ads_timer_init,
162};
163
52c543f9
QJ
164/*
165 * The following uses standard kernel macros defined in arch.h in order to
166 * initialize __mach_desc_MX31ADS data structure.
167 */
168MACHINE_START(MX31ADS, "Freescale MX31ADS")
169 /* Maintainer: Freescale Semiconductor, Inc. */
170 .phys_io = AIPS1_BASE_ADDR,
171 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
172 .boot_params = PHYS_OFFSET + 0x100,
173 .map_io = mx31ads_map_io,
174 .init_irq = mxc_init_irq,
175 .init_machine = mxc_board_init,
d0f349fb 176 .timer = &mx31ads_timer,
52c543f9 177MACHINE_END
This page took 0.192579 seconds and 5 git commands to generate.