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9a4cd7a5 DM |
1 | /* |
2 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
3 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | |
4 | * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | #include <linux/types.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/kernel.h> | |
24 | #include <linux/memory.h> | |
3211705f ML |
25 | #include <linux/platform_device.h> |
26 | #include <linux/gpio.h> | |
27 | #include <linux/smsc911x.h> | |
9a4cd7a5 | 28 | |
a09e64fb | 29 | #include <mach/hardware.h> |
9a4cd7a5 DM |
30 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | |
9e8a30dc | 32 | #include <asm/mach/time.h> |
9a4cd7a5 | 33 | #include <asm/mach/map.h> |
a09e64fb | 34 | #include <mach/common.h> |
9a4cd7a5 DM |
35 | #include <asm/page.h> |
36 | #include <asm/setup.h> | |
a09e64fb | 37 | #include <mach/board-mx31lite.h> |
a854b8ab ML |
38 | #include <mach/imx-uart.h> |
39 | #include <mach/iomux-mx3.h> | |
3211705f | 40 | #include <mach/irqs.h> |
a854b8ab | 41 | #include "devices.h" |
9a4cd7a5 DM |
42 | |
43 | /* | |
44 | * This file contains the board-specific initialization routines. | |
45 | */ | |
46 | ||
a854b8ab ML |
47 | static unsigned int mx31lite_pins[] = { |
48 | /* UART1 */ | |
49 | MX31_PIN_CTS1__CTS1, | |
50 | MX31_PIN_RTS1__RTS1, | |
51 | MX31_PIN_TXD1__TXD1, | |
52 | MX31_PIN_RXD1__RXD1, | |
3211705f ML |
53 | /* LAN9117 IRQ pin */ |
54 | IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), | |
a854b8ab ML |
55 | }; |
56 | ||
57 | static struct imxuart_platform_data uart_pdata = { | |
58 | .flags = IMXUART_HAVE_RTSCTS, | |
59 | }; | |
60 | ||
3211705f ML |
61 | static struct smsc911x_platform_config smsc911x_config = { |
62 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | |
63 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
64 | .flags = SMSC911X_USE_16BIT, | |
65 | }; | |
66 | ||
67 | static struct resource smsc911x_resources[] = { | |
68 | [0] = { | |
69 | .start = CS4_BASE_ADDR, | |
70 | .end = CS4_BASE_ADDR + 0x100, | |
71 | .flags = IORESOURCE_MEM, | |
72 | }, | |
73 | [1] = { | |
74 | .start = IOMUX_TO_IRQ(MX31_PIN_SFS6), | |
75 | .end = IOMUX_TO_IRQ(MX31_PIN_SFS6), | |
76 | .flags = IORESOURCE_IRQ, | |
77 | }, | |
78 | }; | |
79 | ||
80 | static struct platform_device smsc911x_device = { | |
81 | .name = "smsc911x", | |
82 | .id = -1, | |
83 | .num_resources = ARRAY_SIZE(smsc911x_resources), | |
84 | .resource = smsc911x_resources, | |
85 | .dev = { | |
86 | .platform_data = &smsc911x_config, | |
87 | }, | |
88 | }; | |
89 | ||
9a4cd7a5 DM |
90 | /* |
91 | * This structure defines the MX31 memory map. | |
92 | */ | |
93 | static struct map_desc mx31lite_io_desc[] __initdata = { | |
94 | { | |
9a4cd7a5 DM |
95 | .virtual = SPBA0_BASE_ADDR_VIRT, |
96 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | |
97 | .length = SPBA0_SIZE, | |
9b727abd | 98 | .type = MT_DEVICE_NONSHARED |
9a4cd7a5 DM |
99 | }, { |
100 | .virtual = CS4_BASE_ADDR_VIRT, | |
101 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), | |
102 | .length = CS4_SIZE, | |
103 | .type = MT_DEVICE | |
104 | } | |
105 | }; | |
106 | ||
107 | /* | |
108 | * Set up static virtual mappings. | |
109 | */ | |
110 | void __init mx31lite_map_io(void) | |
111 | { | |
cd4a05f9 | 112 | mx31_map_io(); |
9a4cd7a5 DM |
113 | iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc)); |
114 | } | |
115 | ||
116 | /* | |
117 | * Board specific initialization. | |
118 | */ | |
119 | static void __init mxc_board_init(void) | |
120 | { | |
a854b8ab ML |
121 | mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins), |
122 | "mx31lite"); | |
123 | ||
124 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | |
3211705f ML |
125 | |
126 | /* SMSC9117 IRQ pin */ | |
127 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6)); | |
128 | platform_device_register(&smsc911x_device); | |
9a4cd7a5 DM |
129 | } |
130 | ||
9e8a30dc JB |
131 | static void __init mx31lite_timer_init(void) |
132 | { | |
30c730f8 | 133 | mx31_clocks_init(26000000); |
9e8a30dc JB |
134 | } |
135 | ||
136 | struct sys_timer mx31lite_timer = { | |
137 | .init = mx31lite_timer_init, | |
138 | }; | |
139 | ||
9a4cd7a5 DM |
140 | /* |
141 | * The following uses standard kernel macros defined in arch.h in order to | |
142 | * initialize __mach_desc_MX31LITE data structure. | |
143 | */ | |
144 | ||
145 | MACHINE_START(MX31LITE, "LogicPD MX31 LITEKIT") | |
146 | /* Maintainer: Freescale Semiconductor, Inc. */ | |
147 | .phys_io = AIPS1_BASE_ADDR, | |
148 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | |
149 | .boot_params = PHYS_OFFSET + 0x100, | |
150 | .map_io = mx31lite_map_io, | |
151 | .init_irq = mxc_init_irq, | |
152 | .init_machine = mxc_board_init, | |
9e8a30dc | 153 | .timer = &mx31lite_timer, |
9a4cd7a5 | 154 | MACHINE_END |