[deliverable/linux.git] / arch / arm / mach-mx3 / mx31moboard-devboard.c

/*
 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/types.h>

#include <linux/usb/otg.h>

#include <mach/common.h>
#include <mach/iomux-mx3.h>
#include <mach/hardware.h>
#include <mach/ulpi.h>

#include "devices-imx31.h"
#include "devices.h"

static unsigned int devboard_pins[] = {
	/* UART1 */
	MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
	MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
	/* SDHC2 */
	MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
	MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
	MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
	MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
	/* USB H1 */
	MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
	MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
	MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
	MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
	MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
	/* SEL */
	MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
	MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)

static int devboard_sdhc2_get_ro(struct device *dev)
{
	return !gpio_get_value(SDHC2_WP);
}

static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
		void *data)
{
	int ret;

	ret = gpio_request(SDHC2_CD, "sdhc-detect");
	if (ret)
		return ret;

	gpio_direction_input(SDHC2_CD);

	ret = gpio_request(SDHC2_WP, "sdhc-wp");
	if (ret)
		goto err_gpio_free;
	gpio_direction_input(SDHC2_WP);

	ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
		IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
		"sdhc2-card-detect", data);
	if (ret)
		goto err_gpio_free_2;

	return 0;

err_gpio_free_2:
	gpio_free(SDHC2_WP);
err_gpio_free:
	gpio_free(SDHC2_CD);

	return ret;
}

static void devboard_sdhc2_exit(struct device *dev, void *data)
{
	free_irq(gpio_to_irq(SDHC2_CD), data);
	gpio_free(SDHC2_WP);
	gpio_free(SDHC2_CD);
}

static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
	.get_ro	= devboard_sdhc2_get_ro,
	.init	= devboard_sdhc2_init,
	.exit	= devboard_sdhc2_exit,
};

#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)

static void devboard_init_sel_gpios(void)
{
	if (!gpio_request(SEL0, "sel0")) {
		gpio_direction_input(SEL0);
		gpio_export(SEL0, true);
	}

	if (!gpio_request(SEL1, "sel1")) {
		gpio_direction_input(SEL1);
		gpio_export(SEL1, true);
	}

	if (!gpio_request(SEL2, "sel2")) {
		gpio_direction_input(SEL2);
		gpio_export(SEL2, true);
	}

	if (!gpio_request(SEL3, "sel3")) {
		gpio_direction_input(SEL3);
		gpio_export(SEL3, true);
	}
}
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
			PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)

static int devboard_usbh1_hw_init(struct platform_device *pdev)
{
	mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);

	mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);

	mdelay(10);

	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
			MXC_EHCI_INTERFACE_SINGLE_UNI);
}

#define USBH1_VBUSEN_B	IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
#define USBH1_MODE	IOMUX_TO_GPIO(MX31_PIN_NFALE)

static int devboard_isp1105_init(struct otg_transceiver *otg)
{
	int ret = gpio_request(USBH1_MODE, "usbh1-mode");
	if (ret)
		return ret;
	/* single ended */
	gpio_direction_output(USBH1_MODE, 0);

	ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
	if (ret) {
		gpio_free(USBH1_MODE);
		return ret;
	}
	gpio_direction_output(USBH1_VBUSEN_B, 1);

	return 0;
}


static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on)
{
	if (on)
		gpio_set_value(USBH1_VBUSEN_B, 0);
	else
		gpio_set_value(USBH1_VBUSEN_B, 1);

	return 0;
}

static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
	.init	= devboard_usbh1_hw_init,
	.portsc	= MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
};

static int __init devboard_usbh1_init(void)
{
	struct otg_transceiver *otg;
	struct platform_device *pdev;

	otg = kzalloc(sizeof(*otg), GFP_KERNEL);
	if (!otg)
		return -ENOMEM;

	otg->label	= "ISP1105";
	otg->init	= devboard_isp1105_init;
	otg->set_vbus	= devboard_isp1105_set_vbus;

	usbh1_pdata.otg = otg;

	pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
	if (IS_ERR(pdev))
		return PTR_ERR(pdev);

	return 0;
}


static const struct fsl_usb2_platform_data usb_pdata __initconst = {
	.operating_mode	= FSL_USB2_DR_DEVICE,
	.phy_mode	= FSL_USB2_PHY_ULPI,
};

/*
 * system init for baseboard usage. Will be called by mx31moboard init.
 */
void __init mx31moboard_devboard_init(void)
{
	printk(KERN_INFO "Initializing mx31devboard peripherals\n");

	mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
		"devboard");

	imx31_add_imx_uart1(&uart_pdata);

	imx31_add_mxc_mmc(1, &sdhc2_pdata);

	devboard_init_sel_gpios();

	imx31_add_fsl_usb2_udc(&usb_pdata);

	devboard_usbh1_init();
}
Commit	Line	Data
e00f0b4a VL	1	/*
	2	* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
e00f0b4a VL	13	*/
e00f0b4a VL	14
45b131a7	15	#include <linux/gpio.h>
e00f0b4a	16	#include <linux/init.h>
45b131a7	17	#include <linux/interrupt.h>
4bd597b6	18	#include <linux/delay.h>
e00f0b4a	19	#include <linux/platform_device.h>
5a0e3ad6	20	#include <linux/slab.h>
220bbcea	21	#include <linux/types.h>
e00f0b4a	22
d67d1075 VL	23	#include <linux/usb/otg.h>
d67d1075 VL	24
e00f0b4a	25	#include <mach/common.h>
e00f0b4a	26	#include <mach/iomux-mx3.h>
220bbcea	27	#include <mach/hardware.h>
d67d1075	28	#include <mach/ulpi.h>
e00f0b4a	29
16cf5c41	30	#include "devices-imx31.h"
e00f0b4a VL	31	#include "devices.h"
e00f0b4a VL	32
220bbcea VL	33	static unsigned int devboard_pins[] = {
220bbcea VL	34	/* UART1 */
e00f0b4a VL	35	MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
e00f0b4a VL	36	MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
56c7a45b VL	37	/* SDHC2 */
	38	MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
	39	MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
	40	MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
	41	MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
d67d1075 VL	42	/* USB H1 */
	43	MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
	44	MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
	45	MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
	46	MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
	47	MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
e335c75c VL	48	/* SEL */
	49	MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
	50	MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
e00f0b4a VL	51	};
e00f0b4a VL	52
16cf5c41	53	static const struct imxuart_platform_data uart_pdata __initconst = {
220bbcea VL	54	.flags = IMXUART_HAVE_RTSCTS,
	55	};
	56
45b131a7 VL	57	#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
	58	#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
	59
	60	static int devboard_sdhc2_get_ro(struct device *dev)
	61	{
563abb4b	62	return !gpio_get_value(SDHC2_WP);
45b131a7 VL	63	}
	64
	65	static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
	66	void *data)
	67	{
4f163eb8 SH	68	int ret;
	69
	70	ret = gpio_request(SDHC2_CD, "sdhc-detect");
	71	if (ret)
	72	return ret;
	73
	74	gpio_direction_input(SDHC2_CD);
	75
	76	ret = gpio_request(SDHC2_WP, "sdhc-wp");
	77	if (ret)
	78	goto err_gpio_free;
	79	gpio_direction_input(SDHC2_WP);
	80
	81	ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
45b131a7 VL	82	IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING,
45b131a7 VL	83	"sdhc2-card-detect", data);
4f163eb8 SH	84	if (ret)
	85	goto err_gpio_free_2;
	86
	87	return 0;
	88
	89	err_gpio_free_2:
	90	gpio_free(SDHC2_WP);
	91	err_gpio_free:
	92	gpio_free(SDHC2_CD);
	93
	94	return ret;
45b131a7 VL	95	}
	96
	97	static void devboard_sdhc2_exit(struct device dev, void data)
	98	{
	99	free_irq(gpio_to_irq(SDHC2_CD), data);
4f163eb8 SH	100	gpio_free(SDHC2_WP);
4f163eb8 SH	101	gpio_free(SDHC2_CD);
45b131a7 VL	102	}
45b131a7 VL	103
6a697e3d	104	static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
45b131a7 VL	105	.get_ro = devboard_sdhc2_get_ro,
	106	.init = devboard_sdhc2_init,
	107	.exit = devboard_sdhc2_exit,
	108	};
	109
e335c75c VL	110	#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
	111	#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
	112	#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
	113	#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
	114
	115	static void devboard_init_sel_gpios(void)
	116	{
	117	if (!gpio_request(SEL0, "sel0")) {
	118	gpio_direction_input(SEL0);
	119	gpio_export(SEL0, true);
	120	}
	121
	122	if (!gpio_request(SEL1, "sel1")) {
	123	gpio_direction_input(SEL1);
	124	gpio_export(SEL1, true);
	125	}
	126
	127	if (!gpio_request(SEL2, "sel2")) {
	128	gpio_direction_input(SEL2);
	129	gpio_export(SEL2, true);
	130	}
	131
	132	if (!gpio_request(SEL3, "sel3")) {
	133	gpio_direction_input(SEL3);
	134	gpio_export(SEL3, true);
	135	}
	136	}
d67d1075 VL	137	#define USB_PAD_CFG (PAD_CTL_DRV_MAX \| PAD_CTL_SRE_FAST \| PAD_CTL_HYS_CMOS \| \
	138	PAD_CTL_ODE_CMOS \| PAD_CTL_100K_PU)
	139
	140	static int devboard_usbh1_hw_init(struct platform_device *pdev)
	141	{
	142	mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
	143
	144	mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
	145	mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
	146	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
	147	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
	148	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
	149	mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
	150	mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
	151	mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
	152
4bd597b6 SH	153	mdelay(10);
	154
	155	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED \|
	156	MXC_EHCI_INTERFACE_SINGLE_UNI);
d67d1075 VL	157	}
	158
	159	#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
	160	#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
	161
	162	static int devboard_isp1105_init(struct otg_transceiver *otg)
	163	{
	164	int ret = gpio_request(USBH1_MODE, "usbh1-mode");
	165	if (ret)
	166	return ret;
	167	/* single ended */
	168	gpio_direction_output(USBH1_MODE, 0);
	169
	170	ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
	171	if (ret) {
	172	gpio_free(USBH1_MODE);
	173	return ret;
	174	}
	175	gpio_direction_output(USBH1_VBUSEN_B, 1);
	176
	177	return 0;
	178	}
	179
	180
	181	static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on)
	182	{
	183	if (on)
	184	gpio_set_value(USBH1_VBUSEN_B, 0);
	185	else
	186	gpio_set_value(USBH1_VBUSEN_B, 1);
	187
	188	return 0;
	189	}
	190
2d58de28	191	static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
d67d1075 VL	192	.init = devboard_usbh1_hw_init,
d67d1075 VL	193	.portsc = MXC_EHCI_MODE_UTMI \| MXC_EHCI_SERIAL,
d67d1075 VL	194	};
	195
	196	static int __init devboard_usbh1_init(void)
	197	{
	198	struct otg_transceiver *otg;
2d58de28	199	struct platform_device *pdev;
d67d1075 VL	200
	201	otg = kzalloc(sizeof(*otg), GFP_KERNEL);
	202	if (!otg)
	203	return -ENOMEM;
	204
	205	otg->label = "ISP1105";
	206	otg->init = devboard_isp1105_init;
	207	otg->set_vbus = devboard_isp1105_set_vbus;
	208
	209	usbh1_pdata.otg = otg;
	210
2d58de28 UKK	211	pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
	212	if (IS_ERR(pdev))
	213	return PTR_ERR(pdev);
	214
	215	return 0;
d67d1075 VL	216	}
d67d1075 VL	217
66c202ad	218
9e1dde33	219	static const struct fsl_usb2_platform_data usb_pdata __initconst = {
66c202ad PR	220	.operating_mode = FSL_USB2_DR_DEVICE,
	221	.phy_mode = FSL_USB2_PHY_ULPI,
	222	};
	223
e00f0b4a VL	224	/*
	225	* system init for baseboard usage. Will be called by mx31moboard init.
	226	*/
	227	void __init mx31moboard_devboard_init(void)
	228	{
	229	printk(KERN_INFO "Initializing mx31devboard peripherals\n");
220bbcea VL	230
	231	mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
	232	"devboard");
	233
16cf5c41	234	imx31_add_imx_uart1(&uart_pdata);
45b131a7	235
6a697e3d	236	imx31_add_mxc_mmc(1, &sdhc2_pdata);
d67d1075	237
e335c75c VL	238	devboard_init_sel_gpios();
e335c75c VL	239
9e1dde33	240	imx31_add_fsl_usb2_udc(&usb_pdata);
66c202ad	241
d67d1075	242	devboard_usbh1_init();
e00f0b4a	243	}