Commit | Line | Data |
---|---|---|
988d2d49 VL |
1 | /* |
2 | * Copyright (C) 2008 Valentin Longchamp, EPFL Mobots group | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
b23f1534 | 19 | #include <linux/delay.h> |
04ea3c80 | 20 | #include <linux/dma-mapping.h> |
88b05647 | 21 | #include <linux/fsl_devices.h> |
45b131a7 | 22 | #include <linux/gpio.h> |
988d2d49 | 23 | #include <linux/init.h> |
45b131a7 | 24 | #include <linux/interrupt.h> |
77aa561d | 25 | #include <linux/leds.h> |
220bbcea | 26 | #include <linux/memory.h> |
988d2d49 VL |
27 | #include <linux/mtd/physmap.h> |
28 | #include <linux/mtd/partitions.h> | |
220bbcea | 29 | #include <linux/platform_device.h> |
65da9791 VL |
30 | #include <linux/regulator/machine.h> |
31 | #include <linux/mfd/mc13783.h> | |
32 | #include <linux/spi/spi.h> | |
220bbcea | 33 | #include <linux/types.h> |
988d2d49 | 34 | |
988d2d49 VL |
35 | #include <asm/mach-types.h> |
36 | #include <asm/mach/arch.h> | |
37 | #include <asm/mach/time.h> | |
38 | #include <asm/mach/map.h> | |
220bbcea | 39 | #include <mach/board-mx31moboard.h> |
988d2d49 | 40 | #include <mach/common.h> |
220bbcea | 41 | #include <mach/hardware.h> |
988d2d49 VL |
42 | #include <mach/imx-uart.h> |
43 | #include <mach/iomux-mx3.h> | |
4dd71293 | 44 | #include <mach/ipu.h> |
4ec6ecc7 | 45 | #include <mach/i2c.h> |
45b131a7 | 46 | #include <mach/mmc.h> |
65da9791 VL |
47 | #include <mach/mx3_camera.h> |
48 | #include <mach/spi.h> | |
988d2d49 VL |
49 | |
50 | #include "devices.h" | |
51 | ||
220bbcea VL |
52 | static unsigned int moboard_pins[] = { |
53 | /* UART0 */ | |
220bbcea | 54 | MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, |
421bf82e | 55 | MX31_PIN_CTS1__GPIO2_7, |
220bbcea VL |
56 | /* UART4 */ |
57 | MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, | |
58 | MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, | |
56c7a45b VL |
59 | /* I2C0 */ |
60 | MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL, | |
61 | /* I2C1 */ | |
62 | MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL, | |
63 | /* SDHC1 */ | |
64 | MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2, | |
65 | MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0, | |
66 | MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD, | |
67 | MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27, | |
b23f1534 VL |
68 | /* USB reset */ |
69 | MX31_PIN_GPIO1_0__GPIO1_0, | |
88b05647 VL |
70 | /* USB OTG */ |
71 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | |
72 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | |
73 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | |
74 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | |
75 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | |
76 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | |
77 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | |
78 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | |
79 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | |
80 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | |
81 | MX31_PIN_USB_OC__GPIO1_30, | |
77aa561d VL |
82 | /* LEDs */ |
83 | MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1, | |
84 | MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3, | |
8b1a540c VL |
85 | /* SEL */ |
86 | MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9, | |
87 | MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11, | |
65da9791 VL |
88 | /* SPI1 */ |
89 | MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO, | |
90 | MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, | |
91 | MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2, | |
92 | /* Atlas IRQ */ | |
93 | MX31_PIN_GPIO1_3__GPIO1_3, | |
94 | /* SPI2 */ | |
95 | MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO, | |
96 | MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY, | |
97 | MX31_PIN_CSPI2_SS1__CSPI3_SS1, | |
220bbcea VL |
98 | }; |
99 | ||
988d2d49 VL |
100 | static struct physmap_flash_data mx31moboard_flash_data = { |
101 | .width = 2, | |
102 | }; | |
103 | ||
104 | static struct resource mx31moboard_flash_resource = { | |
105 | .start = 0xa0000000, | |
106 | .end = 0xa1ffffff, | |
107 | .flags = IORESOURCE_MEM, | |
108 | }; | |
109 | ||
110 | static struct platform_device mx31moboard_flash = { | |
111 | .name = "physmap-flash", | |
112 | .id = 0, | |
113 | .dev = { | |
114 | .platform_data = &mx31moboard_flash_data, | |
115 | }, | |
116 | .resource = &mx31moboard_flash_resource, | |
117 | .num_resources = 1, | |
118 | }; | |
119 | ||
421bf82e VL |
120 | static int moboard_uart0_init(struct platform_device *pdev) |
121 | { | |
122 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack"); | |
123 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0); | |
124 | return 0; | |
125 | } | |
126 | ||
127 | static struct imxuart_platform_data uart0_pdata = { | |
128 | .init = moboard_uart0_init, | |
129 | }; | |
130 | ||
131 | static struct imxuart_platform_data uart4_pdata = { | |
988d2d49 VL |
132 | .flags = IMXUART_HAVE_RTSCTS, |
133 | }; | |
134 | ||
4ec6ecc7 VL |
135 | static struct imxi2c_platform_data moboard_i2c0_pdata = { |
136 | .bitrate = 400000, | |
137 | }; | |
138 | ||
139 | static struct imxi2c_platform_data moboard_i2c1_pdata = { | |
140 | .bitrate = 100000, | |
141 | }; | |
142 | ||
65da9791 VL |
143 | static int moboard_spi1_cs[] = { |
144 | MXC_SPI_CS(0), | |
145 | MXC_SPI_CS(2), | |
146 | }; | |
147 | ||
148 | static struct spi_imx_master moboard_spi1_master = { | |
149 | .chipselect = moboard_spi1_cs, | |
150 | .num_chipselect = ARRAY_SIZE(moboard_spi1_cs), | |
151 | }; | |
152 | ||
153 | static struct regulator_consumer_supply sdhc_consumers[] = { | |
154 | { | |
155 | .dev = &mxcsdhc_device0.dev, | |
156 | .supply = "sdhc0_vcc", | |
157 | }, | |
158 | { | |
159 | .dev = &mxcsdhc_device1.dev, | |
160 | .supply = "sdhc1_vcc", | |
161 | }, | |
162 | }; | |
163 | ||
164 | static struct regulator_init_data sdhc_vreg_data = { | |
165 | .constraints = { | |
166 | .min_uV = 2700000, | |
167 | .max_uV = 3000000, | |
168 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
169 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | |
170 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
171 | REGULATOR_MODE_FAST, | |
172 | .always_on = 0, | |
173 | .boot_on = 1, | |
174 | }, | |
175 | .num_consumer_supplies = ARRAY_SIZE(sdhc_consumers), | |
176 | .consumer_supplies = sdhc_consumers, | |
177 | }; | |
178 | ||
179 | static struct regulator_consumer_supply cam_consumers[] = { | |
180 | { | |
181 | .dev = &mx3_camera.dev, | |
182 | .supply = "cam_vcc", | |
183 | }, | |
184 | }; | |
185 | ||
186 | static struct regulator_init_data cam_vreg_data = { | |
187 | .constraints = { | |
188 | .min_uV = 2700000, | |
189 | .max_uV = 3000000, | |
190 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
191 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | |
192 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
193 | REGULATOR_MODE_FAST, | |
194 | .always_on = 0, | |
195 | .boot_on = 1, | |
196 | }, | |
197 | .num_consumer_supplies = ARRAY_SIZE(cam_consumers), | |
198 | .consumer_supplies = cam_consumers, | |
199 | }; | |
200 | ||
201 | static struct mc13783_regulator_init_data moboard_regulators[] = { | |
202 | { | |
203 | .id = MC13783_REGU_VMMC1, | |
204 | .init_data = &sdhc_vreg_data, | |
205 | }, | |
206 | { | |
207 | .id = MC13783_REGU_VCAM, | |
208 | .init_data = &cam_vreg_data, | |
209 | }, | |
210 | }; | |
211 | ||
212 | static struct mc13783_platform_data moboard_pmic = { | |
213 | .regulators = moboard_regulators, | |
214 | .num_regulators = ARRAY_SIZE(moboard_regulators), | |
215 | .flags = MC13783_USE_REGULATOR | MC13783_USE_RTC, | |
33c4d919 | 216 | MC13783_USE_ADC, |
65da9791 VL |
217 | }; |
218 | ||
219 | static struct spi_board_info moboard_spi_board_info[] __initdata = { | |
220 | { | |
221 | .modalias = "mc13783", | |
222 | .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), | |
223 | .max_speed_hz = 300000, | |
224 | .bus_num = 1, | |
225 | .chip_select = 0, | |
226 | .platform_data = &moboard_pmic, | |
227 | .mode = SPI_CS_HIGH, | |
228 | }, | |
65da9791 VL |
229 | }; |
230 | ||
231 | static int moboard_spi2_cs[] = { | |
232 | MXC_SPI_CS(1), | |
233 | }; | |
234 | ||
235 | static struct spi_imx_master moboard_spi2_master = { | |
236 | .chipselect = moboard_spi2_cs, | |
237 | .num_chipselect = ARRAY_SIZE(moboard_spi2_cs), | |
238 | }; | |
239 | ||
45b131a7 VL |
240 | #define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) |
241 | #define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1) | |
242 | ||
243 | static int moboard_sdhc1_get_ro(struct device *dev) | |
244 | { | |
563abb4b | 245 | return !gpio_get_value(SDHC1_WP); |
45b131a7 VL |
246 | } |
247 | ||
248 | static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq, | |
249 | void *data) | |
250 | { | |
4f163eb8 SH |
251 | int ret; |
252 | ||
253 | ret = gpio_request(SDHC1_CD, "sdhc-detect"); | |
254 | if (ret) | |
255 | return ret; | |
256 | ||
257 | gpio_direction_input(SDHC1_CD); | |
258 | ||
259 | ret = gpio_request(SDHC1_WP, "sdhc-wp"); | |
260 | if (ret) | |
261 | goto err_gpio_free; | |
262 | gpio_direction_input(SDHC1_WP); | |
263 | ||
264 | ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq, | |
45b131a7 VL |
265 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
266 | "sdhc1-card-detect", data); | |
4f163eb8 SH |
267 | if (ret) |
268 | goto err_gpio_free_2; | |
269 | ||
270 | return 0; | |
271 | ||
272 | err_gpio_free_2: | |
273 | gpio_free(SDHC1_WP); | |
274 | err_gpio_free: | |
275 | gpio_free(SDHC1_CD); | |
276 | ||
277 | return ret; | |
45b131a7 VL |
278 | } |
279 | ||
280 | static void moboard_sdhc1_exit(struct device *dev, void *data) | |
281 | { | |
282 | free_irq(gpio_to_irq(SDHC1_CD), data); | |
4f163eb8 SH |
283 | gpio_free(SDHC1_WP); |
284 | gpio_free(SDHC1_CD); | |
45b131a7 VL |
285 | } |
286 | ||
287 | static struct imxmmc_platform_data sdhc1_pdata = { | |
288 | .get_ro = moboard_sdhc1_get_ro, | |
289 | .init = moboard_sdhc1_init, | |
290 | .exit = moboard_sdhc1_exit, | |
291 | }; | |
292 | ||
b23f1534 VL |
293 | /* |
294 | * this pin is dedicated for all mx31moboard systems, so we do it here | |
295 | */ | |
296 | #define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0) | |
297 | ||
298 | static void usb_xcvr_reset(void) | |
299 | { | |
300 | gpio_request(USB_RESET_B, "usb-reset"); | |
301 | gpio_direction_output(USB_RESET_B, 0); | |
302 | mdelay(1); | |
303 | gpio_set_value(USB_RESET_B, 1); | |
304 | } | |
305 | ||
88b05647 VL |
306 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ |
307 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | |
308 | ||
309 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | |
310 | ||
311 | static void moboard_usbotg_init(void) | |
312 | { | |
313 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); | |
314 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | |
315 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | |
316 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | |
317 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | |
318 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | |
319 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | |
320 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | |
321 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | |
322 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | |
323 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | |
324 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | |
325 | ||
326 | gpio_request(OTG_EN_B, "usb-udc-en"); | |
327 | gpio_direction_output(OTG_EN_B, 0); | |
328 | } | |
329 | ||
330 | static struct fsl_usb2_platform_data usb_pdata = { | |
331 | .operating_mode = FSL_USB2_DR_DEVICE, | |
332 | .phy_mode = FSL_USB2_PHY_ULPI, | |
333 | }; | |
334 | ||
77aa561d VL |
335 | static struct gpio_led mx31moboard_leds[] = { |
336 | { | |
337 | .name = "coreboard-led-0:red:running", | |
338 | .default_trigger = "heartbeat", | |
339 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0), | |
340 | }, { | |
341 | .name = "coreboard-led-1:red", | |
342 | .gpio = IOMUX_TO_GPIO(MX31_PIN_STX0), | |
343 | }, { | |
344 | .name = "coreboard-led-2:red", | |
345 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SRX0), | |
346 | }, { | |
347 | .name = "coreboard-led-3:red", | |
348 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SIMPD0), | |
349 | }, | |
350 | }; | |
351 | ||
352 | static struct gpio_led_platform_data mx31moboard_led_pdata = { | |
353 | .num_leds = ARRAY_SIZE(mx31moboard_leds), | |
354 | .leds = mx31moboard_leds, | |
355 | }; | |
356 | ||
357 | static struct platform_device mx31moboard_leds_device = { | |
358 | .name = "leds-gpio", | |
359 | .id = -1, | |
360 | .dev = { | |
361 | .platform_data = &mx31moboard_led_pdata, | |
362 | }, | |
363 | }; | |
364 | ||
8b1a540c VL |
365 | #define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1) |
366 | #define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1) | |
367 | #define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1) | |
368 | #define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1) | |
369 | ||
370 | static void mx31moboard_init_sel_gpios(void) | |
371 | { | |
372 | if (!gpio_request(SEL0, "sel0")) { | |
373 | gpio_direction_input(SEL0); | |
374 | gpio_export(SEL0, true); | |
375 | } | |
376 | ||
377 | if (!gpio_request(SEL1, "sel1")) { | |
378 | gpio_direction_input(SEL1); | |
379 | gpio_export(SEL1, true); | |
380 | } | |
381 | ||
382 | if (!gpio_request(SEL2, "sel2")) { | |
383 | gpio_direction_input(SEL2); | |
384 | gpio_export(SEL2, true); | |
385 | } | |
386 | ||
387 | if (!gpio_request(SEL3, "sel3")) { | |
388 | gpio_direction_input(SEL3); | |
389 | gpio_export(SEL3, true); | |
390 | } | |
391 | } | |
392 | ||
4dd71293 VL |
393 | static struct ipu_platform_data mx3_ipu_data = { |
394 | .irq_base = MXC_IPU_IRQ_START, | |
395 | }; | |
396 | ||
988d2d49 VL |
397 | static struct platform_device *devices[] __initdata = { |
398 | &mx31moboard_flash, | |
77aa561d | 399 | &mx31moboard_leds_device, |
988d2d49 VL |
400 | }; |
401 | ||
04ea3c80 VL |
402 | static struct mx3_camera_pdata camera_pdata = { |
403 | .dma_dev = &mx3_ipu.dev, | |
404 | .flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10, | |
405 | .mclk_10khz = 4800, | |
406 | }; | |
407 | ||
408 | #define CAMERA_BUF_SIZE (4*1024*1024) | |
409 | ||
410 | static int __init mx31moboard_cam_alloc_dma(const size_t buf_size) | |
411 | { | |
412 | dma_addr_t dma_handle; | |
413 | void *buf; | |
414 | int dma; | |
415 | ||
416 | if (buf_size < 2 * 1024 * 1024) | |
417 | return -EINVAL; | |
418 | ||
419 | buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL); | |
420 | if (!buf) { | |
421 | pr_err("%s: cannot allocate camera buffer-memory\n", __func__); | |
422 | return -ENOMEM; | |
423 | } | |
424 | ||
425 | memset(buf, 0, buf_size); | |
426 | ||
427 | dma = dma_declare_coherent_memory(&mx3_camera.dev, | |
428 | dma_handle, dma_handle, buf_size, | |
429 | DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE); | |
430 | ||
431 | /* The way we call dma_declare_coherent_memory only a malloc can fail */ | |
432 | return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM; | |
433 | } | |
434 | ||
e00f0b4a VL |
435 | static int mx31moboard_baseboard; |
436 | core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); | |
437 | ||
988d2d49 VL |
438 | /* |
439 | * Board specific initialization. | |
440 | */ | |
441 | static void __init mxc_board_init(void) | |
442 | { | |
220bbcea VL |
443 | mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins), |
444 | "moboard"); | |
445 | ||
988d2d49 VL |
446 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
447 | ||
421bf82e VL |
448 | mxc_register_device(&mxc_uart_device0, &uart0_pdata); |
449 | ||
450 | mxc_register_device(&mxc_uart_device4, &uart4_pdata); | |
e00f0b4a | 451 | |
8b1a540c VL |
452 | mx31moboard_init_sel_gpios(); |
453 | ||
4ec6ecc7 VL |
454 | mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); |
455 | mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); | |
456 | ||
65da9791 VL |
457 | mxc_register_device(&mxc_spi_device1, &moboard_spi1_master); |
458 | mxc_register_device(&mxc_spi_device2, &moboard_spi2_master); | |
459 | ||
460 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq"); | |
461 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); | |
462 | spi_register_board_info(moboard_spi_board_info, | |
463 | ARRAY_SIZE(moboard_spi_board_info)); | |
464 | ||
45b131a7 VL |
465 | mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata); |
466 | ||
4dd71293 | 467 | mxc_register_device(&mx3_ipu, &mx3_ipu_data); |
04ea3c80 VL |
468 | if (!mx31moboard_cam_alloc_dma(CAMERA_BUF_SIZE)) |
469 | mxc_register_device(&mx3_camera, &camera_pdata); | |
4dd71293 | 470 | |
b23f1534 VL |
471 | usb_xcvr_reset(); |
472 | ||
88b05647 VL |
473 | moboard_usbotg_init(); |
474 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | |
475 | ||
e00f0b4a VL |
476 | switch (mx31moboard_baseboard) { |
477 | case MX31NOBOARD: | |
478 | break; | |
479 | case MX31DEVBOARD: | |
480 | mx31moboard_devboard_init(); | |
481 | break; | |
482 | case MX31MARXBOT: | |
483 | mx31moboard_marxbot_init(); | |
484 | break; | |
485 | default: | |
220bbcea VL |
486 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", |
487 | mx31moboard_baseboard); | |
e00f0b4a | 488 | } |
988d2d49 VL |
489 | } |
490 | ||
988d2d49 VL |
491 | static void __init mx31moboard_timer_init(void) |
492 | { | |
30c730f8 | 493 | mx31_clocks_init(26000000); |
988d2d49 VL |
494 | } |
495 | ||
496 | struct sys_timer mx31moboard_timer = { | |
497 | .init = mx31moboard_timer_init, | |
498 | }; | |
499 | ||
500 | MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") | |
501 | /* Maintainer: Valentin Longchamp, EPFL Mobots group */ | |
502 | .phys_io = AIPS1_BASE_ADDR, | |
503 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | |
504 | .boot_params = PHYS_OFFSET + 0x100, | |
cd4a05f9 | 505 | .map_io = mx31_map_io, |
c5aa0ad0 | 506 | .init_irq = mx31_init_irq, |
988d2d49 VL |
507 | .init_machine = mxc_board_init, |
508 | .timer = &mx31moboard_timer, | |
509 | MACHINE_END | |
510 |