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988d2d49 VL |
1 | /* |
2 | * Copyright (C) 2008 Valentin Longchamp, EPFL Mobots group | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
b23f1534 | 19 | #include <linux/delay.h> |
88b05647 | 20 | #include <linux/fsl_devices.h> |
45b131a7 | 21 | #include <linux/gpio.h> |
988d2d49 | 22 | #include <linux/init.h> |
45b131a7 | 23 | #include <linux/interrupt.h> |
220bbcea | 24 | #include <linux/memory.h> |
988d2d49 VL |
25 | #include <linux/mtd/physmap.h> |
26 | #include <linux/mtd/partitions.h> | |
220bbcea VL |
27 | #include <linux/platform_device.h> |
28 | #include <linux/types.h> | |
988d2d49 | 29 | |
988d2d49 VL |
30 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | |
32 | #include <asm/mach/time.h> | |
33 | #include <asm/mach/map.h> | |
220bbcea | 34 | #include <mach/board-mx31moboard.h> |
988d2d49 | 35 | #include <mach/common.h> |
220bbcea | 36 | #include <mach/hardware.h> |
988d2d49 VL |
37 | #include <mach/imx-uart.h> |
38 | #include <mach/iomux-mx3.h> | |
4ec6ecc7 | 39 | #include <mach/i2c.h> |
45b131a7 | 40 | #include <mach/mmc.h> |
c5aa0ad0 | 41 | #include <mach/mx31.h> |
988d2d49 VL |
42 | |
43 | #include "devices.h" | |
44 | ||
220bbcea VL |
45 | static unsigned int moboard_pins[] = { |
46 | /* UART0 */ | |
47 | MX31_PIN_CTS1__CTS1, MX31_PIN_RTS1__RTS1, | |
48 | MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, | |
49 | /* UART4 */ | |
50 | MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, | |
51 | MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, | |
56c7a45b VL |
52 | /* I2C0 */ |
53 | MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL, | |
54 | /* I2C1 */ | |
55 | MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL, | |
56 | /* SDHC1 */ | |
57 | MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2, | |
58 | MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0, | |
59 | MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD, | |
60 | MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27, | |
b23f1534 VL |
61 | /* USB reset */ |
62 | MX31_PIN_GPIO1_0__GPIO1_0, | |
88b05647 VL |
63 | /* USB OTG */ |
64 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | |
65 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | |
66 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | |
67 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | |
68 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | |
69 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | |
70 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | |
71 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | |
72 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | |
73 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | |
74 | MX31_PIN_USB_OC__GPIO1_30, | |
220bbcea VL |
75 | }; |
76 | ||
988d2d49 VL |
77 | static struct physmap_flash_data mx31moboard_flash_data = { |
78 | .width = 2, | |
79 | }; | |
80 | ||
81 | static struct resource mx31moboard_flash_resource = { | |
82 | .start = 0xa0000000, | |
83 | .end = 0xa1ffffff, | |
84 | .flags = IORESOURCE_MEM, | |
85 | }; | |
86 | ||
87 | static struct platform_device mx31moboard_flash = { | |
88 | .name = "physmap-flash", | |
89 | .id = 0, | |
90 | .dev = { | |
91 | .platform_data = &mx31moboard_flash_data, | |
92 | }, | |
93 | .resource = &mx31moboard_flash_resource, | |
94 | .num_resources = 1, | |
95 | }; | |
96 | ||
97 | static struct imxuart_platform_data uart_pdata = { | |
98 | .flags = IMXUART_HAVE_RTSCTS, | |
99 | }; | |
100 | ||
4ec6ecc7 VL |
101 | static struct imxi2c_platform_data moboard_i2c0_pdata = { |
102 | .bitrate = 400000, | |
103 | }; | |
104 | ||
105 | static struct imxi2c_platform_data moboard_i2c1_pdata = { | |
106 | .bitrate = 100000, | |
107 | }; | |
108 | ||
45b131a7 VL |
109 | #define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) |
110 | #define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1) | |
111 | ||
112 | static int moboard_sdhc1_get_ro(struct device *dev) | |
113 | { | |
114 | return gpio_get_value(SDHC1_WP); | |
115 | } | |
116 | ||
117 | static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq, | |
118 | void *data) | |
119 | { | |
4f163eb8 SH |
120 | int ret; |
121 | ||
122 | ret = gpio_request(SDHC1_CD, "sdhc-detect"); | |
123 | if (ret) | |
124 | return ret; | |
125 | ||
126 | gpio_direction_input(SDHC1_CD); | |
127 | ||
128 | ret = gpio_request(SDHC1_WP, "sdhc-wp"); | |
129 | if (ret) | |
130 | goto err_gpio_free; | |
131 | gpio_direction_input(SDHC1_WP); | |
132 | ||
133 | ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq, | |
45b131a7 VL |
134 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
135 | "sdhc1-card-detect", data); | |
4f163eb8 SH |
136 | if (ret) |
137 | goto err_gpio_free_2; | |
138 | ||
139 | return 0; | |
140 | ||
141 | err_gpio_free_2: | |
142 | gpio_free(SDHC1_WP); | |
143 | err_gpio_free: | |
144 | gpio_free(SDHC1_CD); | |
145 | ||
146 | return ret; | |
45b131a7 VL |
147 | } |
148 | ||
149 | static void moboard_sdhc1_exit(struct device *dev, void *data) | |
150 | { | |
151 | free_irq(gpio_to_irq(SDHC1_CD), data); | |
4f163eb8 SH |
152 | gpio_free(SDHC1_WP); |
153 | gpio_free(SDHC1_CD); | |
45b131a7 VL |
154 | } |
155 | ||
156 | static struct imxmmc_platform_data sdhc1_pdata = { | |
157 | .get_ro = moboard_sdhc1_get_ro, | |
158 | .init = moboard_sdhc1_init, | |
159 | .exit = moboard_sdhc1_exit, | |
160 | }; | |
161 | ||
b23f1534 VL |
162 | /* |
163 | * this pin is dedicated for all mx31moboard systems, so we do it here | |
164 | */ | |
165 | #define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0) | |
166 | ||
167 | static void usb_xcvr_reset(void) | |
168 | { | |
169 | gpio_request(USB_RESET_B, "usb-reset"); | |
170 | gpio_direction_output(USB_RESET_B, 0); | |
171 | mdelay(1); | |
172 | gpio_set_value(USB_RESET_B, 1); | |
173 | } | |
174 | ||
88b05647 VL |
175 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ |
176 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | |
177 | ||
178 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | |
179 | ||
180 | static void moboard_usbotg_init(void) | |
181 | { | |
182 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); | |
183 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | |
184 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | |
185 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | |
186 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | |
187 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | |
188 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | |
189 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | |
190 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | |
191 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | |
192 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | |
193 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | |
194 | ||
195 | gpio_request(OTG_EN_B, "usb-udc-en"); | |
196 | gpio_direction_output(OTG_EN_B, 0); | |
197 | } | |
198 | ||
199 | static struct fsl_usb2_platform_data usb_pdata = { | |
200 | .operating_mode = FSL_USB2_DR_DEVICE, | |
201 | .phy_mode = FSL_USB2_PHY_ULPI, | |
202 | }; | |
203 | ||
988d2d49 VL |
204 | static struct platform_device *devices[] __initdata = { |
205 | &mx31moboard_flash, | |
206 | }; | |
207 | ||
e00f0b4a VL |
208 | static int mx31moboard_baseboard; |
209 | core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); | |
210 | ||
988d2d49 VL |
211 | /* |
212 | * Board specific initialization. | |
213 | */ | |
214 | static void __init mxc_board_init(void) | |
215 | { | |
220bbcea VL |
216 | mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins), |
217 | "moboard"); | |
218 | ||
988d2d49 VL |
219 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
220 | ||
988d2d49 | 221 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
988d2d49 | 222 | mxc_register_device(&mxc_uart_device4, &uart_pdata); |
e00f0b4a | 223 | |
4ec6ecc7 VL |
224 | mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); |
225 | mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); | |
226 | ||
45b131a7 VL |
227 | mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata); |
228 | ||
b23f1534 VL |
229 | usb_xcvr_reset(); |
230 | ||
88b05647 VL |
231 | moboard_usbotg_init(); |
232 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | |
233 | ||
e00f0b4a VL |
234 | switch (mx31moboard_baseboard) { |
235 | case MX31NOBOARD: | |
236 | break; | |
237 | case MX31DEVBOARD: | |
238 | mx31moboard_devboard_init(); | |
239 | break; | |
240 | case MX31MARXBOT: | |
241 | mx31moboard_marxbot_init(); | |
242 | break; | |
243 | default: | |
220bbcea VL |
244 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", |
245 | mx31moboard_baseboard); | |
e00f0b4a | 246 | } |
988d2d49 VL |
247 | } |
248 | ||
988d2d49 VL |
249 | static void __init mx31moboard_timer_init(void) |
250 | { | |
30c730f8 | 251 | mx31_clocks_init(26000000); |
988d2d49 VL |
252 | } |
253 | ||
254 | struct sys_timer mx31moboard_timer = { | |
255 | .init = mx31moboard_timer_init, | |
256 | }; | |
257 | ||
258 | MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") | |
259 | /* Maintainer: Valentin Longchamp, EPFL Mobots group */ | |
260 | .phys_io = AIPS1_BASE_ADDR, | |
261 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | |
262 | .boot_params = PHYS_OFFSET + 0x100, | |
cd4a05f9 | 263 | .map_io = mx31_map_io, |
c5aa0ad0 | 264 | .init_irq = mx31_init_irq, |
988d2d49 VL |
265 | .init_machine = mxc_board_init, |
266 | .timer = &mx31moboard_timer, | |
267 | MACHINE_END | |
268 |