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ce8ffef0 SH |
1 | /* |
2 | * Copyright (C) 2008 Sascha Hauer, Pengutronix | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #include <linux/types.h> | |
20 | #include <linux/init.h> | |
21 | ||
22 | #include <linux/platform_device.h> | |
23 | #include <linux/mtd/physmap.h> | |
3dad21a9 | 24 | #include <linux/mtd/plat-ram.h> |
ce8ffef0 | 25 | #include <linux/memory.h> |
ba54b958 GL |
26 | #include <linux/gpio.h> |
27 | #include <linux/smc911x.h> | |
28 | #include <linux/interrupt.h> | |
ce8ffef0 | 29 | |
a09e64fb | 30 | #include <mach/hardware.h> |
ce8ffef0 SH |
31 | #include <asm/mach-types.h> |
32 | #include <asm/mach/arch.h> | |
33 | #include <asm/mach/time.h> | |
34 | #include <asm/mach/map.h> | |
a09e64fb RK |
35 | #include <mach/common.h> |
36 | #include <mach/imx-uart.h> | |
37 | #include <mach/iomux-mx3.h> | |
38 | #include <mach/board-pcm037.h> | |
3287abbd | 39 | #include <mach/mxc_nand.h> |
ce8ffef0 | 40 | |
5cf09421 SH |
41 | #include "devices.h" |
42 | ||
ce8ffef0 SH |
43 | static struct physmap_flash_data pcm037_flash_data = { |
44 | .width = 2, | |
45 | }; | |
46 | ||
47 | static struct resource pcm037_flash_resource = { | |
48 | .start = 0xa0000000, | |
49 | .end = 0xa1ffffff, | |
50 | .flags = IORESOURCE_MEM, | |
51 | }; | |
52 | ||
53 | static struct platform_device pcm037_flash = { | |
54 | .name = "physmap-flash", | |
55 | .id = 0, | |
56 | .dev = { | |
57 | .platform_data = &pcm037_flash_data, | |
58 | }, | |
59 | .resource = &pcm037_flash_resource, | |
60 | .num_resources = 1, | |
61 | }; | |
62 | ||
63 | static struct imxuart_platform_data uart_pdata = { | |
a9b06233 | 64 | .flags = IMXUART_HAVE_RTSCTS, |
ce8ffef0 SH |
65 | }; |
66 | ||
ba54b958 GL |
67 | static struct resource smc911x_resources[] = { |
68 | [0] = { | |
69 | .start = CS1_BASE_ADDR + 0x300, | |
70 | .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1, | |
71 | .flags = IORESOURCE_MEM, | |
72 | }, | |
73 | [1] = { | |
74 | .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), | |
75 | .end = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), | |
76 | .flags = IORESOURCE_IRQ, | |
77 | }, | |
78 | }; | |
79 | ||
80 | static struct smc911x_platdata smc911x_info = { | |
81 | .flags = SMC911X_USE_32BIT, | |
82 | .irq_flags = IRQF_SHARED | IRQF_TRIGGER_LOW, | |
83 | }; | |
84 | ||
85 | static struct platform_device pcm037_eth = { | |
86 | .name = "smc911x", | |
87 | .id = -1, | |
88 | .num_resources = ARRAY_SIZE(smc911x_resources), | |
89 | .resource = smc911x_resources, | |
90 | .dev = { | |
91 | .platform_data = &smc911x_info, | |
92 | }, | |
93 | }; | |
94 | ||
3dad21a9 SH |
95 | static struct platdata_mtd_ram pcm038_sram_data = { |
96 | .bankwidth = 2, | |
97 | }; | |
98 | ||
99 | static struct resource pcm038_sram_resource = { | |
100 | .start = CS4_BASE_ADDR, | |
101 | .end = CS4_BASE_ADDR + 512 * 1024 - 1, | |
102 | .flags = IORESOURCE_MEM, | |
103 | }; | |
104 | ||
105 | static struct platform_device pcm037_sram_device = { | |
106 | .name = "mtd-ram", | |
107 | .id = 0, | |
108 | .dev = { | |
109 | .platform_data = &pcm038_sram_data, | |
110 | }, | |
111 | .num_resources = 1, | |
112 | .resource = &pcm038_sram_resource, | |
113 | }; | |
114 | ||
3287abbd SH |
115 | static struct mxc_nand_platform_data pcm037_nand_board_info = { |
116 | .width = 1, | |
117 | .hw_ecc = 1, | |
118 | }; | |
119 | ||
ce8ffef0 SH |
120 | static struct platform_device *devices[] __initdata = { |
121 | &pcm037_flash, | |
ba54b958 | 122 | &pcm037_eth, |
3dad21a9 | 123 | &pcm037_sram_device, |
ce8ffef0 SH |
124 | }; |
125 | ||
bab389c8 VL |
126 | static int uart0_pins[] = { |
127 | MX31_PIN_CTS1__CTS1, | |
128 | MX31_PIN_RTS1__RTS1, | |
129 | MX31_PIN_TXD1__TXD1, | |
130 | MX31_PIN_RXD1__RXD1 | |
131 | }; | |
132 | ||
133 | static int uart2_pins[] = { | |
134 | MX31_PIN_CSPI3_MOSI__RXD3, | |
135 | MX31_PIN_CSPI3_MISO__TXD3 | |
136 | }; | |
137 | ||
ce8ffef0 SH |
138 | /* |
139 | * Board specific initialization. | |
140 | */ | |
141 | static void __init mxc_board_init(void) | |
142 | { | |
143 | platform_add_devices(devices, ARRAY_SIZE(devices)); | |
144 | ||
bab389c8 | 145 | mxc_iomux_setup_multiple_pins(uart0_pins, ARRAY_SIZE(uart0_pins), "uart-0"); |
5cf09421 | 146 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
ce8ffef0 | 147 | |
bab389c8 | 148 | mxc_iomux_setup_multiple_pins(uart2_pins, ARRAY_SIZE(uart2_pins), "uart-2"); |
5cf09421 | 149 | mxc_register_device(&mxc_uart_device2, &uart_pdata); |
d517cab1 | 150 | |
bab389c8 | 151 | mxc_iomux_setup_pin(MX31_PIN_BATT_LINE__OWIRE, "batt-0wire"); |
d517cab1 | 152 | mxc_register_device(&mxc_w1_master_device, NULL); |
ba54b958 GL |
153 | |
154 | /* SMSC9215 IRQ pin */ | |
bab389c8 VL |
155 | if (!mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO), |
156 | "pcm037-eth")) | |
ba54b958 | 157 | gpio_direction_input(MX31_PIN_GPIO3_1); |
3287abbd SH |
158 | |
159 | mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); | |
ce8ffef0 SH |
160 | } |
161 | ||
162 | /* | |
163 | * This structure defines static mappings for the pcm037 board. | |
164 | */ | |
165 | static struct map_desc pcm037_io_desc[] __initdata = { | |
166 | { | |
167 | .virtual = AIPS1_BASE_ADDR_VIRT, | |
168 | .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), | |
169 | .length = AIPS1_SIZE, | |
6c1249e5 | 170 | .type = MT_DEVICE_NONSHARED |
ce8ffef0 SH |
171 | }, { |
172 | .virtual = AIPS2_BASE_ADDR_VIRT, | |
173 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | |
174 | .length = AIPS2_SIZE, | |
6c1249e5 | 175 | .type = MT_DEVICE_NONSHARED |
ce8ffef0 SH |
176 | }, |
177 | }; | |
178 | ||
179 | /* | |
180 | * Set up static virtual mappings. | |
181 | */ | |
182 | void __init pcm037_map_io(void) | |
183 | { | |
184 | mxc_map_io(); | |
185 | iotable_init(pcm037_io_desc, ARRAY_SIZE(pcm037_io_desc)); | |
186 | } | |
187 | ||
188 | static void __init pcm037_timer_init(void) | |
189 | { | |
30c730f8 | 190 | mx31_clocks_init(26000000); |
ce8ffef0 SH |
191 | } |
192 | ||
193 | struct sys_timer pcm037_timer = { | |
194 | .init = pcm037_timer_init, | |
195 | }; | |
196 | ||
197 | MACHINE_START(PCM037, "Phytec Phycore pcm037") | |
198 | /* Maintainer: Pengutronix */ | |
199 | .phys_io = AIPS1_BASE_ADDR, | |
200 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | |
201 | .boot_params = PHYS_OFFSET + 0x100, | |
202 | .map_io = pcm037_map_io, | |
203 | .init_irq = mxc_init_irq, | |
204 | .init_machine = mxc_board_init, | |
205 | .timer = &pcm037_timer, | |
206 | MACHINE_END | |
207 |