[deliverable/linux.git] / arch / arm / mach-mx3 / pcm043.c

/*
 *  Copyright (C) 2009 Sascha Hauer, Pengutronix
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/types.h>
#include <linux/init.h>

#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/plat-ram.h>
#include <linux/memory.h>
#include <linux/gpio.h>
#include <linux/smc911x.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/i2c/at24.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>

#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/imx-uart.h>
#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
#include <mach/i2c.h>
#endif
#include <mach/iomux-mx35.h>
#include <mach/ipu.h>
#include <mach/mx3fb.h>
#include <mach/mxc_nand.h>

#include "devices.h"

static const struct fb_videomode fb_modedb[] = {
	{
		/* 240x320 @ 60 Hz */
		.name		= "Sharp-LQ035Q7",
		.refresh	= 60,
		.xres		= 240,
		.yres		= 320,
		.pixclock	= 185925,
		.left_margin	= 9,
		.right_margin	= 16,
		.upper_margin	= 7,
		.lower_margin	= 9,
		.hsync_len	= 1,
		.vsync_len	= 1,
		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
		.vmode		= FB_VMODE_NONINTERLACED,
		.flag		= 0,
	}, {
		/* 240x320 @ 60 Hz */
		.name		= "TX090",
		.refresh	= 60,
		.xres		= 240,
		.yres		= 320,
		.pixclock	= 38255,
		.left_margin	= 144,
		.right_margin	= 0,
		.upper_margin	= 7,
		.lower_margin	= 40,
		.hsync_len	= 96,
		.vsync_len	= 1,
		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
		.vmode		= FB_VMODE_NONINTERLACED,
		.flag		= 0,
	},
};

static struct ipu_platform_data mx3_ipu_data = {
	.irq_base = MXC_IPU_IRQ_START,
};

static struct mx3fb_platform_data mx3fb_pdata = {
	.dma_dev	= &mx3_ipu.dev,
	.name		= "Sharp-LQ035Q7",
	.mode		= fb_modedb,
	.num_modes	= ARRAY_SIZE(fb_modedb),
};

static struct physmap_flash_data pcm043_flash_data = {
	.width  = 2,
};

static struct resource pcm043_flash_resource = {
	.start	= 0xa0000000,
	.end	= 0xa1ffffff,
	.flags	= IORESOURCE_MEM,
};

static struct platform_device pcm043_flash = {
	.name	= "physmap-flash",
	.id	= 0,
	.dev	= {
		.platform_data  = &pcm043_flash_data,
	},
	.resource = &pcm043_flash_resource,
	.num_resources = 1,
};

static struct imxuart_platform_data uart_pdata = {
	.flags = IMXUART_HAVE_RTSCTS,
};

#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
static struct imxi2c_platform_data pcm043_i2c_1_data = {
	.bitrate = 50000,
};

static struct at24_platform_data board_eeprom = {
	.byte_len = 4096,
	.page_size = 32,
	.flags = AT24_FLAG_ADDR16,
};

static struct i2c_board_info pcm043_i2c_devices[] = {
       {
		I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
		.platform_data = &board_eeprom,
	}, {
		I2C_BOARD_INFO("pcf8563", 0x51),
	}
};
#endif

static struct platform_device *devices[] __initdata = {
	&pcm043_flash,
	&mxc_fec_device,
};

static struct pad_desc pcm043_pads[] = {
	/* UART1 */
	MX35_PAD_CTS1__UART1_CTS,
	MX35_PAD_RTS1__UART1_RTS,
	MX35_PAD_TXD1__UART1_TXD_MUX,
	MX35_PAD_RXD1__UART1_RXD_MUX,
	/* UART2 */
	MX35_PAD_CTS2__UART2_CTS,
	MX35_PAD_RTS2__UART2_RTS,
	MX35_PAD_TXD2__UART2_TXD_MUX,
	MX35_PAD_RXD2__UART2_RXD_MUX,
	/* FEC */
	MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
	MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
	MX35_PAD_FEC_RX_DV__FEC_RX_DV,
	MX35_PAD_FEC_COL__FEC_COL,
	MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
	MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
	MX35_PAD_FEC_TX_EN__FEC_TX_EN,
	MX35_PAD_FEC_MDC__FEC_MDC,
	MX35_PAD_FEC_MDIO__FEC_MDIO,
	MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
	MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
	MX35_PAD_FEC_CRS__FEC_CRS,
	MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
	MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
	MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
	MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
	MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
	MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
	/* I2C1 */
	MX35_PAD_I2C1_CLK__I2C1_SCL,
	MX35_PAD_I2C1_DAT__I2C1_SDA,
	/* Display */
	MX35_PAD_LD0__IPU_DISPB_DAT_0,
	MX35_PAD_LD1__IPU_DISPB_DAT_1,
	MX35_PAD_LD2__IPU_DISPB_DAT_2,
	MX35_PAD_LD3__IPU_DISPB_DAT_3,
	MX35_PAD_LD4__IPU_DISPB_DAT_4,
	MX35_PAD_LD5__IPU_DISPB_DAT_5,
	MX35_PAD_LD6__IPU_DISPB_DAT_6,
	MX35_PAD_LD7__IPU_DISPB_DAT_7,
	MX35_PAD_LD8__IPU_DISPB_DAT_8,
	MX35_PAD_LD9__IPU_DISPB_DAT_9,
	MX35_PAD_LD10__IPU_DISPB_DAT_10,
	MX35_PAD_LD11__IPU_DISPB_DAT_11,
	MX35_PAD_LD12__IPU_DISPB_DAT_12,
	MX35_PAD_LD13__IPU_DISPB_DAT_13,
	MX35_PAD_LD14__IPU_DISPB_DAT_14,
	MX35_PAD_LD15__IPU_DISPB_DAT_15,
	MX35_PAD_LD16__IPU_DISPB_DAT_16,
	MX35_PAD_LD17__IPU_DISPB_DAT_17,
	MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
	MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
	MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
	MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
	MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
	MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
	MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
	/* gpio */
	MX35_PAD_ATA_CS0__GPIO2_6,
};

static struct mxc_nand_platform_data pcm037_nand_board_info = {
	.width = 1,
	.hw_ecc = 1,
};

/*
 * Board specific initialization.
 */
static void __init mxc_board_init(void)
{
	mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));

	platform_add_devices(devices, ARRAY_SIZE(devices));

	mxc_register_device(&mxc_uart_device0, &uart_pdata);
	mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);

	mxc_register_device(&mxc_uart_device1, &uart_pdata);

#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
	i2c_register_board_info(0, pcm043_i2c_devices,
			ARRAY_SIZE(pcm043_i2c_devices));

	mxc_register_device(&mxc_i2c_device0, &pcm043_i2c_1_data);
#endif

	mxc_register_device(&mx3_ipu, &mx3_ipu_data);
	mxc_register_device(&mx3_fb, &mx3fb_pdata);
}

static void __init pcm043_timer_init(void)
{
	mx35_clocks_init();
}

struct sys_timer pcm043_timer = {
	.init	= pcm043_timer_init,
};

MACHINE_START(PCM043, "Phytec Phycore pcm043")
	/* Maintainer: Pengutronix */
	.phys_io	= MX35_AIPS1_BASE_ADDR,
	.io_pg_offst	= ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
	.boot_params    = PHYS_OFFSET + 0x100,
	.map_io         = mx35_map_io,
	.init_irq       = mx35_init_irq,
	.init_machine   = mxc_board_init,
	.timer          = &pcm043_timer,
MACHINE_END
Commit	Line	Data
54df5268 SH	1	/*
	2	* Copyright (C) 2009 Sascha Hauer, Pengutronix
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	17	*/
	18
	19	#include <linux/types.h>
	20	#include <linux/init.h>
	21
	22	#include <linux/platform_device.h>
	23	#include <linux/mtd/physmap.h>
	24	#include <linux/mtd/plat-ram.h>
	25	#include <linux/memory.h>
	26	#include <linux/gpio.h>
	27	#include <linux/smc911x.h>
	28	#include <linux/interrupt.h>
	29	#include <linux/i2c.h>
	30	#include <linux/i2c/at24.h>
	31
	32	#include <asm/mach-types.h>
	33	#include <asm/mach/arch.h>
	34	#include <asm/mach/time.h>
	35	#include <asm/mach/map.h>
	36
	37	#include <mach/hardware.h>
	38	#include <mach/common.h>
	39	#include <mach/imx-uart.h>
	40	#if defined CONFIG_I2C_IMX \|\| defined CONFIG_I2C_IMX_MODULE
	41	#include <mach/i2c.h>
	42	#endif
	43	#include <mach/iomux-mx35.h>
	44	#include <mach/ipu.h>
	45	#include <mach/mx3fb.h>
4f43c2ed	46	#include <mach/mxc_nand.h>
54df5268 SH	47
	48	#include "devices.h"
	49
	50	static const struct fb_videomode fb_modedb[] = {
	51	{
	52	/* 240x320 @ 60 Hz */
	53	.name = "Sharp-LQ035Q7",
	54	.refresh = 60,
	55	.xres = 240,
	56	.yres = 320,
	57	.pixclock = 185925,
	58	.left_margin = 9,
	59	.right_margin = 16,
	60	.upper_margin = 7,
	61	.lower_margin = 9,
	62	.hsync_len = 1,
	63	.vsync_len = 1,
	64	.sync = FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_SHARP_MODE \| FB_SYNC_CLK_INVERT \| FB_SYNC_CLK_IDLE_EN,
	65	.vmode = FB_VMODE_NONINTERLACED,
	66	.flag = 0,
	67	}, {
	68	/* 240x320 @ 60 Hz */
	69	.name = "TX090",
	70	.refresh = 60,
	71	.xres = 240,
	72	.yres = 320,
	73	.pixclock = 38255,
	74	.left_margin = 144,
	75	.right_margin = 0,
	76	.upper_margin = 7,
	77	.lower_margin = 40,
	78	.hsync_len = 96,
	79	.vsync_len = 1,
	80	.sync = FB_SYNC_VERT_HIGH_ACT \| FB_SYNC_OE_ACT_HIGH,
	81	.vmode = FB_VMODE_NONINTERLACED,
	82	.flag = 0,
	83	},
	84	};
	85
	86	static struct ipu_platform_data mx3_ipu_data = {
	87	.irq_base = MXC_IPU_IRQ_START,
	88	};
	89
	90	static struct mx3fb_platform_data mx3fb_pdata = {
	91	.dma_dev = &mx3_ipu.dev,
	92	.name = "Sharp-LQ035Q7",
	93	.mode = fb_modedb,
	94	.num_modes = ARRAY_SIZE(fb_modedb),
	95	};
	96
	97	static struct physmap_flash_data pcm043_flash_data = {
	98	.width = 2,
	99	};
	100
	101	static struct resource pcm043_flash_resource = {
	102	.start = 0xa0000000,
	103	.end = 0xa1ffffff,
	104	.flags = IORESOURCE_MEM,
	105	};
	106
	107	static struct platform_device pcm043_flash = {
	108	.name = "physmap-flash",
	109	.id = 0,
	110	.dev = {
111	.platform_data = &pcm043_flash_data,
112	},
113	.resource = &pcm043_flash_resource,
114	.num_resources = 1,
115	};
116
117	static struct imxuart_platform_data uart_pdata = {
118	.flags = IMXUART_HAVE_RTSCTS,
119	};
120
121	#if defined CONFIG_I2C_IMX \|\| defined CONFIG_I2C_IMX_MODULE
122	static struct imxi2c_platform_data pcm043_i2c_1_data = {
123	.bitrate = 50000,
124	};
125
126	static struct at24_platform_data board_eeprom = {
127	.byte_len = 4096,
128	.page_size = 32,
129	.flags = AT24_FLAG_ADDR16,
130	};
131
132	static struct i2c_board_info pcm043_i2c_devices[] = {
133	{
134	I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
135	.platform_data = &board_eeprom,
136	}, {
cf87a6e2	137	I2C_BOARD_INFO("pcf8563", 0x51),
54df5268 SH	138	}
	139	};
	140	#endif
	141
	142	static struct platform_device *devices[] __initdata = {
	143	&pcm043_flash,
	144	&mxc_fec_device,
	145	};
	146
	147	static struct pad_desc pcm043_pads[] = {
	148	/* UART1 */
	149	MX35_PAD_CTS1__UART1_CTS,
	150	MX35_PAD_RTS1__UART1_RTS,
	151	MX35_PAD_TXD1__UART1_TXD_MUX,
	152	MX35_PAD_RXD1__UART1_RXD_MUX,
	153	/* UART2 */
	154	MX35_PAD_CTS2__UART2_CTS,
	155	MX35_PAD_RTS2__UART2_RTS,
	156	MX35_PAD_TXD2__UART2_TXD_MUX,
	157	MX35_PAD_RXD2__UART2_RXD_MUX,
	158	/* FEC */
	159	MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
	160	MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
	161	MX35_PAD_FEC_RX_DV__FEC_RX_DV,
	162	MX35_PAD_FEC_COL__FEC_COL,
	163	MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
	164	MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
	165	MX35_PAD_FEC_TX_EN__FEC_TX_EN,
	166	MX35_PAD_FEC_MDC__FEC_MDC,
	167	MX35_PAD_FEC_MDIO__FEC_MDIO,
	168	MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
	169	MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
	170	MX35_PAD_FEC_CRS__FEC_CRS,
	171	MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
	172	MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
	173	MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
	174	MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
	175	MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
	176	MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
	177	/* I2C1 */
	178	MX35_PAD_I2C1_CLK__I2C1_SCL,
	179	MX35_PAD_I2C1_DAT__I2C1_SDA,
	180	/* Display */
	181	MX35_PAD_LD0__IPU_DISPB_DAT_0,
	182	MX35_PAD_LD1__IPU_DISPB_DAT_1,
	183	MX35_PAD_LD2__IPU_DISPB_DAT_2,
	184	MX35_PAD_LD3__IPU_DISPB_DAT_3,
	185	MX35_PAD_LD4__IPU_DISPB_DAT_4,
	186	MX35_PAD_LD5__IPU_DISPB_DAT_5,
	187	MX35_PAD_LD6__IPU_DISPB_DAT_6,
	188	MX35_PAD_LD7__IPU_DISPB_DAT_7,
	189	MX35_PAD_LD8__IPU_DISPB_DAT_8,
	190	MX35_PAD_LD9__IPU_DISPB_DAT_9,
	191	MX35_PAD_LD10__IPU_DISPB_DAT_10,
	192	MX35_PAD_LD11__IPU_DISPB_DAT_11,
	193	MX35_PAD_LD12__IPU_DISPB_DAT_12,
	194	MX35_PAD_LD13__IPU_DISPB_DAT_13,
	195	MX35_PAD_LD14__IPU_DISPB_DAT_14,
	196	MX35_PAD_LD15__IPU_DISPB_DAT_15,
	197	MX35_PAD_LD16__IPU_DISPB_DAT_16,
	198	MX35_PAD_LD17__IPU_DISPB_DAT_17,
	199	MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
	200	MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
	201	MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
202	MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
203	MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
204	MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
205	MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
8d5c1ed3 LF	206	/* gpio */
8d5c1ed3 LF	207	MX35_PAD_ATA_CS0__GPIO2_6,
54df5268 SH	208	};
54df5268 SH	209
4f43c2ed SH	210	static struct mxc_nand_platform_data pcm037_nand_board_info = {
	211	.width = 1,
	212	.hw_ecc = 1,
	213	};
	214
54df5268 SH	215	/*
	216	* Board specific initialization.
	217	*/
	218	static void __init mxc_board_init(void)
	219	{
	220	mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
	221
	222	platform_add_devices(devices, ARRAY_SIZE(devices));
	223
	224	mxc_register_device(&mxc_uart_device0, &uart_pdata);
4f43c2ed	225	mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
54df5268 SH	226
	227	mxc_register_device(&mxc_uart_device1, &uart_pdata);
	228
	229	#if defined CONFIG_I2C_IMX \|\| defined CONFIG_I2C_IMX_MODULE
	230	i2c_register_board_info(0, pcm043_i2c_devices,
	231	ARRAY_SIZE(pcm043_i2c_devices));
	232
	233	mxc_register_device(&mxc_i2c_device0, &pcm043_i2c_1_data);
	234	#endif
	235
	236	mxc_register_device(&mx3_ipu, &mx3_ipu_data);
	237	mxc_register_device(&mx3_fb, &mx3fb_pdata);
	238	}
	239
	240	static void __init pcm043_timer_init(void)
	241	{
	242	mx35_clocks_init();
	243	}
	244
	245	struct sys_timer pcm043_timer = {
	246	.init = pcm043_timer_init,
	247	};
	248
	249	MACHINE_START(PCM043, "Phytec Phycore pcm043")
	250	/* Maintainer: Pengutronix */
f568dd7f UKK	251	.phys_io = MX35_AIPS1_BASE_ADDR,
f568dd7f UKK	252	.io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
54df5268	253	.boot_params = PHYS_OFFSET + 0x100,
cd4a05f9	254	.map_io = mx35_map_io,
c5aa0ad0	255	.init_irq = mx35_init_irq,
54df5268 SH	256	.init_machine = mxc_board_init,
	257	.timer = &pcm043_timer,
	258	MACHINE_END
	259