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088d01b0 AK |
1 | /* |
2 | * Copyright (C) 2010 Linaro Limited | |
3 | * | |
4 | * based on code from the following | |
5 | * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. | |
6 | * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved. | |
7 | * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved. | |
8 | * | |
9 | * The code contained herein is licensed under the GNU General Public | |
10 | * License. You may obtain a copy of the GNU General Public License | |
11 | * Version 2 or later at the following locations: | |
12 | * | |
13 | * http://www.opensource.org/licenses/gpl-license.html | |
14 | * http://www.gnu.org/copyleft/gpl.html | |
15 | */ | |
16 | ||
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/gpio.h> | |
9d2c0ef7 | 21 | #include <linux/leds.h> |
fcbd0c5f | 22 | #include <linux/input.h> |
088d01b0 AK |
23 | #include <linux/delay.h> |
24 | #include <linux/io.h> | |
25 | #include <linux/fsl_devices.h> | |
c6e34a4c APR |
26 | #include <linux/spi/flash.h> |
27 | #include <linux/spi/spi.h> | |
088d01b0 AK |
28 | |
29 | #include <mach/common.h> | |
30 | #include <mach/hardware.h> | |
31 | #include <mach/iomux-mx51.h> | |
32 | #include <mach/i2c.h> | |
33 | #include <mach/mxc_ehci.h> | |
34 | ||
35 | #include <asm/irq.h> | |
36 | #include <asm/setup.h> | |
37 | #include <asm/mach-types.h> | |
38 | #include <asm/mach/arch.h> | |
39 | #include <asm/mach/time.h> | |
40 | ||
41 | #include "devices-imx51.h" | |
42 | #include "devices.h" | |
43 | ||
81490fcd AK |
44 | #define MX51_USB_PLL_DIV_24_MHZ 0x01 |
45 | ||
f1dd361b APR |
46 | #define EFIKAMX_PCBID0 (2*32 + 16) |
47 | #define EFIKAMX_PCBID1 (2*32 + 17) | |
48 | #define EFIKAMX_PCBID2 (2*32 + 11) | |
49 | ||
9d2c0ef7 APR |
50 | #define EFIKAMX_BLUE_LED (2*32 + 13) |
51 | #define EFIKAMX_GREEN_LED (2*32 + 14) | |
52 | #define EFIKAMX_RED_LED (2*32 + 15) | |
53 | ||
fcbd0c5f APR |
54 | #define EFIKAMX_POWER_KEY (1*32 + 31) |
55 | ||
c6e34a4c APR |
56 | #define EFIKAMX_SPI_CS0 (3*32 + 24) |
57 | #define EFIKAMX_SPI_CS1 (3*32 + 25) | |
58 | ||
c2932bf4 APR |
59 | /* board 1.1 doesn't have same reset gpio */ |
60 | #define EFIKAMX_RESET1_1 (2*32 + 2) | |
61 | #define EFIKAMX_RESET (0*32 + 4) | |
62 | ||
f1dd361b APR |
63 | /* the pci ids pin have pull up. they're driven low according to board id */ |
64 | #define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP) | |
65 | #define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP) | |
66 | #define MX51_PAD_PCBID2 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, PAD_CTL_PUS_100K_UP) | |
fcbd0c5f | 67 | #define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE) |
f1dd361b | 68 | |
8f5260c8 | 69 | static iomux_v3_cfg_t mx51efikamx_pads[] = { |
088d01b0 AK |
70 | /* UART1 */ |
71 | MX51_PAD_UART1_RXD__UART1_RXD, | |
72 | MX51_PAD_UART1_TXD__UART1_TXD, | |
73 | MX51_PAD_UART1_RTS__UART1_RTS, | |
74 | MX51_PAD_UART1_CTS__UART1_CTS, | |
f1dd361b APR |
75 | /* board id */ |
76 | MX51_PAD_PCBID0, | |
77 | MX51_PAD_PCBID1, | |
78 | MX51_PAD_PCBID2, | |
a96eb148 APR |
79 | |
80 | /* SD 1 */ | |
81 | MX51_PAD_SD1_CMD__SD1_CMD, | |
82 | MX51_PAD_SD1_CLK__SD1_CLK, | |
83 | MX51_PAD_SD1_DATA0__SD1_DATA0, | |
84 | MX51_PAD_SD1_DATA1__SD1_DATA1, | |
85 | MX51_PAD_SD1_DATA2__SD1_DATA2, | |
86 | MX51_PAD_SD1_DATA3__SD1_DATA3, | |
87 | ||
88 | /* SD 2 */ | |
89 | MX51_PAD_SD2_CMD__SD2_CMD, | |
90 | MX51_PAD_SD2_CLK__SD2_CLK, | |
91 | MX51_PAD_SD2_DATA0__SD2_DATA0, | |
92 | MX51_PAD_SD2_DATA1__SD2_DATA1, | |
93 | MX51_PAD_SD2_DATA2__SD2_DATA2, | |
94 | MX51_PAD_SD2_DATA3__SD2_DATA3, | |
95 | ||
96 | /* SD/MMC WP/CD */ | |
97 | MX51_PAD_GPIO_1_0__ESDHC1_CD, | |
98 | MX51_PAD_GPIO_1_1__ESDHC1_WP, | |
99 | MX51_PAD_GPIO_1_7__ESDHC2_WP, | |
100 | MX51_PAD_GPIO_1_8__ESDHC2_CD, | |
9d2c0ef7 APR |
101 | |
102 | /* leds */ | |
103 | MX51_PAD_CSI1_D9__GPIO_3_13, | |
104 | MX51_PAD_CSI1_VSYNC__GPIO_3_14, | |
105 | MX51_PAD_CSI1_HSYNC__GPIO_3_15, | |
fcbd0c5f APR |
106 | |
107 | /* power key */ | |
108 | MX51_PAD_PWRKEY, | |
c6e34a4c APR |
109 | |
110 | /* spi */ | |
111 | MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI, | |
112 | MX51_PAD_CSPI1_MISO__ECSPI1_MISO, | |
113 | MX51_PAD_CSPI1_SS0__GPIO_4_24, | |
114 | MX51_PAD_CSPI1_SS1__GPIO_4_25, | |
115 | MX51_PAD_CSPI1_RDY__ECSPI1_RDY, | |
116 | MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK, | |
c2932bf4 APR |
117 | |
118 | /* reset */ | |
119 | MX51_PAD_DI1_PIN13__GPIO_3_2, | |
120 | MX51_PAD_GPIO_1_4__GPIO_1_4, | |
088d01b0 AK |
121 | }; |
122 | ||
123 | /* Serial ports */ | |
124 | #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) | |
125 | static const struct imxuart_platform_data uart_pdata = { | |
126 | .flags = IMXUART_HAVE_RTSCTS, | |
127 | }; | |
128 | ||
129 | static inline void mxc_init_imx_uart(void) | |
130 | { | |
131 | imx51_add_imx_uart(0, &uart_pdata); | |
132 | imx51_add_imx_uart(1, &uart_pdata); | |
133 | imx51_add_imx_uart(2, &uart_pdata); | |
134 | } | |
135 | #else /* !SERIAL_IMX */ | |
136 | static inline void mxc_init_imx_uart(void) | |
137 | { | |
138 | } | |
139 | #endif /* SERIAL_IMX */ | |
140 | ||
81490fcd AK |
141 | /* This function is board specific as the bit mask for the plldiv will also |
142 | * be different for other Freescale SoCs, thus a common bitmask is not | |
143 | * possible and cannot get place in /plat-mxc/ehci.c. | |
144 | */ | |
145 | static int initialize_otg_port(struct platform_device *pdev) | |
146 | { | |
147 | u32 v; | |
148 | void __iomem *usb_base; | |
149 | void __iomem *usbother_base; | |
150 | usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); | |
151 | usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET); | |
152 | ||
153 | /* Set the PHY clock to 19.2MHz */ | |
154 | v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET); | |
155 | v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK; | |
156 | v |= MX51_USB_PLL_DIV_24_MHZ; | |
157 | __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET); | |
158 | iounmap(usb_base); | |
159 | return 0; | |
160 | } | |
161 | ||
162 | static struct mxc_usbh_platform_data dr_utmi_config = { | |
163 | .init = initialize_otg_port, | |
164 | .portsc = MXC_EHCI_UTMI_16BIT, | |
165 | .flags = MXC_EHCI_INTERNAL_PHY, | |
166 | }; | |
167 | ||
f1dd361b APR |
168 | /* PCBID2 PCBID1 PCBID0 STATE |
169 | 1 1 1 ER1:rev1.1 | |
170 | 1 1 0 ER2:rev1.2 | |
171 | 1 0 1 ER3:rev1.3 | |
172 | 1 0 0 ER4:rev1.4 | |
173 | */ | |
174 | static void __init mx51_efikamx_board_id(void) | |
175 | { | |
176 | int id; | |
177 | ||
178 | /* things are taking time to settle */ | |
179 | msleep(150); | |
180 | ||
181 | gpio_request(EFIKAMX_PCBID0, "pcbid0"); | |
182 | gpio_direction_input(EFIKAMX_PCBID0); | |
183 | gpio_request(EFIKAMX_PCBID1, "pcbid1"); | |
184 | gpio_direction_input(EFIKAMX_PCBID1); | |
185 | gpio_request(EFIKAMX_PCBID2, "pcbid2"); | |
186 | gpio_direction_input(EFIKAMX_PCBID2); | |
187 | ||
188 | id = gpio_get_value(EFIKAMX_PCBID0); | |
189 | id |= gpio_get_value(EFIKAMX_PCBID1) << 1; | |
190 | id |= gpio_get_value(EFIKAMX_PCBID2) << 2; | |
191 | ||
192 | switch (id) { | |
193 | case 7: | |
194 | system_rev = 0x11; | |
195 | break; | |
196 | case 6: | |
197 | system_rev = 0x12; | |
198 | break; | |
199 | case 5: | |
200 | system_rev = 0x13; | |
201 | break; | |
202 | case 4: | |
203 | system_rev = 0x14; | |
204 | break; | |
205 | default: | |
206 | system_rev = 0x10; | |
207 | break; | |
208 | } | |
209 | ||
210 | if ((system_rev == 0x10) | |
211 | || (system_rev == 0x12) | |
212 | || (system_rev == 0x14)) { | |
213 | printk(KERN_WARNING | |
214 | "EfikaMX: Unsupported board revision 1.%u!\n", | |
215 | system_rev & 0xf); | |
216 | } | |
217 | } | |
218 | ||
9d2c0ef7 APR |
219 | static struct gpio_led mx51_efikamx_leds[] = { |
220 | { | |
221 | .name = "efikamx:green", | |
222 | .default_trigger = "default-on", | |
223 | .gpio = EFIKAMX_GREEN_LED, | |
224 | }, | |
225 | { | |
226 | .name = "efikamx:red", | |
227 | .default_trigger = "ide-disk", | |
228 | .gpio = EFIKAMX_RED_LED, | |
229 | }, | |
230 | { | |
231 | .name = "efikamx:blue", | |
232 | .default_trigger = "mmc0", | |
233 | .gpio = EFIKAMX_BLUE_LED, | |
234 | }, | |
235 | }; | |
236 | ||
237 | static struct gpio_led_platform_data mx51_efikamx_leds_data = { | |
238 | .leds = mx51_efikamx_leds, | |
239 | .num_leds = ARRAY_SIZE(mx51_efikamx_leds), | |
240 | }; | |
241 | ||
242 | static struct platform_device mx51_efikamx_leds_device = { | |
243 | .name = "leds-gpio", | |
244 | .id = -1, | |
245 | .dev = { | |
246 | .platform_data = &mx51_efikamx_leds_data, | |
247 | }, | |
248 | }; | |
249 | ||
fcbd0c5f APR |
250 | static struct gpio_keys_button mx51_efikamx_powerkey[] = { |
251 | { | |
252 | .code = KEY_POWER, | |
253 | .gpio = EFIKAMX_POWER_KEY, | |
254 | .type = EV_PWR, | |
255 | .desc = "Power Button (CM)", | |
256 | .wakeup = 1, | |
257 | .debounce_interval = 10, /* ms */ | |
258 | }, | |
259 | }; | |
260 | ||
261 | static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initconst = { | |
262 | .buttons = mx51_efikamx_powerkey, | |
263 | .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey), | |
264 | }; | |
265 | ||
c6e34a4c APR |
266 | static struct mtd_partition mx51_efikamx_spi_nor_partitions[] = { |
267 | { | |
268 | .name = "u-boot", | |
269 | .offset = 0, | |
270 | .size = SZ_256K, | |
271 | }, | |
272 | { | |
273 | .name = "config", | |
274 | .offset = MTDPART_OFS_APPEND, | |
275 | .size = SZ_64K, | |
276 | }, | |
277 | }; | |
278 | ||
279 | static struct flash_platform_data mx51_efikamx_spi_flash_data = { | |
280 | .name = "spi_flash", | |
281 | .parts = mx51_efikamx_spi_nor_partitions, | |
282 | .nr_parts = ARRAY_SIZE(mx51_efikamx_spi_nor_partitions), | |
283 | .type = "sst25vf032b", | |
284 | }; | |
285 | ||
286 | static struct spi_board_info mx51_efikamx_spi_board_info[] __initdata = { | |
287 | { | |
288 | .modalias = "m25p80", | |
289 | .max_speed_hz = 25000000, | |
290 | .bus_num = 0, | |
291 | .chip_select = 1, | |
292 | .platform_data = &mx51_efikamx_spi_flash_data, | |
293 | .irq = -1, | |
294 | }, | |
295 | }; | |
296 | ||
297 | static int mx51_efikamx_spi_cs[] = { | |
298 | EFIKAMX_SPI_CS0, | |
299 | EFIKAMX_SPI_CS1, | |
300 | }; | |
301 | ||
302 | static const struct spi_imx_master mx51_efikamx_spi_pdata __initconst = { | |
303 | .chipselect = mx51_efikamx_spi_cs, | |
304 | .num_chipselect = ARRAY_SIZE(mx51_efikamx_spi_cs), | |
305 | }; | |
306 | ||
c2932bf4 APR |
307 | void mx51_efikamx_reset(void) |
308 | { | |
309 | if (system_rev == 0x11) | |
310 | gpio_direction_output(EFIKAMX_RESET1_1, 0); | |
311 | else | |
312 | gpio_direction_output(EFIKAMX_RESET, 0); | |
313 | } | |
314 | ||
088d01b0 AK |
315 | static void __init mxc_board_init(void) |
316 | { | |
317 | mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads, | |
318 | ARRAY_SIZE(mx51efikamx_pads)); | |
f1dd361b | 319 | mx51_efikamx_board_id(); |
81490fcd | 320 | mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); |
088d01b0 | 321 | mxc_init_imx_uart(); |
0ef51953 | 322 | imx51_add_sdhci_esdhc_imx(0, NULL); |
a96eb148 APR |
323 | |
324 | /* on < 1.2 boards both SD controllers are used */ | |
9d2c0ef7 | 325 | if (system_rev < 0x12) { |
0ef51953 | 326 | imx51_add_sdhci_esdhc_imx(1, NULL); |
9d2c0ef7 APR |
327 | mx51_efikamx_leds[2].default_trigger = "mmc1"; |
328 | } | |
329 | ||
330 | platform_device_register(&mx51_efikamx_leds_device); | |
fcbd0c5f | 331 | imx51_add_gpio_keys(&mx51_efikamx_powerkey_data); |
c6e34a4c APR |
332 | |
333 | spi_register_board_info(mx51_efikamx_spi_board_info, | |
334 | ARRAY_SIZE(mx51_efikamx_spi_board_info)); | |
335 | imx51_add_ecspi(0, &mx51_efikamx_spi_pdata); | |
c2932bf4 APR |
336 | |
337 | if (system_rev == 0x11) { | |
338 | gpio_request(EFIKAMX_RESET1_1, "reset"); | |
339 | gpio_direction_output(EFIKAMX_RESET1_1, 1); | |
340 | } else { | |
341 | gpio_request(EFIKAMX_RESET, "reset"); | |
342 | gpio_direction_output(EFIKAMX_RESET, 1); | |
343 | } | |
088d01b0 AK |
344 | } |
345 | ||
346 | static void __init mx51_efikamx_timer_init(void) | |
347 | { | |
348 | mx51_clocks_init(32768, 24000000, 22579200, 24576000); | |
349 | } | |
350 | ||
351 | static struct sys_timer mxc_timer = { | |
352 | .init = mx51_efikamx_timer_init, | |
353 | }; | |
354 | ||
355 | MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop") | |
356 | /* Maintainer: Amit Kucheria <amit.kucheria@linaro.org> */ | |
088d01b0 AK |
357 | .boot_params = MX51_PHYS_OFFSET + 0x100, |
358 | .map_io = mx51_map_io, | |
359 | .init_irq = mx51_init_irq, | |
360 | .init_machine = mxc_board_init, | |
361 | .timer = &mxc_timer, | |
362 | MACHINE_END |