projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| a329b48c AK |
1 | /* |
| 2 | * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. | |
| 3 | * | |
| 4 | * The code contained herein is licensed under the GNU General Public | |
| 5 | * License. You may obtain a copy of the GNU General Public License | |
| 6 | * Version 2 or later at the following locations: | |
| 7 | * | |
| 8 | * http://www.opensource.org/licenses/gpl-license.html | |
| 9 | * http://www.gnu.org/copyleft/gpl.html | |
| 10 | * | |
| 11 | * Create static mapping between physical to virtual memory. | |
| 12 | */ | |
| 13 | ||
| 14 | #include <linux/mm.h> | |
| 15 | #include <linux/init.h> | |
| 16 | ||
| 17 | #include <asm/mach/map.h> | |
| 18 | ||
| 19 | #include <mach/hardware.h> | |
| 20 | #include <mach/common.h> | |
| 21 | #include <mach/iomux-v3.h> | |
| 22 | ||
| 23 | /* | |
| 24 | * Define the MX51 memory map. | |
| 25 | */ | |
| 26 | static struct map_desc mxc_io_desc[] __initdata = { | |
| 27 | { | |
| 28 | .virtual = MX51_IRAM_BASE_ADDR_VIRT, | |
| 29 | .pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR), | |
| 30 | .length = MX51_IRAM_SIZE, | |
| 31 | .type = MT_DEVICE | |
| 32 | }, { | |
| 33 | .virtual = MX51_DEBUG_BASE_ADDR_VIRT, | |
| 34 | .pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR), | |
| 35 | .length = MX51_DEBUG_SIZE, | |
| 36 | .type = MT_DEVICE | |
| 37 | }, { | |
| 38 | .virtual = MX51_TZIC_BASE_ADDR_VIRT, | |
| 39 | .pfn = __phys_to_pfn(MX51_TZIC_BASE_ADDR), | |
| 40 | .length = MX51_TZIC_SIZE, | |
| 41 | .type = MT_DEVICE | |
| 42 | }, { | |
| 43 | .virtual = MX51_AIPS1_BASE_ADDR_VIRT, | |
| 44 | .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR), | |
| 45 | .length = MX51_AIPS1_SIZE, | |
| 46 | .type = MT_DEVICE | |
| 47 | }, { | |
| 48 | .virtual = MX51_SPBA0_BASE_ADDR_VIRT, | |
| 49 | .pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR), | |
| 50 | .length = MX51_SPBA0_SIZE, | |
| 51 | .type = MT_DEVICE | |
| 52 | }, { | |
| 53 | .virtual = MX51_AIPS2_BASE_ADDR_VIRT, | |
| 54 | .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR), | |
| 55 | .length = MX51_AIPS2_SIZE, | |
| 56 | .type = MT_DEVICE | |
| 57 | }, { | |
| 58 | .virtual = MX51_NFC_AXI_BASE_ADDR_VIRT, | |
| 59 | .pfn = __phys_to_pfn(MX51_NFC_AXI_BASE_ADDR), | |
| 60 | .length = MX51_NFC_AXI_SIZE, | |
| 61 | .type = MT_DEVICE | |
| 62 | }, | |
| 63 | }; | |
| 64 | ||
| 65 | /* | |
| 66 | * This function initializes the memory map. It is called during the | |
| 67 | * system startup to create static physical to virtual memory mappings | |
| 68 | * for the IO modules. | |
| 69 | */ | |
| 70 | void __init mx51_map_io(void) | |
| 71 | { | |
| 72 | u32 tzic_addr; | |
| 73 | ||
| 74 | if (mx51_revision() < MX51_CHIP_REV_2_0) | |
| 75 | tzic_addr = 0x8FFFC000; | |
| 76 | else | |
| 77 | tzic_addr = 0xE0003000; | |
| 78 | mxc_io_desc[2].pfn = __phys_to_pfn(tzic_addr); | |
| 79 | ||
| 80 | mxc_set_cpu_type(MXC_CPU_MX51); | |
| 81 | mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); | |
| 82 | mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR)); | |
| 83 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | |
| 84 | } | |
| 85 | ||
| 86 | void __init mx51_init_irq(void) | |
| 87 | { | |
| 88 | tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR)); | |
| 89 | } |