[deliverable/linux.git] / arch / arm / mach-mxs / mach-mxs.c

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 * Copyright 2012 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/can/platform/flexcan.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/micrel_phy.h>
#include <linux/mxsfb.h>
#include <linux/of_platform.h>
#include <linux/phy.h>
#include <linux/pinctrl/consumer.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <mach/common.h>
#include <mach/digctl.h>
#include <mach/mxs.h>

static struct fb_videomode mx23evk_video_modes[] = {
	{
		.name		= "Samsung-LMS430HF02",
		.refresh	= 60,
		.xres		= 480,
		.yres		= 272,
		.pixclock	= 108096, /* picosecond (9.2 MHz) */
		.left_margin	= 15,
		.right_margin	= 8,
		.upper_margin	= 12,
		.lower_margin	= 4,
		.hsync_len	= 1,
		.vsync_len	= 1,
		.sync		= FB_SYNC_DATA_ENABLE_HIGH_ACT |
				  FB_SYNC_DOTCLK_FAILING_ACT,
	},
};

static struct fb_videomode mx28evk_video_modes[] = {
	{
		.name		= "Seiko-43WVF1G",
		.refresh	= 60,
		.xres		= 800,
		.yres		= 480,
		.pixclock	= 29851, /* picosecond (33.5 MHz) */
		.left_margin	= 89,
		.right_margin	= 164,
		.upper_margin	= 23,
		.lower_margin	= 10,
		.hsync_len	= 10,
		.vsync_len	= 10,
		.sync		= FB_SYNC_DATA_ENABLE_HIGH_ACT |
				  FB_SYNC_DOTCLK_FAILING_ACT,
	},
};

static struct fb_videomode m28evk_video_modes[] = {
	{
		.name		= "Ampire AM-800480R2TMQW-T01H",
		.refresh	= 60,
		.xres		= 800,
		.yres		= 480,
		.pixclock	= 30066, /* picosecond (33.26 MHz) */
		.left_margin	= 0,
		.right_margin	= 256,
		.upper_margin	= 0,
		.lower_margin	= 45,
		.hsync_len	= 1,
		.vsync_len	= 1,
		.sync		= FB_SYNC_DATA_ENABLE_HIGH_ACT,
	},
};

static struct fb_videomode apx4devkit_video_modes[] = {
	{
		.name		= "HannStar PJ70112A",
		.refresh	= 60,
		.xres		= 800,
		.yres		= 480,
		.pixclock	= 33333, /* picosecond (30.00 MHz) */
		.left_margin	= 88,
		.right_margin	= 40,
		.upper_margin	= 32,
		.lower_margin	= 13,
		.hsync_len	= 48,
		.vsync_len	= 3,
		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
				  FB_SYNC_DATA_ENABLE_HIGH_ACT |
				  FB_SYNC_DOTCLK_FAILING_ACT,
	},
};

static struct mxsfb_platform_data mxsfb_pdata __initdata;

/*
 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
 */
#define MX28EVK_FLEXCAN_SWITCH	MXS_GPIO_NR(2, 13)

static int flexcan0_en, flexcan1_en;

static void mx28evk_flexcan_switch(void)
{
	if (flexcan0_en || flexcan1_en)
		gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
	else
		gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
}

static void mx28evk_flexcan0_switch(int enable)
{
	flexcan0_en = enable;
	mx28evk_flexcan_switch();
}

static void mx28evk_flexcan1_switch(int enable)
{
	flexcan1_en = enable;
	mx28evk_flexcan_switch();
}

static struct flexcan_platform_data flexcan_pdata[2];

static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
	OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
	OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
	OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]),
	OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]),
	{ /* sentinel */ }
};

static void __init imx23_timer_init(void)
{
	mx23_clocks_init();
}

static struct sys_timer imx23_timer = {
	.init = imx23_timer_init,
};

static void __init imx28_timer_init(void)
{
	mx28_clocks_init();
}

static struct sys_timer imx28_timer = {
	.init = imx28_timer_init,
};

enum mac_oui {
	OUI_FSL,
	OUI_DENX,
	OUI_CRYSTALFONTZ,
};

static void __init update_fec_mac_prop(enum mac_oui oui)
{
	struct device_node *np, *from = NULL;
	struct property *newmac;
	const u32 *ocotp = mxs_get_ocotp();
	u8 *macaddr;
	u32 val;
	int i;

	for (i = 0; i < 2; i++) {
		np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
		if (!np)
			return;
		from = np;

		newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
		if (!newmac)
			return;
		newmac->value = newmac + 1;
		newmac->length = 6;

		newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
		if (!newmac->name) {
			kfree(newmac);
			return;
		}

		/*
		 * OCOTP only stores the last 4 octets for each mac address,
		 * so hard-code OUI here.
		 */
		macaddr = newmac->value;
		switch (oui) {
		case OUI_FSL:
			macaddr[0] = 0x00;
			macaddr[1] = 0x04;
			macaddr[2] = 0x9f;
			break;
		case OUI_DENX:
			macaddr[0] = 0xc0;
			macaddr[1] = 0xe5;
			macaddr[2] = 0x4e;
			break;
		case OUI_CRYSTALFONTZ:
			macaddr[0] = 0x58;
			macaddr[1] = 0xb9;
			macaddr[2] = 0xe1;
			break;
		}
		val = ocotp[i];
		macaddr[3] = (val >> 16) & 0xff;
		macaddr[4] = (val >> 8) & 0xff;
		macaddr[5] = (val >> 0) & 0xff;

		prom_update_property(np, newmac);
	}
}

static void __init imx23_evk_init(void)
{
	mxsfb_pdata.mode_list = mx23evk_video_modes;
	mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
	mxsfb_pdata.default_bpp = 32;
	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
}

static inline void enable_clk_enet_out(void)
{
	struct clk *clk = clk_get_sys("enet_out", NULL);

	if (!IS_ERR(clk))
		clk_prepare_enable(clk);
}

static void __init imx28_evk_init(void)
{
	enable_clk_enet_out();
	update_fec_mac_prop(OUI_FSL);

	mxsfb_pdata.mode_list = mx28evk_video_modes;
	mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
	mxsfb_pdata.default_bpp = 32;
	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;

	mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
}

static void __init imx28_evk_post_init(void)
{
	if (!gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
			      "flexcan-switch")) {
		flexcan_pdata[0].transceiver_switch = mx28evk_flexcan0_switch;
		flexcan_pdata[1].transceiver_switch = mx28evk_flexcan1_switch;
	}
}

static void __init m28evk_init(void)
{
	mxsfb_pdata.mode_list = m28evk_video_modes;
	mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
	mxsfb_pdata.default_bpp = 16;
	mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
}

static int apx4devkit_phy_fixup(struct phy_device *phy)
{
	phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
	return 0;
}

static void __init apx4devkit_init(void)
{
	enable_clk_enet_out();

	if (IS_BUILTIN(CONFIG_PHYLIB))
		phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK,
					   apx4devkit_phy_fixup);

	mxsfb_pdata.mode_list = apx4devkit_video_modes;
	mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
	mxsfb_pdata.default_bpp = 32;
	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
}

#define ENET0_MDC__GPIO_4_0	MXS_GPIO_NR(4, 0)
#define ENET0_MDIO__GPIO_4_1	MXS_GPIO_NR(4, 1)
#define ENET0_RX_EN__GPIO_4_2	MXS_GPIO_NR(4, 2)
#define ENET0_RXD0__GPIO_4_3	MXS_GPIO_NR(4, 3)
#define ENET0_RXD1__GPIO_4_4	MXS_GPIO_NR(4, 4)
#define ENET0_TX_EN__GPIO_4_6	MXS_GPIO_NR(4, 6)
#define ENET0_TXD0__GPIO_4_7	MXS_GPIO_NR(4, 7)
#define ENET0_TXD1__GPIO_4_8	MXS_GPIO_NR(4, 8)
#define ENET_CLK__GPIO_4_16	MXS_GPIO_NR(4, 16)

#define TX28_FEC_PHY_POWER	MXS_GPIO_NR(3, 29)
#define TX28_FEC_PHY_RESET	MXS_GPIO_NR(4, 13)
#define TX28_FEC_nINT		MXS_GPIO_NR(4, 5)

static const struct gpio tx28_gpios[] __initconst = {
	{ ENET0_MDC__GPIO_4_0, GPIOF_OUT_INIT_LOW, "GPIO_4_0" },
	{ ENET0_MDIO__GPIO_4_1, GPIOF_OUT_INIT_LOW, "GPIO_4_1" },
	{ ENET0_RX_EN__GPIO_4_2, GPIOF_OUT_INIT_LOW, "GPIO_4_2" },
	{ ENET0_RXD0__GPIO_4_3, GPIOF_OUT_INIT_LOW, "GPIO_4_3" },
	{ ENET0_RXD1__GPIO_4_4, GPIOF_OUT_INIT_LOW, "GPIO_4_4" },
	{ ENET0_TX_EN__GPIO_4_6, GPIOF_OUT_INIT_LOW, "GPIO_4_6" },
	{ ENET0_TXD0__GPIO_4_7, GPIOF_OUT_INIT_LOW, "GPIO_4_7" },
	{ ENET0_TXD1__GPIO_4_8, GPIOF_OUT_INIT_LOW, "GPIO_4_8" },
	{ ENET_CLK__GPIO_4_16, GPIOF_OUT_INIT_LOW, "GPIO_4_16" },
	{ TX28_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" },
	{ TX28_FEC_PHY_RESET, GPIOF_OUT_INIT_LOW, "fec-phy-reset" },
	{ TX28_FEC_nINT, GPIOF_DIR_IN, "fec-int" },
};

static void __init tx28_post_init(void)
{
	struct device_node *np;
	struct platform_device *pdev;
	struct pinctrl *pctl;
	int ret;

	enable_clk_enet_out();

	np = of_find_compatible_node(NULL, NULL, "fsl,imx28-fec");
	pdev = of_find_device_by_node(np);
	if (!pdev) {
		pr_err("%s: failed to find fec device\n", __func__);
		return;
	}

	pctl = pinctrl_get_select(&pdev->dev, "gpio_mode");
	if (IS_ERR(pctl)) {
		pr_err("%s: failed to get pinctrl state\n", __func__);
		return;
	}

	ret = gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
	if (ret) {
		pr_err("%s: failed to request gpios: %d\n", __func__, ret);
		return;
	}

	/* Power up fec phy */
	gpio_set_value(TX28_FEC_PHY_POWER, 1);
	msleep(26); /* 25ms according to data sheet */

	/* Mode strap pins */
	gpio_set_value(ENET0_RX_EN__GPIO_4_2, 1);
	gpio_set_value(ENET0_RXD0__GPIO_4_3, 1);
	gpio_set_value(ENET0_RXD1__GPIO_4_4, 1);

	udelay(100); /* minimum assertion time for nRST */

	/* Deasserting FEC PHY RESET */
	gpio_set_value(TX28_FEC_PHY_RESET, 1);

	pinctrl_put(pctl);
}

static void __init cfa10049_init(void)
{
	enable_clk_enet_out();
	update_fec_mac_prop(OUI_CRYSTALFONTZ);
}

static void __init apf28_init(void)
{
	enable_clk_enet_out();
}

static void __init mxs_machine_init(void)
{
	if (of_machine_is_compatible("fsl,imx28-evk"))
		imx28_evk_init();
	else if (of_machine_is_compatible("fsl,imx23-evk"))
		imx23_evk_init();
	else if (of_machine_is_compatible("denx,m28evk"))
		m28evk_init();
	else if (of_machine_is_compatible("bluegiga,apx4devkit"))
		apx4devkit_init();
	else if (of_machine_is_compatible("crystalfontz,cfa10049"))
		cfa10049_init();
	else if (of_machine_is_compatible("armadeus,imx28-apf28"))
		apf28_init();

	of_platform_populate(NULL, of_default_bus_match_table,
			     mxs_auxdata_lookup, NULL);

	if (of_machine_is_compatible("karo,tx28"))
		tx28_post_init();

	if (of_machine_is_compatible("fsl,imx28-evk"))
		imx28_evk_post_init();
}

static const char *imx23_dt_compat[] __initdata = {
	"fsl,imx23",
	NULL,
};

static const char *imx28_dt_compat[] __initdata = {
	"fsl,imx28",
	NULL,
};

DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
	.map_io		= mx23_map_io,
	.init_irq	= icoll_init_irq,
	.handle_irq	= icoll_handle_irq,
	.timer		= &imx23_timer,
	.init_machine	= mxs_machine_init,
	.dt_compat	= imx23_dt_compat,
	.restart	= mxs_restart,
MACHINE_END

DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
	.map_io		= mx28_map_io,
	.init_irq	= icoll_init_irq,
	.handle_irq	= icoll_handle_irq,
	.timer		= &imx28_timer,
	.init_machine	= mxs_machine_init,
	.dt_compat	= imx28_dt_compat,
	.restart	= mxs_restart,
MACHINE_END
Commit	Line	Data
bc3a59c1 DA	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	* Copyright 2012 Linaro Ltd.
	4	*
	5	* The code contained herein is licensed under the GNU General Public
	6	* License. You may obtain a copy of the GNU General Public License
	7	* Version 2 or later at the following locations:
	8	*
	9	* http://www.opensource.org/licenses/gpl-license.html
	10	* http://www.gnu.org/copyleft/gpl.html
	11	*/
	12
	13	#include <linux/clk.h>
	14	#include <linux/clkdev.h>
44ffb78f	15	#include <linux/can/platform/flexcan.h>
2c7c2c1d	16	#include <linux/delay.h>
bc3a59c1	17	#include <linux/err.h>
2c7c2c1d	18	#include <linux/gpio.h>
bc3a59c1	19	#include <linux/init.h>
3143bbb4	20	#include <linux/micrel_phy.h>
ab2815c3	21	#include <linux/mxsfb.h>
bc3a59c1	22	#include <linux/of_platform.h>
3143bbb4	23	#include <linux/phy.h>
2c7c2c1d	24	#include <linux/pinctrl/consumer.h>
bc3a59c1 DA	25	#include <asm/mach/arch.h>
	26	#include <asm/mach/time.h>
	27	#include <mach/common.h>
e317317a	28	#include <mach/digctl.h>
2c7c2c1d	29	#include <mach/mxs.h>
bc3a59c1	30
ab2815c3 SG	31	static struct fb_videomode mx23evk_video_modes[] = {
	32	{
	33	.name = "Samsung-LMS430HF02",
	34	.refresh = 60,
	35	.xres = 480,
	36	.yres = 272,
	37	.pixclock = 108096, /* picosecond (9.2 MHz) */
	38	.left_margin = 15,
	39	.right_margin = 8,
	40	.upper_margin = 12,
	41	.lower_margin = 4,
	42	.hsync_len = 1,
	43	.vsync_len = 1,
	44	.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT \|
	45	FB_SYNC_DOTCLK_FAILING_ACT,
	46	},
	47	};
	48
	49	static struct fb_videomode mx28evk_video_modes[] = {
	50	{
	51	.name = "Seiko-43WVF1G",
	52	.refresh = 60,
	53	.xres = 800,
	54	.yres = 480,
	55	.pixclock = 29851, /* picosecond (33.5 MHz) */
	56	.left_margin = 89,
	57	.right_margin = 164,
	58	.upper_margin = 23,
	59	.lower_margin = 10,
	60	.hsync_len = 10,
	61	.vsync_len = 10,
	62	.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT \|
	63	FB_SYNC_DOTCLK_FAILING_ACT,
	64	},
	65	};
	66
8fa62e11 MV	67	static struct fb_videomode m28evk_video_modes[] = {
	68	{
	69	.name = "Ampire AM-800480R2TMQW-T01H",
	70	.refresh = 60,
	71	.xres = 800,
	72	.yres = 480,
	73	.pixclock = 30066, /* picosecond (33.26 MHz) */
	74	.left_margin = 0,
	75	.right_margin = 256,
	76	.upper_margin = 0,
	77	.lower_margin = 45,
	78	.hsync_len = 1,
	79	.vsync_len = 1,
	80	.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
	81	},
	82	};
	83
d8bb823d LH	84	static struct fb_videomode apx4devkit_video_modes[] = {
	85	{
	86	.name = "HannStar PJ70112A",
	87	.refresh = 60,
	88	.xres = 800,
	89	.yres = 480,
	90	.pixclock = 33333, /* picosecond (30.00 MHz) */
	91	.left_margin = 88,
	92	.right_margin = 40,
	93	.upper_margin = 32,
	94	.lower_margin = 13,
	95	.hsync_len = 48,
	96	.vsync_len = 3,
	97	.sync = FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT \|
	98	FB_SYNC_DATA_ENABLE_HIGH_ACT \|
	99	FB_SYNC_DOTCLK_FAILING_ACT,
	100	},
	101	};
	102
ab2815c3 SG	103	static struct mxsfb_platform_data mxsfb_pdata __initdata;
ab2815c3 SG	104
44ffb78f SG	105	/*
	106	* MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
	107	*/
	108	#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
	109
	110	static int flexcan0_en, flexcan1_en;
	111
	112	static void mx28evk_flexcan_switch(void)
	113	{
	114	if (flexcan0_en \|\| flexcan1_en)
	115	gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
	116	else
	117	gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
	118	}
	119
	120	static void mx28evk_flexcan0_switch(int enable)
	121	{
	122	flexcan0_en = enable;
	123	mx28evk_flexcan_switch();
	124	}
	125
	126	static void mx28evk_flexcan1_switch(int enable)
	127	{
	128	flexcan1_en = enable;
	129	mx28evk_flexcan_switch();
	130	}
	131
	132	static struct flexcan_platform_data flexcan_pdata[2];
	133
ab2815c3 SG	134	static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
	135	OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
	136	OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
44ffb78f SG	137	OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]),
44ffb78f SG	138	OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]),
ab2815c3 SG	139	{ /* sentinel */ }
	140	};
	141
2954ff39 SG	142	static void __init imx23_timer_init(void)
	143	{
	144	mx23_clocks_init();
	145	}
	146
	147	static struct sys_timer imx23_timer = {
	148	.init = imx23_timer_init,
	149	};
	150
bc3a59c1 DA	151	static void __init imx28_timer_init(void)
	152	{
	153	mx28_clocks_init();
	154	}
	155
	156	static struct sys_timer imx28_timer = {
	157	.init = imx28_timer_init,
	158	};
	159
5653acc2 SG	160	enum mac_oui {
	161	OUI_FSL,
	162	OUI_DENX,
8eec4b31	163	OUI_CRYSTALFONTZ,
5653acc2 SG	164	};
	165
	166	static void __init update_fec_mac_prop(enum mac_oui oui)
	167	{
	168	struct device_node np, from = NULL;
fa7c865a	169	struct property *newmac;
5653acc2 SG	170	const u32 *ocotp = mxs_get_ocotp();
	171	u8 *macaddr;
	172	u32 val;
	173	int i;
	174
	175	for (i = 0; i < 2; i++) {
	176	np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
	177	if (!np)
	178	return;
	179	from = np;
	180
	181	newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
	182	if (!newmac)
	183	return;
	184	newmac->value = newmac + 1;
	185	newmac->length = 6;
	186
	187	newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
	188	if (!newmac->name) {
	189	kfree(newmac);
	190	return;
	191	}
	192
	193	/*
	194	* OCOTP only stores the last 4 octets for each mac address,
	195	* so hard-code OUI here.
	196	*/
	197	macaddr = newmac->value;
	198	switch (oui) {
	199	case OUI_FSL:
	200	macaddr[0] = 0x00;
	201	macaddr[1] = 0x04;
	202	macaddr[2] = 0x9f;
	203	break;
	204	case OUI_DENX:
	205	macaddr[0] = 0xc0;
	206	macaddr[1] = 0xe5;
	207	macaddr[2] = 0x4e;
	208	break;
8eec4b31 MR	209	case OUI_CRYSTALFONTZ:
	210	macaddr[0] = 0x58;
	211	macaddr[1] = 0xb9;
	212	macaddr[2] = 0xe1;
	213	break;
5653acc2 SG	214	}
	215	val = ocotp[i];
	216	macaddr[3] = (val >> 16) & 0xff;
	217	macaddr[4] = (val >> 8) & 0xff;
	218	macaddr[5] = (val >> 0) & 0xff;
	219
fa7c865a	220	prom_update_property(np, newmac);
5653acc2 SG	221	}
	222	}
	223
ab2815c3 SG	224	static void __init imx23_evk_init(void)
	225	{
	226	mxsfb_pdata.mode_list = mx23evk_video_modes;
	227	mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
	228	mxsfb_pdata.default_bpp = 32;
	229	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
	230	}
	231
8fa62e11	232	static inline void enable_clk_enet_out(void)
bc3a59c1	233	{
8fa62e11	234	struct clk *clk = clk_get_sys("enet_out", NULL);
bc3a59c1	235
bc3a59c1 DA	236	if (!IS_ERR(clk))
bc3a59c1 DA	237	clk_prepare_enable(clk);
8fa62e11	238	}
5653acc2	239
8fa62e11 MV	240	static void __init imx28_evk_init(void)
	241	{
	242	enable_clk_enet_out();
5653acc2	243	update_fec_mac_prop(OUI_FSL);
ab2815c3 SG	244
	245	mxsfb_pdata.mode_list = mx28evk_video_modes;
	246	mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
	247	mxsfb_pdata.default_bpp = 32;
	248	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
e317317a DA	249
e317317a DA	250	mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
bc3a59c1 DA	251	}
bc3a59c1 DA	252
44ffb78f	253	static void __init imx28_evk_post_init(void)
8fa62e11	254	{
44ffb78f SG	255	if (!gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
	256	"flexcan-switch")) {
	257	flexcan_pdata[0].transceiver_switch = mx28evk_flexcan0_switch;
	258	flexcan_pdata[1].transceiver_switch = mx28evk_flexcan1_switch;
	259	}
	260	}
8fa62e11	261
8fa62e11 MV	262	static void __init m28evk_init(void)
8fa62e11 MV	263	{
8fa62e11 MV	264	mxsfb_pdata.mode_list = m28evk_video_modes;
	265	mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
	266	mxsfb_pdata.default_bpp = 16;
	267	mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
	268	}
	269
3143bbb4 SG	270	static int apx4devkit_phy_fixup(struct phy_device *phy)
	271	{
	272	phy->dev_flags \|= MICREL_PHY_50MHZ_CLK;
	273	return 0;
	274	}
	275
	276	static void __init apx4devkit_init(void)
	277	{
	278	enable_clk_enet_out();
	279
	280	if (IS_BUILTIN(CONFIG_PHYLIB))
510d573f	281	phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK,
3143bbb4	282	apx4devkit_phy_fixup);
d8bb823d LH	283
	284	mxsfb_pdata.mode_list = apx4devkit_video_modes;
	285	mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
	286	mxsfb_pdata.default_bpp = 32;
	287	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
3143bbb4 SG	288	}
3143bbb4 SG	289
2c7c2c1d SG	290	#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
	291	#define ENET0_MDIO__GPIO_4_1 MXS_GPIO_NR(4, 1)
	292	#define ENET0_RX_EN__GPIO_4_2 MXS_GPIO_NR(4, 2)
	293	#define ENET0_RXD0__GPIO_4_3 MXS_GPIO_NR(4, 3)
	294	#define ENET0_RXD1__GPIO_4_4 MXS_GPIO_NR(4, 4)
	295	#define ENET0_TX_EN__GPIO_4_6 MXS_GPIO_NR(4, 6)
	296	#define ENET0_TXD0__GPIO_4_7 MXS_GPIO_NR(4, 7)
	297	#define ENET0_TXD1__GPIO_4_8 MXS_GPIO_NR(4, 8)
	298	#define ENET_CLK__GPIO_4_16 MXS_GPIO_NR(4, 16)
	299
	300	#define TX28_FEC_PHY_POWER MXS_GPIO_NR(3, 29)
	301	#define TX28_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
	302	#define TX28_FEC_nINT MXS_GPIO_NR(4, 5)
	303
	304	static const struct gpio tx28_gpios[] __initconst = {
	305	{ ENET0_MDC__GPIO_4_0, GPIOF_OUT_INIT_LOW, "GPIO_4_0" },
	306	{ ENET0_MDIO__GPIO_4_1, GPIOF_OUT_INIT_LOW, "GPIO_4_1" },
	307	{ ENET0_RX_EN__GPIO_4_2, GPIOF_OUT_INIT_LOW, "GPIO_4_2" },
	308	{ ENET0_RXD0__GPIO_4_3, GPIOF_OUT_INIT_LOW, "GPIO_4_3" },
	309	{ ENET0_RXD1__GPIO_4_4, GPIOF_OUT_INIT_LOW, "GPIO_4_4" },
	310	{ ENET0_TX_EN__GPIO_4_6, GPIOF_OUT_INIT_LOW, "GPIO_4_6" },
	311	{ ENET0_TXD0__GPIO_4_7, GPIOF_OUT_INIT_LOW, "GPIO_4_7" },
	312	{ ENET0_TXD1__GPIO_4_8, GPIOF_OUT_INIT_LOW, "GPIO_4_8" },
	313	{ ENET_CLK__GPIO_4_16, GPIOF_OUT_INIT_LOW, "GPIO_4_16" },
	314	{ TX28_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" },
	315	{ TX28_FEC_PHY_RESET, GPIOF_OUT_INIT_LOW, "fec-phy-reset" },
	316	{ TX28_FEC_nINT, GPIOF_DIR_IN, "fec-int" },
	317	};
	318
	319	static void __init tx28_post_init(void)
	320	{
	321	struct device_node *np;
	322	struct platform_device *pdev;
	323	struct pinctrl *pctl;
	324	int ret;
	325
	326	enable_clk_enet_out();
	327
	328	np = of_find_compatible_node(NULL, NULL, "fsl,imx28-fec");
	329	pdev = of_find_device_by_node(np);
	330	if (!pdev) {
	331	pr_err("%s: failed to find fec device\n", __func__);
	332	return;
	333	}
	334
	335	pctl = pinctrl_get_select(&pdev->dev, "gpio_mode");
	336	if (IS_ERR(pctl)) {
	337	pr_err("%s: failed to get pinctrl state\n", __func__);
	338	return;
	339	}
	340
	341	ret = gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
	342	if (ret) {
	343	pr_err("%s: failed to request gpios: %d\n", __func__, ret);
	344	return;
	345	}
	346
	347	/* Power up fec phy */
	348	gpio_set_value(TX28_FEC_PHY_POWER, 1);
	349	msleep(26); /* 25ms according to data sheet */
	350
	351	/* Mode strap pins */
	352	gpio_set_value(ENET0_RX_EN__GPIO_4_2, 1);
	353	gpio_set_value(ENET0_RXD0__GPIO_4_3, 1);
354	gpio_set_value(ENET0_RXD1__GPIO_4_4, 1);
355
356	udelay(100); /* minimum assertion time for nRST */
357
358	/* Deasserting FEC PHY RESET */
359	gpio_set_value(TX28_FEC_PHY_RESET, 1);
360
361	pinctrl_put(pctl);
362	}
363
8eec4b31 MR	364	static void __init cfa10049_init(void)
	365	{
	366	enable_clk_enet_out();
	367	update_fec_mac_prop(OUI_CRYSTALFONTZ);
	368	}
	369
a957fdca JB	370	static void __init apf28_init(void)
	371	{
	372	enable_clk_enet_out();
	373	}
	374
bc3a59c1 DA	375	static void __init mxs_machine_init(void)
	376	{
	377	if (of_machine_is_compatible("fsl,imx28-evk"))
	378	imx28_evk_init();
ab2815c3 SG	379	else if (of_machine_is_compatible("fsl,imx23-evk"))
ab2815c3 SG	380	imx23_evk_init();
8fa62e11 MV	381	else if (of_machine_is_compatible("denx,m28evk"))
8fa62e11 MV	382	m28evk_init();
3143bbb4 SG	383	else if (of_machine_is_compatible("bluegiga,apx4devkit"))
3143bbb4 SG	384	apx4devkit_init();
8eec4b31 MR	385	else if (of_machine_is_compatible("crystalfontz,cfa10049"))
8eec4b31 MR	386	cfa10049_init();
a957fdca JB	387	else if (of_machine_is_compatible("armadeus,imx28-apf28"))
a957fdca JB	388	apf28_init();
bc3a59c1 DA	389
bc3a59c1 DA	390	of_platform_populate(NULL, of_default_bus_match_table,
ab2815c3	391	mxs_auxdata_lookup, NULL);
2c7c2c1d SG	392
	393	if (of_machine_is_compatible("karo,tx28"))
	394	tx28_post_init();
44ffb78f SG	395
	396	if (of_machine_is_compatible("fsl,imx28-evk"))
	397	imx28_evk_post_init();
bc3a59c1 DA	398	}
bc3a59c1 DA	399
2954ff39	400	static const char *imx23_dt_compat[] __initdata = {
2954ff39 SG	401	"fsl,imx23",
	402	NULL,
	403	};
	404
bc3a59c1	405	static const char *imx28_dt_compat[] __initdata = {
bc3a59c1 DA	406	"fsl,imx28",
	407	NULL,
	408	};
	409
2954ff39 SG	410	DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
2954ff39 SG	411	.map_io = mx23_map_io,
83a84efc	412	.init_irq = icoll_init_irq,
4e0a1b8c	413	.handle_irq = icoll_handle_irq,
2954ff39 SG	414	.timer = &imx23_timer,
	415	.init_machine = mxs_machine_init,
	416	.dt_compat = imx23_dt_compat,
	417	.restart = mxs_restart,
	418	MACHINE_END
	419
bc3a59c1 DA	420	DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
bc3a59c1 DA	421	.map_io = mx28_map_io,
83a84efc	422	.init_irq = icoll_init_irq,
4e0a1b8c	423	.handle_irq = icoll_handle_irq,
bc3a59c1 DA	424	.timer = &imx28_timer,
	425	.init_machine = mxs_machine_init,
	426	.dt_compat = imx28_dt_compat,
	427	.restart = mxs_restart,
	428	MACHINE_END