[deliverable/linux.git] / arch / arm / mach-mxs / mach-mxs.c

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 * Copyright 2012 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/init.h>
#include <linux/irqdomain.h>
#include <linux/micrel_phy.h>
#include <linux/mxsfb.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/phy.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <mach/common.h>

static struct fb_videomode mx23evk_video_modes[] = {
	{
		.name		= "Samsung-LMS430HF02",
		.refresh	= 60,
		.xres		= 480,
		.yres		= 272,
		.pixclock	= 108096, /* picosecond (9.2 MHz) */
		.left_margin	= 15,
		.right_margin	= 8,
		.upper_margin	= 12,
		.lower_margin	= 4,
		.hsync_len	= 1,
		.vsync_len	= 1,
		.sync		= FB_SYNC_DATA_ENABLE_HIGH_ACT |
				  FB_SYNC_DOTCLK_FAILING_ACT,
	},
};

static struct fb_videomode mx28evk_video_modes[] = {
	{
		.name		= "Seiko-43WVF1G",
		.refresh	= 60,
		.xres		= 800,
		.yres		= 480,
		.pixclock	= 29851, /* picosecond (33.5 MHz) */
		.left_margin	= 89,
		.right_margin	= 164,
		.upper_margin	= 23,
		.lower_margin	= 10,
		.hsync_len	= 10,
		.vsync_len	= 10,
		.sync		= FB_SYNC_DATA_ENABLE_HIGH_ACT |
				  FB_SYNC_DOTCLK_FAILING_ACT,
	},
};

static struct fb_videomode m28evk_video_modes[] = {
	{
		.name		= "Ampire AM-800480R2TMQW-T01H",
		.refresh	= 60,
		.xres		= 800,
		.yres		= 480,
		.pixclock	= 30066, /* picosecond (33.26 MHz) */
		.left_margin	= 0,
		.right_margin	= 256,
		.upper_margin	= 0,
		.lower_margin	= 45,
		.hsync_len	= 1,
		.vsync_len	= 1,
		.sync		= FB_SYNC_DATA_ENABLE_HIGH_ACT,
	},
};

static struct fb_videomode apx4devkit_video_modes[] = {
	{
		.name		= "HannStar PJ70112A",
		.refresh	= 60,
		.xres		= 800,
		.yres		= 480,
		.pixclock	= 33333, /* picosecond (30.00 MHz) */
		.left_margin	= 88,
		.right_margin	= 40,
		.upper_margin	= 32,
		.lower_margin	= 13,
		.hsync_len	= 48,
		.vsync_len	= 3,
		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
				  FB_SYNC_DATA_ENABLE_HIGH_ACT |
				  FB_SYNC_DOTCLK_FAILING_ACT,
	},
};

static struct mxsfb_platform_data mxsfb_pdata __initdata;

static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
	OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
	OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
	{ /* sentinel */ }
};

static int __init mxs_icoll_add_irq_domain(struct device_node *np,
				struct device_node *interrupt_parent)
{
	irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);

	return 0;
}

static int __init mxs_gpio_add_irq_domain(struct device_node *np,
				struct device_node *interrupt_parent)
{
	static int gpio_irq_base = MXS_GPIO_IRQ_START;

	irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
	gpio_irq_base += 32;

	return 0;
}

static const struct of_device_id mxs_irq_match[] __initconst = {
	{ .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, },
	{ .compatible = "fsl,mxs-gpio", .data = mxs_gpio_add_irq_domain, },
	{ /* sentinel */ }
};

static void __init mxs_dt_init_irq(void)
{
	icoll_init_irq();
	of_irq_init(mxs_irq_match);
}

static void __init imx23_timer_init(void)
{
	mx23_clocks_init();
}

static struct sys_timer imx23_timer = {
	.init = imx23_timer_init,
};

static void __init imx28_timer_init(void)
{
	mx28_clocks_init();
}

static struct sys_timer imx28_timer = {
	.init = imx28_timer_init,
};

enum mac_oui {
	OUI_FSL,
	OUI_DENX,
};

static void __init update_fec_mac_prop(enum mac_oui oui)
{
	struct device_node *np, *from = NULL;
	struct property *oldmac, *newmac;
	const u32 *ocotp = mxs_get_ocotp();
	u8 *macaddr;
	u32 val;
	int i;

	for (i = 0; i < 2; i++) {
		np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
		if (!np)
			return;
		from = np;

		newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
		if (!newmac)
			return;
		newmac->value = newmac + 1;
		newmac->length = 6;

		newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
		if (!newmac->name) {
			kfree(newmac);
			return;
		}

		/*
		 * OCOTP only stores the last 4 octets for each mac address,
		 * so hard-code OUI here.
		 */
		macaddr = newmac->value;
		switch (oui) {
		case OUI_FSL:
			macaddr[0] = 0x00;
			macaddr[1] = 0x04;
			macaddr[2] = 0x9f;
			break;
		case OUI_DENX:
			macaddr[0] = 0xc0;
			macaddr[1] = 0xe5;
			macaddr[2] = 0x4e;
			break;
		}
		val = ocotp[i];
		macaddr[3] = (val >> 16) & 0xff;
		macaddr[4] = (val >> 8) & 0xff;
		macaddr[5] = (val >> 0) & 0xff;

		oldmac = of_find_property(np, newmac->name, NULL);
		if (oldmac)
			prom_update_property(np, newmac, oldmac);
		else
			prom_add_property(np, newmac);
	}
}

static void __init imx23_evk_init(void)
{
	mxsfb_pdata.mode_list = mx23evk_video_modes;
	mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
	mxsfb_pdata.default_bpp = 32;
	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
}

static inline void enable_clk_enet_out(void)
{
	struct clk *clk = clk_get_sys("enet_out", NULL);

	if (!IS_ERR(clk))
		clk_prepare_enable(clk);
}

static void __init imx28_evk_init(void)
{
	enable_clk_enet_out();
	update_fec_mac_prop(OUI_FSL);

	mxsfb_pdata.mode_list = mx28evk_video_modes;
	mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
	mxsfb_pdata.default_bpp = 32;
	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
}

static void __init m28evk_init(void)
{
	enable_clk_enet_out();
	update_fec_mac_prop(OUI_DENX);

	mxsfb_pdata.mode_list = m28evk_video_modes;
	mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
	mxsfb_pdata.default_bpp = 16;
	mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
}

static int apx4devkit_phy_fixup(struct phy_device *phy)
{
	phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
	return 0;
}

static void __init apx4devkit_init(void)
{
	enable_clk_enet_out();

	if (IS_BUILTIN(CONFIG_PHYLIB))
		phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK,
					   apx4devkit_phy_fixup);

	mxsfb_pdata.mode_list = apx4devkit_video_modes;
	mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
	mxsfb_pdata.default_bpp = 32;
	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
}

static void __init mxs_machine_init(void)
{
	if (of_machine_is_compatible("fsl,imx28-evk"))
		imx28_evk_init();
	else if (of_machine_is_compatible("fsl,imx23-evk"))
		imx23_evk_init();
	else if (of_machine_is_compatible("denx,m28evk"))
		m28evk_init();
	else if (of_machine_is_compatible("bluegiga,apx4devkit"))
		apx4devkit_init();

	of_platform_populate(NULL, of_default_bus_match_table,
			     mxs_auxdata_lookup, NULL);
}

static const char *imx23_dt_compat[] __initdata = {
	"fsl,imx23-evk",
	"fsl,stmp378x_devb"
	"olimex,imx23-olinuxino",
	"fsl,imx23",
	NULL,
};

static const char *imx28_dt_compat[] __initdata = {
	"bluegiga,apx4devkit",
	"crystalfontz,cfa10036",
	"denx,m28evk",
	"fsl,imx28-evk",
	"karo,tx28",
	"fsl,imx28",
	NULL,
};

DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
	.map_io		= mx23_map_io,
	.init_irq	= mxs_dt_init_irq,
	.timer		= &imx23_timer,
	.init_machine	= mxs_machine_init,
	.dt_compat	= imx23_dt_compat,
	.restart	= mxs_restart,
MACHINE_END

DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
	.map_io		= mx28_map_io,
	.init_irq	= mxs_dt_init_irq,
	.timer		= &imx28_timer,
	.init_machine	= mxs_machine_init,
	.dt_compat	= imx28_dt_compat,
	.restart	= mxs_restart,
MACHINE_END
Commit	Line	Data
bc3a59c1 DA	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	* Copyright 2012 Linaro Ltd.
	4	*
	5	* The code contained herein is licensed under the GNU General Public
	6	* License. You may obtain a copy of the GNU General Public License
	7	* Version 2 or later at the following locations:
	8	*
	9	* http://www.opensource.org/licenses/gpl-license.html
	10	* http://www.gnu.org/copyleft/gpl.html
	11	*/
	12
	13	#include <linux/clk.h>
	14	#include <linux/clkdev.h>
	15	#include <linux/err.h>
	16	#include <linux/init.h>
	17	#include <linux/init.h>
	18	#include <linux/irqdomain.h>
3143bbb4	19	#include <linux/micrel_phy.h>
ab2815c3	20	#include <linux/mxsfb.h>
bc3a59c1 DA	21	#include <linux/of_irq.h>
bc3a59c1 DA	22	#include <linux/of_platform.h>
3143bbb4	23	#include <linux/phy.h>
bc3a59c1 DA	24	#include <asm/mach/arch.h>
	25	#include <asm/mach/time.h>
	26	#include <mach/common.h>
	27
ab2815c3 SG	28	static struct fb_videomode mx23evk_video_modes[] = {
	29	{
	30	.name = "Samsung-LMS430HF02",
	31	.refresh = 60,
	32	.xres = 480,
	33	.yres = 272,
	34	.pixclock = 108096, /* picosecond (9.2 MHz) */
	35	.left_margin = 15,
	36	.right_margin = 8,
	37	.upper_margin = 12,
	38	.lower_margin = 4,
	39	.hsync_len = 1,
	40	.vsync_len = 1,
	41	.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT \|
	42	FB_SYNC_DOTCLK_FAILING_ACT,
	43	},
	44	};
	45
	46	static struct fb_videomode mx28evk_video_modes[] = {
	47	{
	48	.name = "Seiko-43WVF1G",
	49	.refresh = 60,
	50	.xres = 800,
	51	.yres = 480,
	52	.pixclock = 29851, /* picosecond (33.5 MHz) */
	53	.left_margin = 89,
	54	.right_margin = 164,
	55	.upper_margin = 23,
	56	.lower_margin = 10,
	57	.hsync_len = 10,
	58	.vsync_len = 10,
	59	.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT \|
	60	FB_SYNC_DOTCLK_FAILING_ACT,
	61	},
	62	};
	63
8fa62e11 MV	64	static struct fb_videomode m28evk_video_modes[] = {
	65	{
	66	.name = "Ampire AM-800480R2TMQW-T01H",
	67	.refresh = 60,
	68	.xres = 800,
	69	.yres = 480,
	70	.pixclock = 30066, /* picosecond (33.26 MHz) */
	71	.left_margin = 0,
	72	.right_margin = 256,
	73	.upper_margin = 0,
	74	.lower_margin = 45,
	75	.hsync_len = 1,
	76	.vsync_len = 1,
	77	.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
	78	},
	79	};
	80
d8bb823d LH	81	static struct fb_videomode apx4devkit_video_modes[] = {
	82	{
	83	.name = "HannStar PJ70112A",
	84	.refresh = 60,
	85	.xres = 800,
	86	.yres = 480,
	87	.pixclock = 33333, /* picosecond (30.00 MHz) */
	88	.left_margin = 88,
	89	.right_margin = 40,
	90	.upper_margin = 32,
	91	.lower_margin = 13,
	92	.hsync_len = 48,
	93	.vsync_len = 3,
	94	.sync = FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT \|
	95	FB_SYNC_DATA_ENABLE_HIGH_ACT \|
	96	FB_SYNC_DOTCLK_FAILING_ACT,
	97	},
	98	};
	99
ab2815c3 SG	100	static struct mxsfb_platform_data mxsfb_pdata __initdata;
	101
	102	static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
	103	OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
	104	OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
	105	{ /* sentinel */ }
	106	};
	107
bc3a59c1 DA	108	static int __init mxs_icoll_add_irq_domain(struct device_node *np,
	109	struct device_node *interrupt_parent)
	110	{
	111	irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
	112
	113	return 0;
	114	}
	115
ce4c6f9b SG	116	static int __init mxs_gpio_add_irq_domain(struct device_node *np,
	117	struct device_node *interrupt_parent)
	118	{
	119	static int gpio_irq_base = MXS_GPIO_IRQ_START;
	120
	121	irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
	122	gpio_irq_base += 32;
	123
	124	return 0;
	125	}
	126
bc3a59c1 DA	127	static const struct of_device_id mxs_irq_match[] __initconst = {
bc3a59c1 DA	128	{ .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, },
ce4c6f9b	129	{ .compatible = "fsl,mxs-gpio", .data = mxs_gpio_add_irq_domain, },
bc3a59c1 DA	130	{ /* sentinel */ }
	131	};
	132
	133	static void __init mxs_dt_init_irq(void)
	134	{
	135	icoll_init_irq();
	136	of_irq_init(mxs_irq_match);
	137	}
	138
2954ff39 SG	139	static void __init imx23_timer_init(void)
	140	{
	141	mx23_clocks_init();
	142	}
	143
	144	static struct sys_timer imx23_timer = {
	145	.init = imx23_timer_init,
	146	};
	147
bc3a59c1 DA	148	static void __init imx28_timer_init(void)
	149	{
	150	mx28_clocks_init();
	151	}
	152
	153	static struct sys_timer imx28_timer = {
	154	.init = imx28_timer_init,
	155	};
	156
5653acc2 SG	157	enum mac_oui {
	158	OUI_FSL,
	159	OUI_DENX,
	160	};
	161
	162	static void __init update_fec_mac_prop(enum mac_oui oui)
	163	{
	164	struct device_node np, from = NULL;
	165	struct property oldmac, newmac;
	166	const u32 *ocotp = mxs_get_ocotp();
	167	u8 *macaddr;
	168	u32 val;
	169	int i;
	170
	171	for (i = 0; i < 2; i++) {
	172	np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
	173	if (!np)
	174	return;
	175	from = np;
	176
	177	newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
	178	if (!newmac)
	179	return;
	180	newmac->value = newmac + 1;
	181	newmac->length = 6;
	182
	183	newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
	184	if (!newmac->name) {
	185	kfree(newmac);
	186	return;
	187	}
	188
	189	/*
	190	* OCOTP only stores the last 4 octets for each mac address,
	191	* so hard-code OUI here.
	192	*/
	193	macaddr = newmac->value;
	194	switch (oui) {
	195	case OUI_FSL:
	196	macaddr[0] = 0x00;
	197	macaddr[1] = 0x04;
	198	macaddr[2] = 0x9f;
	199	break;
	200	case OUI_DENX:
	201	macaddr[0] = 0xc0;
	202	macaddr[1] = 0xe5;
	203	macaddr[2] = 0x4e;
	204	break;
	205	}
	206	val = ocotp[i];
	207	macaddr[3] = (val >> 16) & 0xff;
	208	macaddr[4] = (val >> 8) & 0xff;
	209	macaddr[5] = (val >> 0) & 0xff;
	210
	211	oldmac = of_find_property(np, newmac->name, NULL);
	212	if (oldmac)
	213	prom_update_property(np, newmac, oldmac);
	214	else
	215	prom_add_property(np, newmac);
	216	}
	217	}
	218
ab2815c3 SG	219	static void __init imx23_evk_init(void)
	220	{
	221	mxsfb_pdata.mode_list = mx23evk_video_modes;
	222	mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
	223	mxsfb_pdata.default_bpp = 32;
	224	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
	225	}
	226
8fa62e11	227	static inline void enable_clk_enet_out(void)
bc3a59c1	228	{
8fa62e11	229	struct clk *clk = clk_get_sys("enet_out", NULL);
bc3a59c1	230
bc3a59c1 DA	231	if (!IS_ERR(clk))
bc3a59c1 DA	232	clk_prepare_enable(clk);
8fa62e11	233	}
5653acc2	234
8fa62e11 MV	235	static void __init imx28_evk_init(void)
	236	{
	237	enable_clk_enet_out();
5653acc2	238	update_fec_mac_prop(OUI_FSL);
ab2815c3 SG	239
	240	mxsfb_pdata.mode_list = mx28evk_video_modes;
	241	mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
	242	mxsfb_pdata.default_bpp = 32;
	243	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
bc3a59c1 DA	244	}
bc3a59c1 DA	245
8fa62e11 MV	246	static void __init m28evk_init(void)
	247	{
	248	enable_clk_enet_out();
	249	update_fec_mac_prop(OUI_DENX);
	250
	251	mxsfb_pdata.mode_list = m28evk_video_modes;
	252	mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
	253	mxsfb_pdata.default_bpp = 16;
	254	mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
	255	}
	256
3143bbb4 SG	257	static int apx4devkit_phy_fixup(struct phy_device *phy)
	258	{
	259	phy->dev_flags \|= MICREL_PHY_50MHZ_CLK;
	260	return 0;
	261	}
	262
	263	static void __init apx4devkit_init(void)
	264	{
	265	enable_clk_enet_out();
	266
	267	if (IS_BUILTIN(CONFIG_PHYLIB))
	268	phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK,
	269	apx4devkit_phy_fixup);
d8bb823d LH	270
	271	mxsfb_pdata.mode_list = apx4devkit_video_modes;
	272	mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
	273	mxsfb_pdata.default_bpp = 32;
	274	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
3143bbb4 SG	275	}
3143bbb4 SG	276
bc3a59c1 DA	277	static void __init mxs_machine_init(void)
	278	{
	279	if (of_machine_is_compatible("fsl,imx28-evk"))
	280	imx28_evk_init();
ab2815c3 SG	281	else if (of_machine_is_compatible("fsl,imx23-evk"))
ab2815c3 SG	282	imx23_evk_init();
8fa62e11 MV	283	else if (of_machine_is_compatible("denx,m28evk"))
8fa62e11 MV	284	m28evk_init();
3143bbb4 SG	285	else if (of_machine_is_compatible("bluegiga,apx4devkit"))
3143bbb4 SG	286	apx4devkit_init();
bc3a59c1 DA	287
bc3a59c1 DA	288	of_platform_populate(NULL, of_default_bus_match_table,
ab2815c3	289	mxs_auxdata_lookup, NULL);
bc3a59c1 DA	290	}
bc3a59c1 DA	291
2954ff39 SG	292	static const char *imx23_dt_compat[] __initdata = {
2954ff39 SG	293	"fsl,imx23-evk",
dd852aa5	294	"fsl,stmp378x_devb"
b9df4491	295	"olimex,imx23-olinuxino",
2954ff39 SG	296	"fsl,imx23",
	297	NULL,
	298	};
	299
bc3a59c1	300	static const char *imx28_dt_compat[] __initdata = {
3143bbb4	301	"bluegiga,apx4devkit",
330eaaf9	302	"crystalfontz,cfa10036",
8fa62e11	303	"denx,m28evk",
bc3a59c1	304	"fsl,imx28-evk",
e1a4d18f	305	"karo,tx28",
bc3a59c1 DA	306	"fsl,imx28",
	307	NULL,
	308	};
	309
2954ff39 SG	310	DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
	311	.map_io = mx23_map_io,
	312	.init_irq = mxs_dt_init_irq,
	313	.timer = &imx23_timer,
	314	.init_machine = mxs_machine_init,
	315	.dt_compat = imx23_dt_compat,
	316	.restart = mxs_restart,
	317	MACHINE_END
	318
bc3a59c1 DA	319	DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
	320	.map_io = mx28_map_io,
	321	.init_irq = mxs_dt_init_irq,
	322	.timer = &imx28_timer,
	323	.init_machine = mxs_machine_init,
	324	.dt_compat = imx28_dt_compat,
	325	.restart = mxs_restart,
	326	MACHINE_END