Commit | Line | Data |
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bc3a59c1 DA |
1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
3 | * Copyright 2012 Linaro Ltd. | |
4 | * | |
5 | * The code contained herein is licensed under the GNU General Public | |
6 | * License. You may obtain a copy of the GNU General Public License | |
7 | * Version 2 or later at the following locations: | |
8 | * | |
9 | * http://www.opensource.org/licenses/gpl-license.html | |
10 | * http://www.gnu.org/copyleft/gpl.html | |
11 | */ | |
12 | ||
13 | #include <linux/clk.h> | |
14 | #include <linux/clkdev.h> | |
15 | #include <linux/err.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/irqdomain.h> | |
3143bbb4 | 19 | #include <linux/micrel_phy.h> |
ab2815c3 | 20 | #include <linux/mxsfb.h> |
bc3a59c1 DA |
21 | #include <linux/of_irq.h> |
22 | #include <linux/of_platform.h> | |
3143bbb4 | 23 | #include <linux/phy.h> |
bc3a59c1 DA |
24 | #include <asm/mach/arch.h> |
25 | #include <asm/mach/time.h> | |
26 | #include <mach/common.h> | |
e317317a | 27 | #include <mach/digctl.h> |
bc3a59c1 | 28 | |
ab2815c3 SG |
29 | static struct fb_videomode mx23evk_video_modes[] = { |
30 | { | |
31 | .name = "Samsung-LMS430HF02", | |
32 | .refresh = 60, | |
33 | .xres = 480, | |
34 | .yres = 272, | |
35 | .pixclock = 108096, /* picosecond (9.2 MHz) */ | |
36 | .left_margin = 15, | |
37 | .right_margin = 8, | |
38 | .upper_margin = 12, | |
39 | .lower_margin = 4, | |
40 | .hsync_len = 1, | |
41 | .vsync_len = 1, | |
42 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | | |
43 | FB_SYNC_DOTCLK_FAILING_ACT, | |
44 | }, | |
45 | }; | |
46 | ||
47 | static struct fb_videomode mx28evk_video_modes[] = { | |
48 | { | |
49 | .name = "Seiko-43WVF1G", | |
50 | .refresh = 60, | |
51 | .xres = 800, | |
52 | .yres = 480, | |
53 | .pixclock = 29851, /* picosecond (33.5 MHz) */ | |
54 | .left_margin = 89, | |
55 | .right_margin = 164, | |
56 | .upper_margin = 23, | |
57 | .lower_margin = 10, | |
58 | .hsync_len = 10, | |
59 | .vsync_len = 10, | |
60 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | | |
61 | FB_SYNC_DOTCLK_FAILING_ACT, | |
62 | }, | |
63 | }; | |
64 | ||
8fa62e11 MV |
65 | static struct fb_videomode m28evk_video_modes[] = { |
66 | { | |
67 | .name = "Ampire AM-800480R2TMQW-T01H", | |
68 | .refresh = 60, | |
69 | .xres = 800, | |
70 | .yres = 480, | |
71 | .pixclock = 30066, /* picosecond (33.26 MHz) */ | |
72 | .left_margin = 0, | |
73 | .right_margin = 256, | |
74 | .upper_margin = 0, | |
75 | .lower_margin = 45, | |
76 | .hsync_len = 1, | |
77 | .vsync_len = 1, | |
78 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT, | |
79 | }, | |
80 | }; | |
81 | ||
d8bb823d LH |
82 | static struct fb_videomode apx4devkit_video_modes[] = { |
83 | { | |
84 | .name = "HannStar PJ70112A", | |
85 | .refresh = 60, | |
86 | .xres = 800, | |
87 | .yres = 480, | |
88 | .pixclock = 33333, /* picosecond (30.00 MHz) */ | |
89 | .left_margin = 88, | |
90 | .right_margin = 40, | |
91 | .upper_margin = 32, | |
92 | .lower_margin = 13, | |
93 | .hsync_len = 48, | |
94 | .vsync_len = 3, | |
95 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | | |
96 | FB_SYNC_DATA_ENABLE_HIGH_ACT | | |
97 | FB_SYNC_DOTCLK_FAILING_ACT, | |
98 | }, | |
99 | }; | |
100 | ||
ab2815c3 SG |
101 | static struct mxsfb_platform_data mxsfb_pdata __initdata; |
102 | ||
103 | static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { | |
104 | OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata), | |
105 | OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata), | |
106 | { /* sentinel */ } | |
107 | }; | |
108 | ||
bc3a59c1 DA |
109 | static int __init mxs_icoll_add_irq_domain(struct device_node *np, |
110 | struct device_node *interrupt_parent) | |
111 | { | |
112 | irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL); | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
ce4c6f9b SG |
117 | static int __init mxs_gpio_add_irq_domain(struct device_node *np, |
118 | struct device_node *interrupt_parent) | |
119 | { | |
120 | static int gpio_irq_base = MXS_GPIO_IRQ_START; | |
121 | ||
122 | irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL); | |
123 | gpio_irq_base += 32; | |
124 | ||
125 | return 0; | |
126 | } | |
127 | ||
bc3a59c1 DA |
128 | static const struct of_device_id mxs_irq_match[] __initconst = { |
129 | { .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, }, | |
ce4c6f9b | 130 | { .compatible = "fsl,mxs-gpio", .data = mxs_gpio_add_irq_domain, }, |
bc3a59c1 DA |
131 | { /* sentinel */ } |
132 | }; | |
133 | ||
134 | static void __init mxs_dt_init_irq(void) | |
135 | { | |
136 | icoll_init_irq(); | |
137 | of_irq_init(mxs_irq_match); | |
138 | } | |
139 | ||
2954ff39 SG |
140 | static void __init imx23_timer_init(void) |
141 | { | |
142 | mx23_clocks_init(); | |
143 | } | |
144 | ||
145 | static struct sys_timer imx23_timer = { | |
146 | .init = imx23_timer_init, | |
147 | }; | |
148 | ||
bc3a59c1 DA |
149 | static void __init imx28_timer_init(void) |
150 | { | |
151 | mx28_clocks_init(); | |
152 | } | |
153 | ||
154 | static struct sys_timer imx28_timer = { | |
155 | .init = imx28_timer_init, | |
156 | }; | |
157 | ||
5653acc2 SG |
158 | enum mac_oui { |
159 | OUI_FSL, | |
160 | OUI_DENX, | |
161 | }; | |
162 | ||
163 | static void __init update_fec_mac_prop(enum mac_oui oui) | |
164 | { | |
165 | struct device_node *np, *from = NULL; | |
fa7c865a | 166 | struct property *newmac; |
5653acc2 SG |
167 | const u32 *ocotp = mxs_get_ocotp(); |
168 | u8 *macaddr; | |
169 | u32 val; | |
170 | int i; | |
171 | ||
172 | for (i = 0; i < 2; i++) { | |
173 | np = of_find_compatible_node(from, NULL, "fsl,imx28-fec"); | |
174 | if (!np) | |
175 | return; | |
176 | from = np; | |
177 | ||
178 | newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL); | |
179 | if (!newmac) | |
180 | return; | |
181 | newmac->value = newmac + 1; | |
182 | newmac->length = 6; | |
183 | ||
184 | newmac->name = kstrdup("local-mac-address", GFP_KERNEL); | |
185 | if (!newmac->name) { | |
186 | kfree(newmac); | |
187 | return; | |
188 | } | |
189 | ||
190 | /* | |
191 | * OCOTP only stores the last 4 octets for each mac address, | |
192 | * so hard-code OUI here. | |
193 | */ | |
194 | macaddr = newmac->value; | |
195 | switch (oui) { | |
196 | case OUI_FSL: | |
197 | macaddr[0] = 0x00; | |
198 | macaddr[1] = 0x04; | |
199 | macaddr[2] = 0x9f; | |
200 | break; | |
201 | case OUI_DENX: | |
202 | macaddr[0] = 0xc0; | |
203 | macaddr[1] = 0xe5; | |
204 | macaddr[2] = 0x4e; | |
205 | break; | |
206 | } | |
207 | val = ocotp[i]; | |
208 | macaddr[3] = (val >> 16) & 0xff; | |
209 | macaddr[4] = (val >> 8) & 0xff; | |
210 | macaddr[5] = (val >> 0) & 0xff; | |
211 | ||
fa7c865a | 212 | prom_update_property(np, newmac); |
5653acc2 SG |
213 | } |
214 | } | |
215 | ||
ab2815c3 SG |
216 | static void __init imx23_evk_init(void) |
217 | { | |
218 | mxsfb_pdata.mode_list = mx23evk_video_modes; | |
219 | mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes); | |
220 | mxsfb_pdata.default_bpp = 32; | |
221 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; | |
222 | } | |
223 | ||
8fa62e11 | 224 | static inline void enable_clk_enet_out(void) |
bc3a59c1 | 225 | { |
8fa62e11 | 226 | struct clk *clk = clk_get_sys("enet_out", NULL); |
bc3a59c1 | 227 | |
bc3a59c1 DA |
228 | if (!IS_ERR(clk)) |
229 | clk_prepare_enable(clk); | |
8fa62e11 | 230 | } |
5653acc2 | 231 | |
8fa62e11 MV |
232 | static void __init imx28_evk_init(void) |
233 | { | |
234 | enable_clk_enet_out(); | |
5653acc2 | 235 | update_fec_mac_prop(OUI_FSL); |
ab2815c3 SG |
236 | |
237 | mxsfb_pdata.mode_list = mx28evk_video_modes; | |
238 | mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes); | |
239 | mxsfb_pdata.default_bpp = 32; | |
240 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; | |
e317317a DA |
241 | |
242 | mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); | |
bc3a59c1 DA |
243 | } |
244 | ||
8fa62e11 MV |
245 | static void __init m28evk_init(void) |
246 | { | |
247 | enable_clk_enet_out(); | |
248 | update_fec_mac_prop(OUI_DENX); | |
249 | ||
250 | mxsfb_pdata.mode_list = m28evk_video_modes; | |
251 | mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes); | |
252 | mxsfb_pdata.default_bpp = 16; | |
253 | mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; | |
254 | } | |
255 | ||
3143bbb4 SG |
256 | static int apx4devkit_phy_fixup(struct phy_device *phy) |
257 | { | |
258 | phy->dev_flags |= MICREL_PHY_50MHZ_CLK; | |
259 | return 0; | |
260 | } | |
261 | ||
262 | static void __init apx4devkit_init(void) | |
263 | { | |
264 | enable_clk_enet_out(); | |
265 | ||
266 | if (IS_BUILTIN(CONFIG_PHYLIB)) | |
267 | phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK, | |
268 | apx4devkit_phy_fixup); | |
d8bb823d LH |
269 | |
270 | mxsfb_pdata.mode_list = apx4devkit_video_modes; | |
271 | mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes); | |
272 | mxsfb_pdata.default_bpp = 32; | |
273 | mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; | |
3143bbb4 SG |
274 | } |
275 | ||
bc3a59c1 DA |
276 | static void __init mxs_machine_init(void) |
277 | { | |
278 | if (of_machine_is_compatible("fsl,imx28-evk")) | |
279 | imx28_evk_init(); | |
ab2815c3 SG |
280 | else if (of_machine_is_compatible("fsl,imx23-evk")) |
281 | imx23_evk_init(); | |
8fa62e11 MV |
282 | else if (of_machine_is_compatible("denx,m28evk")) |
283 | m28evk_init(); | |
3143bbb4 SG |
284 | else if (of_machine_is_compatible("bluegiga,apx4devkit")) |
285 | apx4devkit_init(); | |
bc3a59c1 DA |
286 | |
287 | of_platform_populate(NULL, of_default_bus_match_table, | |
ab2815c3 | 288 | mxs_auxdata_lookup, NULL); |
bc3a59c1 DA |
289 | } |
290 | ||
2954ff39 | 291 | static const char *imx23_dt_compat[] __initdata = { |
2954ff39 SG |
292 | "fsl,imx23", |
293 | NULL, | |
294 | }; | |
295 | ||
bc3a59c1 | 296 | static const char *imx28_dt_compat[] __initdata = { |
bc3a59c1 DA |
297 | "fsl,imx28", |
298 | NULL, | |
299 | }; | |
300 | ||
2954ff39 SG |
301 | DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)") |
302 | .map_io = mx23_map_io, | |
303 | .init_irq = mxs_dt_init_irq, | |
304 | .timer = &imx23_timer, | |
305 | .init_machine = mxs_machine_init, | |
306 | .dt_compat = imx23_dt_compat, | |
307 | .restart = mxs_restart, | |
308 | MACHINE_END | |
309 | ||
bc3a59c1 DA |
310 | DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") |
311 | .map_io = mx28_map_io, | |
312 | .init_irq = mxs_dt_init_irq, | |
313 | .timer = &imx28_timer, | |
314 | .init_machine = mxs_machine_init, | |
315 | .dt_compat = imx28_dt_compat, | |
316 | .restart = mxs_restart, | |
317 | MACHINE_END |