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bb6d8c88 SH |
1 | /* |
2 | * arch/arm/mach-netx/time.c | |
3 | * | |
4 | * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 | |
8 | * as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | #include <linux/init.h> | |
21 | #include <linux/interrupt.h> | |
1a815aed SH |
22 | #include <linux/irq.h> |
23 | #include <linux/clocksource.h> | |
fced80c7 | 24 | #include <linux/io.h> |
bb6d8c88 | 25 | |
a09e64fb | 26 | #include <mach/hardware.h> |
bb6d8c88 | 27 | #include <asm/mach/time.h> |
a09e64fb | 28 | #include <mach/netx-regs.h> |
bb6d8c88 | 29 | |
24e78576 UKK |
30 | #define TIMER_CLOCKSOURCE 1 |
31 | ||
bb6d8c88 SH |
32 | /* |
33 | * IRQ handler for the timer | |
34 | */ | |
35 | static irqreturn_t | |
0cd61b68 | 36 | netx_timer_interrupt(int irq, void *dev_id) |
bb6d8c88 | 37 | { |
0cd61b68 | 38 | timer_tick(); |
1a815aed | 39 | |
bb6d8c88 SH |
40 | /* acknowledge interrupt */ |
41 | writel(COUNTER_BIT(0), NETX_GPIO_IRQ); | |
42 | ||
43 | return IRQ_HANDLED; | |
44 | } | |
45 | ||
bb6d8c88 | 46 | static struct irqaction netx_timer_irq = { |
98538488 UKK |
47 | .name = "NetX Timer Tick", |
48 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | |
49 | .handler = netx_timer_interrupt, | |
bb6d8c88 SH |
50 | }; |
51 | ||
1a815aed SH |
52 | cycle_t netx_get_cycles(void) |
53 | { | |
24e78576 | 54 | return readl(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE)); |
1a815aed SH |
55 | } |
56 | ||
57 | static struct clocksource clocksource_netx = { | |
98538488 | 58 | .name = "netx_timer", |
1a815aed SH |
59 | .rating = 200, |
60 | .read = netx_get_cycles, | |
61 | .mask = CLOCKSOURCE_MASK(32), | |
98538488 | 62 | .shift = 20, |
c66699a7 | 63 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
1a815aed SH |
64 | }; |
65 | ||
bb6d8c88 SH |
66 | /* |
67 | * Set up timer interrupt | |
68 | */ | |
69 | static void __init netx_timer_init(void) | |
70 | { | |
71 | /* disable timer initially */ | |
72 | writel(0, NETX_GPIO_COUNTER_CTRL(0)); | |
73 | ||
74 | /* Reset the timer value to zero */ | |
75 | writel(0, NETX_GPIO_COUNTER_CURRENT(0)); | |
76 | ||
77 | writel(LATCH, NETX_GPIO_COUNTER_MAX(0)); | |
78 | ||
79 | /* acknowledge interrupt */ | |
80 | writel(COUNTER_BIT(0), NETX_GPIO_IRQ); | |
81 | ||
98538488 UKK |
82 | /* Enable the interrupt in the specific timer |
83 | * register and start timer | |
84 | */ | |
bb6d8c88 SH |
85 | writel(COUNTER_BIT(0), NETX_GPIO_IRQ_ENABLE); |
86 | writel(NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN, | |
98538488 | 87 | NETX_GPIO_COUNTER_CTRL(0)); |
bb6d8c88 SH |
88 | |
89 | setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq); | |
1a815aed SH |
90 | |
91 | /* Setup timer one for clocksource */ | |
24e78576 UKK |
92 | writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE)); |
93 | writel(0, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE)); | |
94 | writel(0xffffffff, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKSOURCE)); | |
1a815aed | 95 | |
98538488 | 96 | writel(NETX_GPIO_COUNTER_CTRL_RUN, |
24e78576 | 97 | NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE)); |
1a815aed SH |
98 | |
99 | clocksource_netx.mult = | |
100 | clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_netx.shift); | |
101 | clocksource_register(&clocksource_netx); | |
bb6d8c88 SH |
102 | } |
103 | ||
104 | struct sys_timer netx_timer = { | |
1a815aed | 105 | .init = netx_timer_init, |
bb6d8c88 | 106 | }; |