[deliverable/linux.git] / arch / arm / mach-omap1 / board-fsample.c

/*
 * linux/arch/arm/mach-omap1/board-fsample.c
 *
 * Modified from board-perseus2.c
 *
 * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
 * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>

#include <mach/tc.h>
#include <mach/gpio.h>
#include <mach/mux.h>
#include <mach/fpga.h>
#include <mach/nand.h>
#include <mach/keypad.h>
#include <mach/common.h>
#include <mach/board.h>

/* fsample is pretty close to p2-sample */

#define fsample_cpld_read(reg) __raw_readb(reg)
#define fsample_cpld_write(val, reg) __raw_writeb(val, reg)

#define FSAMPLE_CPLD_BASE    0xE8100000
#define FSAMPLE_CPLD_SIZE    SZ_4K
#define FSAMPLE_CPLD_START   0x05080000

#define FSAMPLE_CPLD_REG_A   (FSAMPLE_CPLD_BASE + 0x00)
#define FSAMPLE_CPLD_SWITCH  (FSAMPLE_CPLD_BASE + 0x02)
#define FSAMPLE_CPLD_UART    (FSAMPLE_CPLD_BASE + 0x02)
#define FSAMPLE_CPLD_REG_B   (FSAMPLE_CPLD_BASE + 0x04)
#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)

#define FSAMPLE_CPLD_BIT_BT_RESET         0
#define FSAMPLE_CPLD_BIT_LCD_RESET        1
#define FSAMPLE_CPLD_BIT_CAM_PWDN         2
#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE   3
#define FSAMPLE_CPLD_BIT_SD_MMC_EN        4
#define FSAMPLE_CPLD_BIT_aGPS_PWREN       5
#define FSAMPLE_CPLD_BIT_BACKLIGHT        6
#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET    7
#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N    8
#define FSAMPLE_CPLD_BIT_OTG_RESET        9

#define fsample_cpld_set(bit) \
    fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)

#define fsample_cpld_clear(bit) \
    fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)

static int fsample_keymap[] = {
	KEY(0,0,KEY_UP),
	KEY(0,1,KEY_RIGHT),
	KEY(0,2,KEY_LEFT),
	KEY(0,3,KEY_DOWN),
	KEY(0,4,KEY_ENTER),
	KEY(1,0,KEY_F10),
	KEY(1,1,KEY_SEND),
	KEY(1,2,KEY_END),
	KEY(1,3,KEY_VOLUMEDOWN),
	KEY(1,4,KEY_VOLUMEUP),
	KEY(1,5,KEY_RECORD),
	KEY(2,0,KEY_F9),
	KEY(2,1,KEY_3),
	KEY(2,2,KEY_6),
	KEY(2,3,KEY_9),
	KEY(2,4,KEY_KPDOT),
	KEY(3,0,KEY_BACK),
	KEY(3,1,KEY_2),
	KEY(3,2,KEY_5),
	KEY(3,3,KEY_8),
	KEY(3,4,KEY_0),
	KEY(3,5,KEY_KPSLASH),
	KEY(4,0,KEY_HOME),
	KEY(4,1,KEY_1),
	KEY(4,2,KEY_4),
	KEY(4,3,KEY_7),
	KEY(4,4,KEY_KPASTERISK),
	KEY(4,5,KEY_POWER),
	0
};

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= H2P2_DBG_FPGA_ETHR_START,	/* Physical */
		.end	= H2P2_DBG_FPGA_ETHR_START + 0xf,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= INT_730_MPU_EXT_NIRQ,
		.end	= 0,
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	},
};

static struct mtd_partition nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
	      .name		= "bootloader",
	      .offset		= 0,
	      .size		= SZ_128K,
	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
	      .name		= "params",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_128K,
	      .mask_flags	= 0,
	},
	/* kernel */
	{
	      .name		= "kernel",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_2M,
	      .mask_flags	= 0
	},
	/* rest of flash is a file system */
	{
	      .name		= "rootfs",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= MTDPART_SIZ_FULL,
	      .mask_flags	= 0
	},
};

static struct flash_platform_data nor_data = {
	.map_name	= "cfi_probe",
	.width		= 2,
	.parts		= nor_partitions,
	.nr_parts	= ARRAY_SIZE(nor_partitions),
};

static struct resource nor_resource = {
	.start		= OMAP_CS0_PHYS,
	.end		= OMAP_CS0_PHYS + SZ_32M - 1,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nor_device = {
	.name		= "omapflash",
	.id		= 0,
	.dev		= {
		.platform_data	= &nor_data,
	},
	.num_resources	= 1,
	.resource	= &nor_resource,
};

static struct omap_nand_platform_data nand_data = {
	.options	= NAND_SAMSUNG_LP_OPTIONS,
};

static struct resource nand_resource = {
	.start		= OMAP_CS3_PHYS,
	.end		= OMAP_CS3_PHYS + SZ_4K - 1,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nand_device = {
	.name		= "omapnand",
	.id		= 0,
	.dev		= {
		.platform_data	= &nand_data,
	},
	.num_resources	= 1,
	.resource	= &nand_resource,
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

static struct resource kp_resources[] = {
	[0] = {
		.start	= INT_730_MPUIO_KEYPAD,
		.end	= INT_730_MPUIO_KEYPAD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct omap_kp_platform_data kp_data = {
	.rows		= 8,
	.cols		= 8,
	.keymap		= fsample_keymap,
	.keymapsize	= ARRAY_SIZE(fsample_keymap),
	.delay		= 4,
};

static struct platform_device kp_device = {
	.name		= "omap-keypad",
	.id		= -1,
	.dev		= {
		.platform_data = &kp_data,
	},
	.num_resources	= ARRAY_SIZE(kp_resources),
	.resource	= kp_resources,
};

static struct platform_device lcd_device = {
	.name		= "lcd_p2",
	.id		= -1,
};

static struct platform_device *devices[] __initdata = {
	&nor_device,
	&nand_device,
	&smc91x_device,
	&kp_device,
	&lcd_device,
};

#define P2_NAND_RB_GPIO_PIN	62

static int nand_dev_ready(struct omap_nand_platform_data *data)
{
	return gpio_get_value(P2_NAND_RB_GPIO_PIN);
}

static struct omap_uart_config fsample_uart_config __initdata = {
	.enabled_uarts = ((1 << 0) | (1 << 1)),
};

static struct omap_lcd_config fsample_lcd_config __initdata = {
	.ctrl_name	= "internal",
};

static struct omap_board_config_kernel fsample_config[] = {
	{ OMAP_TAG_UART,	&fsample_uart_config },
	{ OMAP_TAG_LCD,		&fsample_lcd_config },
};

static void __init omap_fsample_init(void)
{
	if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
		BUG();
	nand_data.dev_ready = nand_dev_ready;

	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);

	platform_add_devices(devices, ARRAY_SIZE(devices));

	omap_board_config = fsample_config;
	omap_board_config_size = ARRAY_SIZE(fsample_config);
	omap_serial_init();
	omap_register_i2c_bus(1, 100, NULL, 0);
}

static void __init fsample_init_smc91x(void)
{
	fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
	mdelay(50);
	fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
		   H2P2_DBG_FPGA_LAN_RESET);
	mdelay(50);
}

static void __init omap_fsample_init_irq(void)
{
	omap1_init_common_hw();
	omap_init_irq();
	omap_gpio_init();
	fsample_init_smc91x();
}

/* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc omap_fsample_io_desc[] __initdata = {
	{
		.virtual	= H2P2_DBG_FPGA_BASE,
		.pfn		= __phys_to_pfn(H2P2_DBG_FPGA_START),
		.length		= H2P2_DBG_FPGA_SIZE,
		.type		= MT_DEVICE
	},
	{
		.virtual	= FSAMPLE_CPLD_BASE,
		.pfn		= __phys_to_pfn(FSAMPLE_CPLD_START),
		.length		= FSAMPLE_CPLD_SIZE,
		.type		= MT_DEVICE
	}
};

static void __init omap_fsample_map_io(void)
{
	omap1_map_common_io();
	iotable_init(omap_fsample_io_desc,
		     ARRAY_SIZE(omap_fsample_io_desc));

	/* Early, board-dependent init */

	/*
	 * Hold GSM Reset until needed
	 */
	omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);

	/*
	 * UARTs -> done automagically by 8250 driver
	 */

	/*
	 * CSx timings, GPIO Mux ... setup
	 */

	/* Flash: CS0 timings setup */
	omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
	omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);

	/*
	 * Ethernet support through the debug board
	 * CS1 timings setup
	 */
	omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
	omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);

	/*
	 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
	 * It is used as the Ethernet controller interrupt
	 */
	omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
}

MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
/* Maintainer: Brian Swetland <swetland@google.com> */
	.phys_io	= 0xfff00000,
	.io_pg_offst	= ((0xfef00000) >> 18) & 0xfffc,
	.boot_params	= 0x10000100,
	.map_io		= omap_fsample_map_io,
	.init_irq	= omap_fsample_init_irq,
	.init_machine	= omap_fsample_init,
	.timer		= &omap_timer,
MACHINE_END
Commit	Line	Data
495f71db BS	1	/*
	2	* linux/arch/arm/mach-omap1/board-fsample.c
	3	*
	4	* Modified from board-perseus2.c
	5	*
	6	* Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
	7	* Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/init.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/delay.h>
	18	#include <linux/mtd/mtd.h>
	19	#include <linux/mtd/nand.h>
	20	#include <linux/mtd/partitions.h>
	21	#include <linux/input.h>
	22
a09e64fb	23	#include <mach/hardware.h>
495f71db BS	24	#include <asm/mach-types.h>
	25	#include <asm/mach/arch.h>
	26	#include <asm/mach/flash.h>
	27	#include <asm/mach/map.h>
	28
a09e64fb RK	29	#include <mach/tc.h>
	30	#include <mach/gpio.h>
	31	#include <mach/mux.h>
	32	#include <mach/fpga.h>
	33	#include <mach/nand.h>
	34	#include <mach/keypad.h>
	35	#include <mach/common.h>
	36	#include <mach/board.h>
d9558b19 TL	37
	38	/* fsample is pretty close to p2-sample */
	39
	40	#define fsample_cpld_read(reg) __raw_readb(reg)
	41	#define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
	42
	43	#define FSAMPLE_CPLD_BASE 0xE8100000
	44	#define FSAMPLE_CPLD_SIZE SZ_4K
	45	#define FSAMPLE_CPLD_START 0x05080000
	46
	47	#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00)
	48	#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02)
	49	#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02)
	50	#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04)
	51	#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
	52	#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
	53
	54	#define FSAMPLE_CPLD_BIT_BT_RESET 0
	55	#define FSAMPLE_CPLD_BIT_LCD_RESET 1
	56	#define FSAMPLE_CPLD_BIT_CAM_PWDN 2
	57	#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3
	58	#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4
	59	#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5
	60	#define FSAMPLE_CPLD_BIT_BACKLIGHT 6
	61	#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7
	62	#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8
	63	#define FSAMPLE_CPLD_BIT_OTG_RESET 9
	64
	65	#define fsample_cpld_set(bit) \
	66	fsample_cpld_write((((bit) & 15) << 4) \| 0x0f, FSAMPLE_CPLD_SET_CLR)
	67
	68	#define fsample_cpld_clear(bit) \
	69	fsample_cpld_write(0xf0 \| ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
495f71db BS	70
	71	static int fsample_keymap[] = {
	72	KEY(0,0,KEY_UP),
	73	KEY(0,1,KEY_RIGHT),
	74	KEY(0,2,KEY_LEFT),
	75	KEY(0,3,KEY_DOWN),
496bcb81 VK	76	KEY(0,4,KEY_ENTER),
496bcb81 VK	77	KEY(1,0,KEY_F10),
495f71db BS	78	KEY(1,1,KEY_SEND),
	79	KEY(1,2,KEY_END),
	80	KEY(1,3,KEY_VOLUMEDOWN),
	81	KEY(1,4,KEY_VOLUMEUP),
	82	KEY(1,5,KEY_RECORD),
496bcb81	83	KEY(2,0,KEY_F9),
495f71db BS	84	KEY(2,1,KEY_3),
	85	KEY(2,2,KEY_6),
	86	KEY(2,3,KEY_9),
496bcb81	87	KEY(2,4,KEY_KPDOT),
495f71db BS	88	KEY(3,0,KEY_BACK),
	89	KEY(3,1,KEY_2),
	90	KEY(3,2,KEY_5),
	91	KEY(3,3,KEY_8),
	92	KEY(3,4,KEY_0),
496bcb81	93	KEY(3,5,KEY_KPSLASH),
495f71db BS	94	KEY(4,0,KEY_HOME),
	95	KEY(4,1,KEY_1),
	96	KEY(4,2,KEY_4),
	97	KEY(4,3,KEY_7),
496bcb81	98	KEY(4,4,KEY_KPASTERISK),
495f71db BS	99	KEY(4,5,KEY_POWER),
	100	0
	101	};
	102
	103	static struct resource smc91x_resources[] = {
	104	[0] = {
	105	.start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
	106	.end = H2P2_DBG_FPGA_ETHR_START + 0xf,
	107	.flags = IORESOURCE_MEM,
	108	},
	109	[1] = {
	110	.start = INT_730_MPU_EXT_NIRQ,
	111	.end = 0,
e7b3dc7e	112	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
495f71db BS	113	},
	114	};
	115
	116	static struct mtd_partition nor_partitions[] = {
	117	/* bootloader (U-Boot, etc) in first sector */
	118	{
	119	.name = "bootloader",
	120	.offset = 0,
	121	.size = SZ_128K,
	122	.mask_flags = MTD_WRITEABLE, /* force read-only */
	123	},
	124	/* bootloader params in the next sector */
	125	{
	126	.name = "params",
	127	.offset = MTDPART_OFS_APPEND,
	128	.size = SZ_128K,
	129	.mask_flags = 0,
	130	},
	131	/* kernel */
	132	{
	133	.name = "kernel",
	134	.offset = MTDPART_OFS_APPEND,
	135	.size = SZ_2M,
	136	.mask_flags = 0
	137	},
	138	/* rest of flash is a file system */
	139	{
	140	.name = "rootfs",
	141	.offset = MTDPART_OFS_APPEND,
	142	.size = MTDPART_SIZ_FULL,
	143	.mask_flags = 0
	144	},
	145	};
	146
	147	static struct flash_platform_data nor_data = {
	148	.map_name = "cfi_probe",
	149	.width = 2,
	150	.parts = nor_partitions,
	151	.nr_parts = ARRAY_SIZE(nor_partitions),
	152	};
	153
	154	static struct resource nor_resource = {
	155	.start = OMAP_CS0_PHYS,
	156	.end = OMAP_CS0_PHYS + SZ_32M - 1,
	157	.flags = IORESOURCE_MEM,
	158	};
	159
	160	static struct platform_device nor_device = {
	161	.name = "omapflash",
	162	.id = 0,
	163	.dev = {
	164	.platform_data = &nor_data,
	165	},
	166	.num_resources = 1,
	167	.resource = &nor_resource,
	168	};
	169
78be6325	170	static struct omap_nand_platform_data nand_data = {
495f71db BS	171	.options = NAND_SAMSUNG_LP_OPTIONS,
	172	};
	173
	174	static struct resource nand_resource = {
	175	.start = OMAP_CS3_PHYS,
	176	.end = OMAP_CS3_PHYS + SZ_4K - 1,
	177	.flags = IORESOURCE_MEM,
	178	};
	179
	180	static struct platform_device nand_device = {
	181	.name = "omapnand",
	182	.id = 0,
	183	.dev = {
	184	.platform_data = &nand_data,
	185	},
	186	.num_resources = 1,
	187	.resource = &nand_resource,
	188	};
	189
	190	static struct platform_device smc91x_device = {
	191	.name = "smc91x",
	192	.id = 0,
	193	.num_resources = ARRAY_SIZE(smc91x_resources),
	194	.resource = smc91x_resources,
	195	};
	196
	197	static struct resource kp_resources[] = {
	198	[0] = {
	199	.start = INT_730_MPUIO_KEYPAD,
	200	.end = INT_730_MPUIO_KEYPAD,
	201	.flags = IORESOURCE_IRQ,
	202	},
	203	};
	204
	205	static struct omap_kp_platform_data kp_data = {
4d24607b KS	206	.rows = 8,
	207	.cols = 8,
	208	.keymap = fsample_keymap,
	209	.keymapsize = ARRAY_SIZE(fsample_keymap),
	210	.delay = 4,
495f71db BS	211	};
	212
	213	static struct platform_device kp_device = {
	214	.name = "omap-keypad",
	215	.id = -1,
	216	.dev = {
	217	.platform_data = &kp_data,
	218	},
	219	.num_resources = ARRAY_SIZE(kp_resources),
	220	.resource = kp_resources,
	221	};
	222
	223	static struct platform_device lcd_device = {
	224	.name = "lcd_p2",
	225	.id = -1,
	226	};
	227
	228	static struct platform_device *devices[] __initdata = {
	229	&nor_device,
	230	&nand_device,
	231	&smc91x_device,
	232	&kp_device,
	233	&lcd_device,
	234	};
	235
	236	#define P2_NAND_RB_GPIO_PIN 62
	237
78be6325	238	static int nand_dev_ready(struct omap_nand_platform_data *data)
495f71db	239	{
0b84b5ca	240	return gpio_get_value(P2_NAND_RB_GPIO_PIN);
495f71db BS	241	}
	242
	243	static struct omap_uart_config fsample_uart_config __initdata = {
	244	.enabled_uarts = ((1 << 0) \| (1 << 1)),
	245	};
	246
	247	static struct omap_lcd_config fsample_lcd_config __initdata = {
	248	.ctrl_name = "internal",
	249	};
	250
	251	static struct omap_board_config_kernel fsample_config[] = {
	252	{ OMAP_TAG_UART, &fsample_uart_config },
	253	{ OMAP_TAG_LCD, &fsample_lcd_config },
	254	};
	255
	256	static void __init omap_fsample_init(void)
	257	{
f2d18fea JN	258	if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
	259	BUG();
	260	nand_data.dev_ready = nand_dev_ready;
495f71db BS	261
	262	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
	263	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
	264
	265	platform_add_devices(devices, ARRAY_SIZE(devices));
	266
	267	omap_board_config = fsample_config;
	268	omap_board_config_size = ARRAY_SIZE(fsample_config);
	269	omap_serial_init();
1ed16a86	270	omap_register_i2c_bus(1, 100, NULL, 0);
495f71db BS	271	}
	272
	273	static void __init fsample_init_smc91x(void)
	274	{
	275	fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
	276	mdelay(50);
	277	fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
	278	H2P2_DBG_FPGA_LAN_RESET);
	279	mdelay(50);
	280	}
	281
277d58ef	282	static void __init omap_fsample_init_irq(void)
495f71db BS	283	{
	284	omap1_init_common_hw();
	285	omap_init_irq();
	286	omap_gpio_init();
	287	fsample_init_smc91x();
	288	}
	289
	290	/* Only FPGA needs to be mapped here. All others are done with ioremap */
	291	static struct map_desc omap_fsample_io_desc[] __initdata = {
	292	{
	293	.virtual = H2P2_DBG_FPGA_BASE,
	294	.pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
	295	.length = H2P2_DBG_FPGA_SIZE,
	296	.type = MT_DEVICE
	297	},
	298	{
	299	.virtual = FSAMPLE_CPLD_BASE,
	300	.pfn = __phys_to_pfn(FSAMPLE_CPLD_START),
	301	.length = FSAMPLE_CPLD_SIZE,
	302	.type = MT_DEVICE
	303	}
	304	};
	305
	306	static void __init omap_fsample_map_io(void)
	307	{
	308	omap1_map_common_io();
	309	iotable_init(omap_fsample_io_desc,
	310	ARRAY_SIZE(omap_fsample_io_desc));
	311
	312	/* Early, board-dependent init */
	313
	314	/*
	315	* Hold GSM Reset until needed
	316	*/
	317	omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);
	318
	319	/*
	320	* UARTs -> done automagically by 8250 driver
	321	*/
	322
	323	/*
	324	* CSx timings, GPIO Mux ... setup
	325	*/
	326
	327	/* Flash: CS0 timings setup */
	328	omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
	329	omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);
	330
	331	/*
	332	* Ethernet support through the debug board
	333	* CS1 timings setup
	334	*/
	335	omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
	336	omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);
	337
	338	/*
	339	* Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
	340	* It is used as the Ethernet controller interrupt
	341	*/
	342	omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
	343	}
	344
	345	MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
	346	/* Maintainer: Brian Swetland <swetland@google.com> */
347	.phys_io = 0xfff00000,
348	.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
349	.boot_params = 0x10000100,
350	.map_io = omap_fsample_map_io,
351	.init_irq = omap_fsample_init_irq,
352	.init_machine = omap_fsample_init,
353	.timer = &omap_timer,
354	MACHINE_END