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495f71db BS |
1 | /* |
2 | * linux/arch/arm/mach-omap1/board-fsample.c | |
3 | * | |
4 | * Modified from board-perseus2.c | |
5 | * | |
6 | * Original OMAP730 support by Jean Pihet <j-pihet@ti.com> | |
7 | * Updated for 2.6 by Kevin Hilman <kjh@hilman.org> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
2f8163ba | 13 | #include <linux/gpio.h> |
495f71db BS |
14 | #include <linux/kernel.h> |
15 | #include <linux/init.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/mtd/mtd.h> | |
19 | #include <linux/mtd/nand.h> | |
20 | #include <linux/mtd/partitions.h> | |
561b036a | 21 | #include <linux/mtd/physmap.h> |
495f71db | 22 | #include <linux/input.h> |
3bc48014 | 23 | #include <linux/smc91x.h> |
ddba6c7f | 24 | #include <linux/omapfb.h> |
495f71db | 25 | |
495f71db BS |
26 | #include <asm/mach-types.h> |
27 | #include <asm/mach/arch.h> | |
495f71db BS |
28 | #include <asm/mach/map.h> |
29 | ||
54b693d4 | 30 | #include <mach/tc.h> |
70c494c3 | 31 | #include <mach/mux.h> |
100f9638 | 32 | #include "flash.h" |
2203747c | 33 | #include <linux/platform_data/keypad-omap.h> |
d9558b19 | 34 | |
2e3ee9f4 TL |
35 | #include <mach/hardware.h> |
36 | ||
37 | #include "iomap.h" | |
38 | #include "common.h" | |
21d182bd | 39 | #include "fpga.h" |
2e3ee9f4 | 40 | |
d9558b19 TL |
41 | /* fsample is pretty close to p2-sample */ |
42 | ||
43 | #define fsample_cpld_read(reg) __raw_readb(reg) | |
44 | #define fsample_cpld_write(val, reg) __raw_writeb(val, reg) | |
45 | ||
46 | #define FSAMPLE_CPLD_BASE 0xE8100000 | |
47 | #define FSAMPLE_CPLD_SIZE SZ_4K | |
48 | #define FSAMPLE_CPLD_START 0x05080000 | |
49 | ||
50 | #define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00) | |
51 | #define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02) | |
52 | #define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02) | |
53 | #define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04) | |
54 | #define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06) | |
55 | #define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06) | |
56 | ||
57 | #define FSAMPLE_CPLD_BIT_BT_RESET 0 | |
58 | #define FSAMPLE_CPLD_BIT_LCD_RESET 1 | |
59 | #define FSAMPLE_CPLD_BIT_CAM_PWDN 2 | |
60 | #define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3 | |
61 | #define FSAMPLE_CPLD_BIT_SD_MMC_EN 4 | |
62 | #define FSAMPLE_CPLD_BIT_aGPS_PWREN 5 | |
63 | #define FSAMPLE_CPLD_BIT_BACKLIGHT 6 | |
64 | #define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7 | |
65 | #define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8 | |
66 | #define FSAMPLE_CPLD_BIT_OTG_RESET 9 | |
67 | ||
68 | #define fsample_cpld_set(bit) \ | |
69 | fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR) | |
70 | ||
71 | #define fsample_cpld_clear(bit) \ | |
72 | fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR) | |
495f71db | 73 | |
da1f026b JK |
74 | static const unsigned int fsample_keymap[] = { |
75 | KEY(0, 0, KEY_UP), | |
76 | KEY(1, 0, KEY_RIGHT), | |
77 | KEY(2, 0, KEY_LEFT), | |
78 | KEY(3, 0, KEY_DOWN), | |
79 | KEY(4, 0, KEY_ENTER), | |
80 | KEY(0, 1, KEY_F10), | |
81 | KEY(1, 1, KEY_SEND), | |
82 | KEY(2, 1, KEY_END), | |
83 | KEY(3, 1, KEY_VOLUMEDOWN), | |
84 | KEY(4, 1, KEY_VOLUMEUP), | |
85 | KEY(5, 1, KEY_RECORD), | |
86 | KEY(0, 2, KEY_F9), | |
87 | KEY(1, 2, KEY_3), | |
88 | KEY(2, 2, KEY_6), | |
89 | KEY(3, 2, KEY_9), | |
90 | KEY(4, 2, KEY_KPDOT), | |
91 | KEY(0, 3, KEY_BACK), | |
92 | KEY(1, 3, KEY_2), | |
93 | KEY(2, 3, KEY_5), | |
94 | KEY(3, 3, KEY_8), | |
95 | KEY(4, 3, KEY_0), | |
96 | KEY(5, 3, KEY_KPSLASH), | |
97 | KEY(0, 4, KEY_HOME), | |
98 | KEY(1, 4, KEY_1), | |
99 | KEY(2, 4, KEY_4), | |
100 | KEY(3, 4, KEY_7), | |
101 | KEY(4, 4, KEY_KPASTERISK), | |
102 | KEY(5, 4, KEY_POWER), | |
495f71db BS |
103 | }; |
104 | ||
3bc48014 LM |
105 | static struct smc91x_platdata smc91x_info = { |
106 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, | |
107 | .leda = RPC_LED_100_10, | |
108 | .ledb = RPC_LED_TX_RX, | |
109 | }; | |
110 | ||
495f71db BS |
111 | static struct resource smc91x_resources[] = { |
112 | [0] = { | |
113 | .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */ | |
114 | .end = H2P2_DBG_FPGA_ETHR_START + 0xf, | |
115 | .flags = IORESOURCE_MEM, | |
116 | }, | |
117 | [1] = { | |
372b1c32 | 118 | .start = INT_7XX_MPU_EXT_NIRQ, |
495f71db | 119 | .end = 0, |
e7b3dc7e | 120 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
495f71db BS |
121 | }, |
122 | }; | |
123 | ||
c2cdaffe TL |
124 | static void __init fsample_init_smc91x(void) |
125 | { | |
4c98dc6b | 126 | __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET); |
c2cdaffe | 127 | mdelay(50); |
4c98dc6b | 128 | __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1, |
c2cdaffe TL |
129 | H2P2_DBG_FPGA_LAN_RESET); |
130 | mdelay(50); | |
131 | } | |
132 | ||
495f71db BS |
133 | static struct mtd_partition nor_partitions[] = { |
134 | /* bootloader (U-Boot, etc) in first sector */ | |
135 | { | |
136 | .name = "bootloader", | |
137 | .offset = 0, | |
138 | .size = SZ_128K, | |
139 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
140 | }, | |
141 | /* bootloader params in the next sector */ | |
142 | { | |
143 | .name = "params", | |
144 | .offset = MTDPART_OFS_APPEND, | |
145 | .size = SZ_128K, | |
146 | .mask_flags = 0, | |
147 | }, | |
148 | /* kernel */ | |
149 | { | |
150 | .name = "kernel", | |
151 | .offset = MTDPART_OFS_APPEND, | |
152 | .size = SZ_2M, | |
153 | .mask_flags = 0 | |
154 | }, | |
155 | /* rest of flash is a file system */ | |
156 | { | |
157 | .name = "rootfs", | |
158 | .offset = MTDPART_OFS_APPEND, | |
159 | .size = MTDPART_SIZ_FULL, | |
160 | .mask_flags = 0 | |
161 | }, | |
162 | }; | |
163 | ||
561b036a | 164 | static struct physmap_flash_data nor_data = { |
495f71db | 165 | .width = 2, |
561b036a | 166 | .set_vpp = omap1_set_vpp, |
495f71db BS |
167 | .parts = nor_partitions, |
168 | .nr_parts = ARRAY_SIZE(nor_partitions), | |
169 | }; | |
170 | ||
171 | static struct resource nor_resource = { | |
172 | .start = OMAP_CS0_PHYS, | |
173 | .end = OMAP_CS0_PHYS + SZ_32M - 1, | |
174 | .flags = IORESOURCE_MEM, | |
175 | }; | |
176 | ||
177 | static struct platform_device nor_device = { | |
561b036a | 178 | .name = "physmap-flash", |
495f71db BS |
179 | .id = 0, |
180 | .dev = { | |
181 | .platform_data = &nor_data, | |
182 | }, | |
183 | .num_resources = 1, | |
184 | .resource = &nor_resource, | |
185 | }; | |
186 | ||
414f552a LM |
187 | #define FSAMPLE_NAND_RB_GPIO_PIN 62 |
188 | ||
189 | static int nand_dev_ready(struct mtd_info *mtd) | |
190 | { | |
191 | return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN); | |
192 | } | |
193 | ||
414f552a LM |
194 | static struct platform_nand_data nand_data = { |
195 | .chip = { | |
196 | .nr_chips = 1, | |
197 | .chip_offset = 0, | |
198 | .options = NAND_SAMSUNG_LP_OPTIONS, | |
414f552a LM |
199 | }, |
200 | .ctrl = { | |
31cde044 | 201 | .cmd_ctrl = omap1_nand_cmd_ctl, |
414f552a LM |
202 | .dev_ready = nand_dev_ready, |
203 | }, | |
495f71db BS |
204 | }; |
205 | ||
206 | static struct resource nand_resource = { | |
207 | .start = OMAP_CS3_PHYS, | |
208 | .end = OMAP_CS3_PHYS + SZ_4K - 1, | |
209 | .flags = IORESOURCE_MEM, | |
210 | }; | |
211 | ||
212 | static struct platform_device nand_device = { | |
414f552a | 213 | .name = "gen_nand", |
495f71db BS |
214 | .id = 0, |
215 | .dev = { | |
216 | .platform_data = &nand_data, | |
217 | }, | |
218 | .num_resources = 1, | |
219 | .resource = &nand_resource, | |
220 | }; | |
221 | ||
222 | static struct platform_device smc91x_device = { | |
223 | .name = "smc91x", | |
224 | .id = 0, | |
3bc48014 LM |
225 | .dev = { |
226 | .platform_data = &smc91x_info, | |
227 | }, | |
495f71db BS |
228 | .num_resources = ARRAY_SIZE(smc91x_resources), |
229 | .resource = smc91x_resources, | |
230 | }; | |
231 | ||
232 | static struct resource kp_resources[] = { | |
233 | [0] = { | |
372b1c32 AB |
234 | .start = INT_7XX_MPUIO_KEYPAD, |
235 | .end = INT_7XX_MPUIO_KEYPAD, | |
495f71db BS |
236 | .flags = IORESOURCE_IRQ, |
237 | }, | |
238 | }; | |
239 | ||
da1f026b JK |
240 | static const struct matrix_keymap_data fsample_keymap_data = { |
241 | .keymap = fsample_keymap, | |
242 | .keymap_size = ARRAY_SIZE(fsample_keymap), | |
243 | }; | |
244 | ||
495f71db | 245 | static struct omap_kp_platform_data kp_data = { |
4d24607b KS |
246 | .rows = 8, |
247 | .cols = 8, | |
da1f026b | 248 | .keymap_data = &fsample_keymap_data, |
4d24607b | 249 | .delay = 4, |
495f71db BS |
250 | }; |
251 | ||
252 | static struct platform_device kp_device = { | |
253 | .name = "omap-keypad", | |
254 | .id = -1, | |
255 | .dev = { | |
256 | .platform_data = &kp_data, | |
257 | }, | |
258 | .num_resources = ARRAY_SIZE(kp_resources), | |
259 | .resource = kp_resources, | |
260 | }; | |
261 | ||
495f71db BS |
262 | static struct platform_device *devices[] __initdata = { |
263 | &nor_device, | |
264 | &nand_device, | |
265 | &smc91x_device, | |
266 | &kp_device, | |
495f71db BS |
267 | }; |
268 | ||
bdc58fb9 | 269 | static struct omap_lcd_config fsample_lcd_config = { |
495f71db BS |
270 | .ctrl_name = "internal", |
271 | }; | |
272 | ||
495f71db BS |
273 | static void __init omap_fsample_init(void) |
274 | { | |
7b88e62f TL |
275 | /* Early, board-dependent init */ |
276 | ||
277 | /* | |
278 | * Hold GSM Reset until needed | |
279 | */ | |
280 | omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); | |
281 | ||
282 | /* | |
283 | * UARTs -> done automagically by 8250 driver | |
284 | */ | |
285 | ||
286 | /* | |
287 | * CSx timings, GPIO Mux ... setup | |
288 | */ | |
289 | ||
290 | /* Flash: CS0 timings setup */ | |
291 | omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0); | |
292 | omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0); | |
293 | ||
294 | /* | |
295 | * Ethernet support through the debug board | |
296 | * CS1 timings setup | |
297 | */ | |
298 | omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1); | |
299 | omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1); | |
300 | ||
301 | /* | |
302 | * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, | |
303 | * It is used as the Ethernet controller interrupt | |
304 | */ | |
305 | omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, | |
306 | OMAP7XX_IO_CONF_9); | |
307 | ||
c2cdaffe TL |
308 | fsample_init_smc91x(); |
309 | ||
0449410b | 310 | BUG_ON(gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0); |
414f552a | 311 | gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN); |
495f71db BS |
312 | |
313 | omap_cfg_reg(L3_1610_FLASH_CS2B_OE); | |
314 | omap_cfg_reg(M8_1610_FLASH_CS2B_WE); | |
315 | ||
93c43f25 TL |
316 | /* Mux pins for keypad */ |
317 | omap_cfg_reg(E2_7XX_KBR0); | |
318 | omap_cfg_reg(J7_7XX_KBR1); | |
319 | omap_cfg_reg(E1_7XX_KBR2); | |
320 | omap_cfg_reg(F3_7XX_KBR3); | |
321 | omap_cfg_reg(D2_7XX_KBR4); | |
322 | omap_cfg_reg(C2_7XX_KBC0); | |
323 | omap_cfg_reg(D3_7XX_KBC1); | |
324 | omap_cfg_reg(E4_7XX_KBC2); | |
325 | omap_cfg_reg(F4_7XX_KBC3); | |
326 | omap_cfg_reg(E3_7XX_KBC4); | |
327 | ||
495f71db BS |
328 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
329 | ||
495f71db | 330 | omap_serial_init(); |
1ed16a86 | 331 | omap_register_i2c_bus(1, 100, NULL, 0); |
ddba6c7f TV |
332 | |
333 | omapfb_set_lcd_config(&fsample_lcd_config); | |
495f71db BS |
334 | } |
335 | ||
495f71db BS |
336 | /* Only FPGA needs to be mapped here. All others are done with ioremap */ |
337 | static struct map_desc omap_fsample_io_desc[] __initdata = { | |
338 | { | |
339 | .virtual = H2P2_DBG_FPGA_BASE, | |
340 | .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START), | |
341 | .length = H2P2_DBG_FPGA_SIZE, | |
342 | .type = MT_DEVICE | |
343 | }, | |
344 | { | |
345 | .virtual = FSAMPLE_CPLD_BASE, | |
346 | .pfn = __phys_to_pfn(FSAMPLE_CPLD_START), | |
347 | .length = FSAMPLE_CPLD_SIZE, | |
348 | .type = MT_DEVICE | |
349 | } | |
350 | }; | |
351 | ||
352 | static void __init omap_fsample_map_io(void) | |
353 | { | |
7b88e62f | 354 | omap15xx_map_io(); |
495f71db BS |
355 | iotable_init(omap_fsample_io_desc, |
356 | ARRAY_SIZE(omap_fsample_io_desc)); | |
495f71db BS |
357 | } |
358 | ||
359 | MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") | |
360 | /* Maintainer: Brian Swetland <swetland@google.com> */ | |
246e389d | 361 | .atag_offset = 0x100, |
495f71db | 362 | .map_io = omap_fsample_map_io, |
7b88e62f | 363 | .init_early = omap1_init_early, |
7b88e62f | 364 | .init_irq = omap1_init_irq, |
b694331c | 365 | .handle_irq = omap1_handle_irq, |
495f71db | 366 | .init_machine = omap_fsample_init, |
82c3bd03 | 367 | .init_late = omap1_init_late, |
6bb27d73 | 368 | .init_time = omap1_timer_init, |
baa95883 | 369 | .restart = omap1_restart, |
495f71db | 370 | MACHINE_END |