[deliverable/linux.git] / arch / arm / mach-omap1 / board-h3.c

/*
 * linux/arch/arm/mach-omap1/board-h3.c
 *
 * This file contains OMAP1710 H3 specific code.
 *
 * Copyright (C) 2004 Texas Instruments, Inc.
 * Copyright (C) 2002 MontaVista Software, Inc.
 * Copyright (C) 2001 RidgeRun, Inc.
 * Author: RidgeRun, Inc.
 *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/types.h>
#include <linux/init.h>
#include <linux/major.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/workqueue.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>

#include <asm/setup.h>
#include <asm/page.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>

#include <asm/arch/gpio.h>
#include <asm/arch/gpioexpander.h>
#include <asm/arch/irqs.h>
#include <asm/arch/mux.h>
#include <asm/arch/tc.h>
#include <asm/arch/irda.h>
#include <asm/arch/usb.h>
#include <asm/arch/keypad.h>
#include <asm/arch/dma.h>
#include <asm/arch/common.h>

extern int omap_gpio_init(void);

static int h3_keymap[] = {
	KEY(0, 0, KEY_LEFT),
	KEY(0, 1, KEY_RIGHT),
	KEY(0, 2, KEY_3),
	KEY(0, 3, KEY_F10),
	KEY(0, 4, KEY_F5),
	KEY(0, 5, KEY_9),
	KEY(1, 0, KEY_DOWN),
	KEY(1, 1, KEY_UP),
	KEY(1, 2, KEY_2),
	KEY(1, 3, KEY_F9),
	KEY(1, 4, KEY_F7),
	KEY(1, 5, KEY_0),
	KEY(2, 0, KEY_ENTER),
	KEY(2, 1, KEY_6),
	KEY(2, 2, KEY_1),
	KEY(2, 3, KEY_F2),
	KEY(2, 4, KEY_F6),
	KEY(2, 5, KEY_HOME),
	KEY(3, 0, KEY_8),
	KEY(3, 1, KEY_5),
	KEY(3, 2, KEY_F12),
	KEY(3, 3, KEY_F3),
	KEY(3, 4, KEY_F8),
	KEY(3, 5, KEY_END),
	KEY(4, 0, KEY_7),
	KEY(4, 1, KEY_4),
	KEY(4, 2, KEY_F11),
	KEY(4, 3, KEY_F1),
	KEY(4, 4, KEY_F4),
	KEY(4, 5, KEY_ESC),
	KEY(5, 0, KEY_F13),
	KEY(5, 1, KEY_F14),
	KEY(5, 2, KEY_F15),
	KEY(5, 3, KEY_F16),
	KEY(5, 4, KEY_SLEEP),
	0
};


static struct mtd_partition nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
	      .name		= "bootloader",
	      .offset		= 0,
	      .size		= SZ_128K,
	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
	      .name		= "params",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_128K,
	      .mask_flags	= 0,
	},
	/* kernel */
	{
	      .name		= "kernel",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_2M,
	      .mask_flags	= 0
	},
	/* file system */
	{
	      .name		= "filesystem",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= MTDPART_SIZ_FULL,
	      .mask_flags	= 0
	}
};

static struct flash_platform_data nor_data = {
	.map_name	= "cfi_probe",
	.width		= 2,
	.parts		= nor_partitions,
	.nr_parts	= ARRAY_SIZE(nor_partitions),
};

static struct resource nor_resource = {
	/* This is on CS3, wherever it's mapped */
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nor_device = {
	.name		= "omapflash",
	.id		= 0,
	.dev		= {
		.platform_data	= &nor_data,
	},
	.num_resources	= 1,
	.resource	= &nor_resource,
};

static struct mtd_partition nand_partitions[] = {
#if 0
	/* REVISIT: enable these partitions if you make NAND BOOT work */
	{
		.name		= "xloader",
		.offset		= 0,
		.size		= 64 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "bootloader",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 256 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 192 * 1024,
	},
	{
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 2 * SZ_1M,
	},
#endif
	{
		.name		= "filesystem",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,
	},
};

/* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
static struct nand_platform_data nand_data = {
	.options	= NAND_SAMSUNG_LP_OPTIONS,
	.parts		= nand_partitions,
	.nr_parts	= ARRAY_SIZE(nand_partitions),
};

static struct resource nand_resource = {
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nand_device = {
	.name		= "omapnand",
	.id		= 0,
	.dev		= {
		.platform_data	= &nand_data,
	},
	.num_resources	= 1,
	.resource	= &nand_resource,
};

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= OMAP1710_ETHR_START,		/* Physical */
		.end	= OMAP1710_ETHR_START + 0xf,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= OMAP_GPIO_IRQ(40),
		.end	= OMAP_GPIO_IRQ(40),
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

#define GPTIMER_BASE		0xFFFB1400
#define GPTIMER_REGS(x)	(0xFFFB1400 + (x * 0x800))
#define GPTIMER_REGS_SIZE	0x46

static struct resource intlat_resources[] = {
	[0] = {
		.start  = GPTIMER_REGS(0),	      /* Physical */
		.end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = INT_1610_GPTIMER1,
		.end    = INT_1610_GPTIMER1,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device intlat_device = {
	.name	   = "omap_intlat",
	.id	     = 0,
	.num_resources  = ARRAY_SIZE(intlat_resources),
	.resource       = intlat_resources,
};

static struct resource h3_kp_resources[] = {
	[0] = {
		.start	= INT_KEYBOARD,
		.end	= INT_KEYBOARD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct omap_kp_platform_data h3_kp_data = {
	.rows		= 8,
	.cols		= 8,
	.keymap		= h3_keymap,
	.keymapsize	= ARRAY_SIZE(h3_keymap),
	.rep		= 1,
	.delay		= 9,
	.dbounce	= 1,
};

static struct platform_device h3_kp_device = {
	.name		= "omap-keypad",
	.id		= -1,
	.dev		= {
		.platform_data = &h3_kp_data,
	},
	.num_resources	= ARRAY_SIZE(h3_kp_resources),
	.resource	= h3_kp_resources,
};


/* Select between the IrDA and aGPS module
 */
static int h3_select_irda(struct device *dev, int state)
{
	unsigned char expa;
	int err = 0;

	if ((err = read_gpio_expa(&expa, 0x26))) {
		printk(KERN_ERR "Error reading from I/O EXPANDER \n");
		return err;
	}

	/* 'P6' enable/disable IRDA_TX and IRDA_RX */
	if (state & IR_SEL) { /* IrDA */
		if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
			printk(KERN_ERR "Error writing to I/O EXPANDER \n");
			return err;
		}
	} else {
		if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
			printk(KERN_ERR "Error writing to I/O EXPANDER \n");
			return err;
		}
	}
	return err;
}

static void set_trans_mode(void *data)
{
	int *mode = data;
	unsigned char expa;
	int err = 0;

	if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
		printk(KERN_ERR "Error reading from I/O expander\n");
	}

	expa &= ~0x03;

	if (*mode & IR_SIRMODE) {
		expa |= 0x01;
	} else { /* MIR/FIR */
		expa |= 0x03;
	}

	if ((err = write_gpio_expa(expa, 0x27)) != 0) {
		printk(KERN_ERR "Error writing to I/O expander\n");
	}
}

static int h3_transceiver_mode(struct device *dev, int mode)
{
	struct omap_irda_config *irda_config = dev->platform_data;

	cancel_delayed_work(&irda_config->gpio_expa);
	PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode);
#error this is not permitted - mode is an argument variable
	schedule_delayed_work(&irda_config->gpio_expa, 0);

	return 0;
}

static struct omap_irda_config h3_irda_data = {
	.transceiver_cap	= IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
	.transceiver_mode	= h3_transceiver_mode,
	.select_irda	 	= h3_select_irda,
	.rx_channel		= OMAP_DMA_UART3_RX,
	.tx_channel		= OMAP_DMA_UART3_TX,
	.dest_start		= UART3_THR,
	.src_start		= UART3_RHR,
	.tx_trigger		= 0,
	.rx_trigger		= 0,
};

static struct resource h3_irda_resources[] = {
	[0] = {
		.start	= INT_UART3,
		.end	= INT_UART3,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device h3_irda_device = {
	.name		= "omapirda",
	.id		= 0,
	.dev		= {
		.platform_data	= &h3_irda_data,
	},
	.num_resources	= ARRAY_SIZE(h3_irda_resources),
	.resource	= h3_irda_resources,
};

static struct platform_device h3_lcd_device = {
	.name		= "lcd_h3",
	.id		= -1,
};

static struct platform_device *devices[] __initdata = {
	&nor_device,
	&nand_device,
        &smc91x_device,
	&intlat_device,
	&h3_irda_device,
	&h3_kp_device,
	&h3_lcd_device,
};

static struct omap_usb_config h3_usb_config __initdata = {
	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	.otg	    = 2,

#ifdef CONFIG_USB_GADGET_OMAP
	.hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
#elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	.hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
#endif

	.pins[1]	= 3,
};

static struct omap_mmc_config h3_mmc_config __initdata = {
	.mmc[0] = {
		.enabled 	= 1,
		.power_pin	= -1,   /* tps65010 GPIO4 */
		.switch_pin	= OMAP_MPUIO(1),
	},
};

static struct omap_uart_config h3_uart_config __initdata = {
	.enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
};

static struct omap_lcd_config h3_lcd_config __initdata = {
	.ctrl_name	= "internal",
};

static struct omap_board_config_kernel h3_config[] = {
	{ OMAP_TAG_USB,		&h3_usb_config },
	{ OMAP_TAG_MMC,		&h3_mmc_config },
	{ OMAP_TAG_UART,	&h3_uart_config },
	{ OMAP_TAG_LCD,		&h3_lcd_config },
};

#define H3_NAND_RB_GPIO_PIN	10

static int nand_dev_ready(struct nand_platform_data *data)
{
	return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
}

static void __init h3_init(void)
{
	/* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
	 * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
	 * notice whether a NAND chip is enabled at probe time.
	 *
	 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	 * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
	 * to avoid probing every possible flash configuration...
	 */
	nor_resource.end = nor_resource.start = omap_cs3_phys();
	nor_resource.end += SZ_32M - 1;

	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	nand_resource.end += SZ_4K - 1;
	if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
		nand_data.dev_ready = nand_dev_ready;

	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	omap_cfg_reg(V2_1710_GPIO10);

	platform_add_devices(devices, ARRAY_SIZE(devices));
	omap_board_config = h3_config;
	omap_board_config_size = ARRAY_SIZE(h3_config);
	omap_serial_init();
}

static void __init h3_init_smc91x(void)
{
	omap_cfg_reg(W15_1710_GPIO40);
	if (omap_request_gpio(40) < 0) {
		printk("Error requesting gpio 40 for smc91x irq\n");
		return;
	}
}

void h3_init_irq(void)
{
	omap1_init_common_hw();
	omap_init_irq();
	omap_gpio_init();
	h3_init_smc91x();
}

static void __init h3_map_io(void)
{
	omap1_map_common_io();
}

MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
	/* Maintainer: Texas Instruments, Inc. */
	.phys_io	= 0xfff00000,
	.io_pg_offst	= ((0xfef00000) >> 18) & 0xfffc,
	.boot_params	= 0x10000100,
	.map_io		= h3_map_io,
	.init_irq	= h3_init_irq,
	.init_machine	= h3_init,
	.timer		= &omap_timer,
MACHINE_END
Commit	Line	Data
1da177e4	1	/*
dbdf9ced	2	* linux/arch/arm/mach-omap1/board-h3.c
1da177e4 LT	3	*
	4	* This file contains OMAP1710 H3 specific code.
	5	*
	6	* Copyright (C) 2004 Texas Instruments, Inc.
	7	* Copyright (C) 2002 MontaVista Software, Inc.
	8	* Copyright (C) 2001 RidgeRun, Inc.
	9	* Author: RidgeRun, Inc.
	10	* Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License version 2 as
	14	* published by the Free Software Foundation.
	15	*/
	16
1da177e4 LT	17	#include <linux/types.h>
	18	#include <linux/init.h>
	19	#include <linux/major.h>
	20	#include <linux/kernel.h>
d052d1be	21	#include <linux/platform_device.h>
1da177e4	22	#include <linux/errno.h>
9b6553cd	23	#include <linux/workqueue.h>
1da177e4	24	#include <linux/mtd/mtd.h>
9b6553cd	25	#include <linux/mtd/nand.h>
1da177e4	26	#include <linux/mtd/partitions.h>
9b6553cd	27	#include <linux/input.h>
1da177e4 LT	28
	29	#include <asm/setup.h>
	30	#include <asm/page.h>
	31	#include <asm/hardware.h>
	32	#include <asm/mach-types.h>
	33	#include <asm/mach/arch.h>
	34	#include <asm/mach/flash.h>
	35	#include <asm/mach/map.h>
	36
	37	#include <asm/arch/gpio.h>
9b6553cd	38	#include <asm/arch/gpioexpander.h>
1da177e4 LT	39	#include <asm/arch/irqs.h>
	40	#include <asm/arch/mux.h>
	41	#include <asm/arch/tc.h>
9b6553cd	42	#include <asm/arch/irda.h>
1da177e4	43	#include <asm/arch/usb.h>
9b6553cd TL	44	#include <asm/arch/keypad.h>
9b6553cd TL	45	#include <asm/arch/dma.h>
d48af15e	46	#include <asm/arch/common.h>
1da177e4 LT	47
	48	extern int omap_gpio_init(void);
	49
9b6553cd TL	50	static int h3_keymap[] = {
	51	KEY(0, 0, KEY_LEFT),
	52	KEY(0, 1, KEY_RIGHT),
	53	KEY(0, 2, KEY_3),
	54	KEY(0, 3, KEY_F10),
	55	KEY(0, 4, KEY_F5),
	56	KEY(0, 5, KEY_9),
	57	KEY(1, 0, KEY_DOWN),
	58	KEY(1, 1, KEY_UP),
	59	KEY(1, 2, KEY_2),
	60	KEY(1, 3, KEY_F9),
	61	KEY(1, 4, KEY_F7),
	62	KEY(1, 5, KEY_0),
	63	KEY(2, 0, KEY_ENTER),
	64	KEY(2, 1, KEY_6),
	65	KEY(2, 2, KEY_1),
	66	KEY(2, 3, KEY_F2),
	67	KEY(2, 4, KEY_F6),
	68	KEY(2, 5, KEY_HOME),
	69	KEY(3, 0, KEY_8),
	70	KEY(3, 1, KEY_5),
	71	KEY(3, 2, KEY_F12),
	72	KEY(3, 3, KEY_F3),
	73	KEY(3, 4, KEY_F8),
	74	KEY(3, 5, KEY_END),
	75	KEY(4, 0, KEY_7),
	76	KEY(4, 1, KEY_4),
	77	KEY(4, 2, KEY_F11),
	78	KEY(4, 3, KEY_F1),
	79	KEY(4, 4, KEY_F4),
	80	KEY(4, 5, KEY_ESC),
	81	KEY(5, 0, KEY_F13),
	82	KEY(5, 1, KEY_F14),
	83	KEY(5, 2, KEY_F15),
	84	KEY(5, 3, KEY_F16),
	85	KEY(5, 4, KEY_SLEEP),
	86	0
	87	};
	88
	89
	90	static struct mtd_partition nor_partitions[] = {
1da177e4 LT	91	/* bootloader (U-Boot, etc) in first sector */
	92	{
	93	.name = "bootloader",
	94	.offset = 0,
	95	.size = SZ_128K,
	96	.mask_flags = MTD_WRITEABLE, /* force read-only */
	97	},
	98	/* bootloader params in the next sector */
	99	{
	100	.name = "params",
	101	.offset = MTDPART_OFS_APPEND,
	102	.size = SZ_128K,
	103	.mask_flags = 0,
	104	},
	105	/* kernel */
	106	{
	107	.name = "kernel",
	108	.offset = MTDPART_OFS_APPEND,
	109	.size = SZ_2M,
	110	.mask_flags = 0
	111	},
	112	/* file system */
	113	{
	114	.name = "filesystem",
	115	.offset = MTDPART_OFS_APPEND,
	116	.size = MTDPART_SIZ_FULL,
	117	.mask_flags = 0
	118	}
	119	};
	120
9b6553cd	121	static struct flash_platform_data nor_data = {
1da177e4 LT	122	.map_name = "cfi_probe",
1da177e4 LT	123	.width = 2,
9b6553cd TL	124	.parts = nor_partitions,
9b6553cd TL	125	.nr_parts = ARRAY_SIZE(nor_partitions),
1da177e4 LT	126	};
1da177e4 LT	127
9b6553cd	128	static struct resource nor_resource = {
7c38cf02	129	/* This is on CS3, wherever it's mapped */
1da177e4 LT	130	.flags = IORESOURCE_MEM,
	131	};
	132
9b6553cd	133	static struct platform_device nor_device = {
1da177e4 LT	134	.name = "omapflash",
	135	.id = 0,
	136	.dev = {
9b6553cd TL	137	.platform_data = &nor_data,
	138	},
	139	.num_resources = 1,
	140	.resource = &nor_resource,
	141	};
	142
	143	static struct mtd_partition nand_partitions[] = {
	144	#if 0
	145	/* REVISIT: enable these partitions if you make NAND BOOT work */
	146	{
	147	.name = "xloader",
	148	.offset = 0,
	149	.size = 64 * 1024,
	150	.mask_flags = MTD_WRITEABLE, /* force read-only */
	151	},
	152	{
	153	.name = "bootloader",
	154	.offset = MTDPART_OFS_APPEND,
	155	.size = 256 * 1024,
	156	.mask_flags = MTD_WRITEABLE, /* force read-only */
	157	},
	158	{
	159	.name = "params",
	160	.offset = MTDPART_OFS_APPEND,
	161	.size = 192 * 1024,
	162	},
	163	{
	164	.name = "kernel",
	165	.offset = MTDPART_OFS_APPEND,
	166	.size = 2 * SZ_1M,
	167	},
	168	#endif
	169	{
	170	.name = "filesystem",
	171	.size = MTDPART_SIZ_FULL,
	172	.offset = MTDPART_OFS_APPEND,
	173	},
	174	};
	175
	176	/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
	177	static struct nand_platform_data nand_data = {
	178	.options = NAND_SAMSUNG_LP_OPTIONS,
	179	.parts = nand_partitions,
	180	.nr_parts = ARRAY_SIZE(nand_partitions),
	181	};
	182
	183	static struct resource nand_resource = {
	184	.flags = IORESOURCE_MEM,
	185	};
	186
	187	static struct platform_device nand_device = {
	188	.name = "omapnand",
	189	.id = 0,
	190	.dev = {
	191	.platform_data = &nand_data,
1da177e4 LT	192	},
1da177e4 LT	193	.num_resources = 1,
9b6553cd	194	.resource = &nand_resource,
1da177e4 LT	195	};
	196
	197	static struct resource smc91x_resources[] = {
	198	[0] = {
	199	.start = OMAP1710_ETHR_START, /* Physical */
	200	.end = OMAP1710_ETHR_START + 0xf,
	201	.flags = IORESOURCE_MEM,
	202	},
	203	[1] = {
	204	.start = OMAP_GPIO_IRQ(40),
	205	.end = OMAP_GPIO_IRQ(40),
	206	.flags = IORESOURCE_IRQ,
	207	},
	208	};
	209
	210	static struct platform_device smc91x_device = {
	211	.name = "smc91x",
	212	.id = 0,
	213	.num_resources = ARRAY_SIZE(smc91x_resources),
	214	.resource = smc91x_resources,
	215	};
	216
	217	#define GPTIMER_BASE 0xFFFB1400
	218	#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
	219	#define GPTIMER_REGS_SIZE 0x46
	220
	221	static struct resource intlat_resources[] = {
	222	[0] = {
	223	.start = GPTIMER_REGS(0), /* Physical */
	224	.end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
	225	.flags = IORESOURCE_MEM,
	226	},
	227	[1] = {
	228	.start = INT_1610_GPTIMER1,
	229	.end = INT_1610_GPTIMER1,
	230	.flags = IORESOURCE_IRQ,
	231	},
	232	};
	233
	234	static struct platform_device intlat_device = {
	235	.name = "omap_intlat",
	236	.id = 0,
	237	.num_resources = ARRAY_SIZE(intlat_resources),
	238	.resource = intlat_resources,
	239	};
	240
9b6553cd TL	241	static struct resource h3_kp_resources[] = {
	242	[0] = {
	243	.start = INT_KEYBOARD,
	244	.end = INT_KEYBOARD,
	245	.flags = IORESOURCE_IRQ,
	246	},
	247	};
	248
	249	static struct omap_kp_platform_data h3_kp_data = {
4d24607b KS	250	.rows = 8,
	251	.cols = 8,
	252	.keymap = h3_keymap,
	253	.keymapsize = ARRAY_SIZE(h3_keymap),
	254	.rep = 1,
	255	.delay = 9,
	256	.dbounce = 1,
9b6553cd TL	257	};
	258
	259	static struct platform_device h3_kp_device = {
	260	.name = "omap-keypad",
	261	.id = -1,
	262	.dev = {
	263	.platform_data = &h3_kp_data,
	264	},
	265	.num_resources = ARRAY_SIZE(h3_kp_resources),
	266	.resource = h3_kp_resources,
	267	};
	268
	269
	270	/* Select between the IrDA and aGPS module
	271	*/
	272	static int h3_select_irda(struct device *dev, int state)
	273	{
	274	unsigned char expa;
	275	int err = 0;
	276
	277	if ((err = read_gpio_expa(&expa, 0x26))) {
	278	printk(KERN_ERR "Error reading from I/O EXPANDER \n");
	279	return err;
	280	}
	281
	282	/* 'P6' enable/disable IRDA_TX and IRDA_RX */
	283	if (state & IR_SEL) { /* IrDA */
	284	if ((err = write_gpio_expa(expa \| 0x40, 0x26))) {
	285	printk(KERN_ERR "Error writing to I/O EXPANDER \n");
	286	return err;
	287	}
	288	} else {
	289	if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
	290	printk(KERN_ERR "Error writing to I/O EXPANDER \n");
	291	return err;
	292	}
	293	}
	294	return err;
	295	}
	296
	297	static void set_trans_mode(void *data)
	298	{
	299	int *mode = data;
	300	unsigned char expa;
	301	int err = 0;
	302
	303	if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
	304	printk(KERN_ERR "Error reading from I/O expander\n");
	305	}
	306
	307	expa &= ~0x03;
	308
	309	if (*mode & IR_SIRMODE) {
	310	expa \|= 0x01;
	311	} else { /* MIR/FIR */
	312	expa \|= 0x03;
	313	}
	314
	315	if ((err = write_gpio_expa(expa, 0x27)) != 0) {
	316	printk(KERN_ERR "Error writing to I/O expander\n");
	317	}
	318	}
	319
	320	static int h3_transceiver_mode(struct device *dev, int mode)
321	{
322	struct omap_irda_config *irda_config = dev->platform_data;
323
324	cancel_delayed_work(&irda_config->gpio_expa);
325	PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode);
6d5aefb8 DH	326	#error this is not permitted - mode is an argument variable
6d5aefb8 DH	327	schedule_delayed_work(&irda_config->gpio_expa, 0);
9b6553cd TL	328
	329	return 0;
	330	}
	331
	332	static struct omap_irda_config h3_irda_data = {
	333	.transceiver_cap = IR_SIRMODE \| IR_MIRMODE \| IR_FIRMODE,
	334	.transceiver_mode = h3_transceiver_mode,
	335	.select_irda = h3_select_irda,
	336	.rx_channel = OMAP_DMA_UART3_RX,
	337	.tx_channel = OMAP_DMA_UART3_TX,
	338	.dest_start = UART3_THR,
	339	.src_start = UART3_RHR,
	340	.tx_trigger = 0,
	341	.rx_trigger = 0,
	342	};
	343
	344	static struct resource h3_irda_resources[] = {
	345	[0] = {
	346	.start = INT_UART3,
	347	.end = INT_UART3,
	348	.flags = IORESOURCE_IRQ,
	349	},
	350	};
	351
	352	static struct platform_device h3_irda_device = {
	353	.name = "omapirda",
	354	.id = 0,
	355	.dev = {
	356	.platform_data = &h3_irda_data,
	357	},
	358	.num_resources = ARRAY_SIZE(h3_irda_resources),
	359	.resource = h3_irda_resources,
	360	};
	361
	362	static struct platform_device h3_lcd_device = {
	363	.name = "lcd_h3",
	364	.id = -1,
	365	};
	366
1da177e4	367	static struct platform_device *devices[] __initdata = {
9b6553cd TL	368	&nor_device,
9b6553cd TL	369	&nand_device,
1da177e4 LT	370	&smc91x_device,
1da177e4 LT	371	&intlat_device,
9b6553cd TL	372	&h3_irda_device,
	373	&h3_kp_device,
	374	&h3_lcd_device,
1da177e4 LT	375	};
	376
	377	static struct omap_usb_config h3_usb_config __initdata = {
	378	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	379	.otg = 2,
	380
	381	#ifdef CONFIG_USB_GADGET_OMAP
	382	.hmc_mode = 19, /* 0:host(off) 1:dev\|otg 2:disabled */
	383	#elif defined(CONFIG_USB_OHCI_HCD) \|\| defined(CONFIG_USB_OHCI_HCD_MODULE)
	384	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	385	.hmc_mode = 20, /* 1:dev\|otg(off) 1:host 2:disabled */
	386	#endif
	387
	388	.pins[1] = 3,
	389	};
	390
7c38cf02 TL	391	static struct omap_mmc_config h3_mmc_config __initdata = {
	392	.mmc[0] = {
	393	.enabled = 1,
	394	.power_pin = -1, /* tps65010 GPIO4 */
	395	.switch_pin = OMAP_MPUIO(1),
	396	},
	397	};
	398
3179a019 TL	399	static struct omap_uart_config h3_uart_config __initdata = {
	400	.enabled_uarts = ((1 << 0) \| (1 << 1) \| (1 << 2)),
	401	};
	402
	403	static struct omap_lcd_config h3_lcd_config __initdata = {
3179a019 TL	404	.ctrl_name = "internal",
	405	};
	406
1da177e4	407	static struct omap_board_config_kernel h3_config[] = {
3179a019 TL	408	{ OMAP_TAG_USB, &h3_usb_config },
	409	{ OMAP_TAG_MMC, &h3_mmc_config },
	410	{ OMAP_TAG_UART, &h3_uart_config },
	411	{ OMAP_TAG_LCD, &h3_lcd_config },
1da177e4 LT	412	};
1da177e4 LT	413
9b6553cd TL	414	#define H3_NAND_RB_GPIO_PIN 10
	415
	416	static int nand_dev_ready(struct nand_platform_data *data)
	417	{
	418	return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
	419	}
	420
1da177e4 LT	421	static void __init h3_init(void)
1da177e4 LT	422	{
9b6553cd TL	423	/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
	424	* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
	425	* notice whether a NAND chip is enabled at probe time.
	426	*
	427	* H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	428	* (which on H2 may be 16bit) on CS3. Try detecting that in code here,
	429	* to avoid probing every possible flash configuration...
	430	*/
	431	nor_resource.end = nor_resource.start = omap_cs3_phys();
	432	nor_resource.end += SZ_32M - 1;
	433
	434	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	435	nand_resource.end += SZ_4K - 1;
	436	if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
	437	nand_data.dev_ready = nand_dev_ready;
	438
	439	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	440	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	441	omap_cfg_reg(V2_1710_GPIO10);
	442
	443	platform_add_devices(devices, ARRAY_SIZE(devices));
7c38cf02 TL	444	omap_board_config = h3_config;
7c38cf02 TL	445	omap_board_config_size = ARRAY_SIZE(h3_config);
3179a019	446	omap_serial_init();
1da177e4 LT	447	}
	448
	449	static void __init h3_init_smc91x(void)
	450	{
	451	omap_cfg_reg(W15_1710_GPIO40);
	452	if (omap_request_gpio(40) < 0) {
	453	printk("Error requesting gpio 40 for smc91x irq\n");
	454	return;
	455	}
1da177e4 LT	456	}
	457
	458	void h3_init_irq(void)
	459	{
87bd63f6	460	omap1_init_common_hw();
1da177e4 LT	461	omap_init_irq();
	462	omap_gpio_init();
	463	h3_init_smc91x();
	464	}
	465
	466	static void __init h3_map_io(void)
	467	{
87bd63f6	468	omap1_map_common_io();
1da177e4 LT	469	}
	470
	471	MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
e9dea0c6	472	/* Maintainer: Texas Instruments, Inc. */
e9dea0c6 RK	473	.phys_io = 0xfff00000,
	474	.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
	475	.boot_params = 0x10000100,
	476	.map_io = h3_map_io,
	477	.init_irq = h3_init_irq,
	478	.init_machine = h3_init,
1da177e4 LT	479	.timer = &omap_timer,
1da177e4 LT	480	MACHINE_END