[deliverable/linux.git] / arch / arm / mach-omap1 / board-h3.c

/*
 * linux/arch/arm/mach-omap1/board-h3.c
 *
 * This file contains OMAP1710 H3 specific code.
 *
 * Copyright (C) 2004 Texas Instruments, Inc.
 * Copyright (C) 2002 MontaVista Software, Inc.
 * Copyright (C) 2001 RidgeRun, Inc.
 * Author: RidgeRun, Inc.
 *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/types.h>
#include <linux/init.h>
#include <linux/major.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/workqueue.h>
#include <linux/i2c.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/i2c/tps65010.h>

#include <asm/setup.h>
#include <asm/page.h>
#include <asm/hardware.h>
#include <asm/gpio.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>

#include <asm/arch/gpioexpander.h>
#include <asm/arch/irqs.h>
#include <asm/arch/mux.h>
#include <asm/arch/tc.h>
#include <asm/arch/nand.h>
#include <asm/arch/irda.h>
#include <asm/arch/usb.h>
#include <asm/arch/keypad.h>
#include <asm/arch/dma.h>
#include <asm/arch/common.h>
#include <asm/arch/mcbsp.h>
#include <asm/arch/omap-alsa.h>

extern int omap_gpio_init(void);

static int h3_keymap[] = {
	KEY(0, 0, KEY_LEFT),
	KEY(0, 1, KEY_RIGHT),
	KEY(0, 2, KEY_3),
	KEY(0, 3, KEY_F10),
	KEY(0, 4, KEY_F5),
	KEY(0, 5, KEY_9),
	KEY(1, 0, KEY_DOWN),
	KEY(1, 1, KEY_UP),
	KEY(1, 2, KEY_2),
	KEY(1, 3, KEY_F9),
	KEY(1, 4, KEY_F7),
	KEY(1, 5, KEY_0),
	KEY(2, 0, KEY_ENTER),
	KEY(2, 1, KEY_6),
	KEY(2, 2, KEY_1),
	KEY(2, 3, KEY_F2),
	KEY(2, 4, KEY_F6),
	KEY(2, 5, KEY_HOME),
	KEY(3, 0, KEY_8),
	KEY(3, 1, KEY_5),
	KEY(3, 2, KEY_F12),
	KEY(3, 3, KEY_F3),
	KEY(3, 4, KEY_F8),
	KEY(3, 5, KEY_END),
	KEY(4, 0, KEY_7),
	KEY(4, 1, KEY_4),
	KEY(4, 2, KEY_F11),
	KEY(4, 3, KEY_F1),
	KEY(4, 4, KEY_F4),
	KEY(4, 5, KEY_ESC),
	KEY(5, 0, KEY_F13),
	KEY(5, 1, KEY_F14),
	KEY(5, 2, KEY_F15),
	KEY(5, 3, KEY_F16),
	KEY(5, 4, KEY_SLEEP),
	0
};


static struct mtd_partition nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
	      .name		= "bootloader",
	      .offset		= 0,
	      .size		= SZ_128K,
	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
	      .name		= "params",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_128K,
	      .mask_flags	= 0,
	},
	/* kernel */
	{
	      .name		= "kernel",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_2M,
	      .mask_flags	= 0
	},
	/* file system */
	{
	      .name		= "filesystem",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= MTDPART_SIZ_FULL,
	      .mask_flags	= 0
	}
};

static struct flash_platform_data nor_data = {
	.map_name	= "cfi_probe",
	.width		= 2,
	.parts		= nor_partitions,
	.nr_parts	= ARRAY_SIZE(nor_partitions),
};

static struct resource nor_resource = {
	/* This is on CS3, wherever it's mapped */
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nor_device = {
	.name		= "omapflash",
	.id		= 0,
	.dev		= {
		.platform_data	= &nor_data,
	},
	.num_resources	= 1,
	.resource	= &nor_resource,
};

static struct mtd_partition nand_partitions[] = {
#if 0
	/* REVISIT: enable these partitions if you make NAND BOOT work */
	{
		.name		= "xloader",
		.offset		= 0,
		.size		= 64 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "bootloader",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 256 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 192 * 1024,
	},
	{
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 2 * SZ_1M,
	},
#endif
	{
		.name		= "filesystem",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,
	},
};

/* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
static struct omap_nand_platform_data nand_data = {
	.options	= NAND_SAMSUNG_LP_OPTIONS,
	.parts		= nand_partitions,
	.nr_parts	= ARRAY_SIZE(nand_partitions),
};

static struct resource nand_resource = {
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nand_device = {
	.name		= "omapnand",
	.id		= 0,
	.dev		= {
		.platform_data	= &nand_data,
	},
	.num_resources	= 1,
	.resource	= &nand_resource,
};

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= OMAP1710_ETHR_START,		/* Physical */
		.end	= OMAP1710_ETHR_START + 0xf,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= OMAP_GPIO_IRQ(40),
		.end	= OMAP_GPIO_IRQ(40),
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
	},
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

#define GPTIMER_BASE		0xFFFB1400
#define GPTIMER_REGS(x)	(0xFFFB1400 + (x * 0x800))
#define GPTIMER_REGS_SIZE	0x46

static struct resource intlat_resources[] = {
	[0] = {
		.start  = GPTIMER_REGS(0),	      /* Physical */
		.end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = INT_1610_GPTIMER1,
		.end    = INT_1610_GPTIMER1,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device intlat_device = {
	.name	   = "omap_intlat",
	.id	     = 0,
	.num_resources  = ARRAY_SIZE(intlat_resources),
	.resource       = intlat_resources,
};

static struct resource h3_kp_resources[] = {
	[0] = {
		.start	= INT_KEYBOARD,
		.end	= INT_KEYBOARD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct omap_kp_platform_data h3_kp_data = {
	.rows		= 8,
	.cols		= 8,
	.keymap		= h3_keymap,
	.keymapsize	= ARRAY_SIZE(h3_keymap),
	.rep		= 1,
	.delay		= 9,
	.dbounce	= 1,
};

static struct platform_device h3_kp_device = {
	.name		= "omap-keypad",
	.id		= -1,
	.dev		= {
		.platform_data = &h3_kp_data,
	},
	.num_resources	= ARRAY_SIZE(h3_kp_resources),
	.resource	= h3_kp_resources,
};


/* Select between the IrDA and aGPS module
 */
static int h3_select_irda(struct device *dev, int state)
{
	unsigned char expa;
	int err = 0;

	if ((err = read_gpio_expa(&expa, 0x26))) {
		printk(KERN_ERR "Error reading from I/O EXPANDER \n");
		return err;
	}

	/* 'P6' enable/disable IRDA_TX and IRDA_RX */
	if (state & IR_SEL) { /* IrDA */
		if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
			printk(KERN_ERR "Error writing to I/O EXPANDER \n");
			return err;
		}
	} else {
		if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
			printk(KERN_ERR "Error writing to I/O EXPANDER \n");
			return err;
		}
	}
	return err;
}

static void set_trans_mode(struct work_struct *work)
{
	struct omap_irda_config *irda_config =
		container_of(work, struct omap_irda_config, gpio_expa.work);
	int mode = irda_config->mode;
	unsigned char expa;
	int err = 0;

	if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
		printk(KERN_ERR "Error reading from I/O expander\n");
	}

	expa &= ~0x03;

	if (mode & IR_SIRMODE) {
		expa |= 0x01;
	} else { /* MIR/FIR */
		expa |= 0x03;
	}

	if ((err = write_gpio_expa(expa, 0x27)) != 0) {
		printk(KERN_ERR "Error writing to I/O expander\n");
	}
}

static int h3_transceiver_mode(struct device *dev, int mode)
{
	struct omap_irda_config *irda_config = dev->platform_data;

	irda_config->mode = mode;
	cancel_delayed_work(&irda_config->gpio_expa);
	PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
	schedule_delayed_work(&irda_config->gpio_expa, 0);

	return 0;
}

static struct omap_irda_config h3_irda_data = {
	.transceiver_cap	= IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
	.transceiver_mode	= h3_transceiver_mode,
	.select_irda	 	= h3_select_irda,
	.rx_channel		= OMAP_DMA_UART3_RX,
	.tx_channel		= OMAP_DMA_UART3_TX,
	.dest_start		= UART3_THR,
	.src_start		= UART3_RHR,
	.tx_trigger		= 0,
	.rx_trigger		= 0,
};

static struct resource h3_irda_resources[] = {
	[0] = {
		.start	= INT_UART3,
		.end	= INT_UART3,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 irda_dmamask = 0xffffffff;

static struct platform_device h3_irda_device = {
	.name		= "omapirda",
	.id		= 0,
	.dev		= {
		.platform_data	= &h3_irda_data,
		.dma_mask	= &irda_dmamask,
	},
	.num_resources	= ARRAY_SIZE(h3_irda_resources),
	.resource	= h3_irda_resources,
};

static struct platform_device h3_lcd_device = {
	.name		= "lcd_h3",
	.id		= -1,
};

static struct omap_mcbsp_reg_cfg mcbsp_regs = {
	.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
	.spcr1 = RINTM(3) | RRST,
	.rcr2  = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
                RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
	.rcr1  = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
	.xcr2  = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
                XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
	.xcr1  = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
	.srgr1 = FWID(15),
	.srgr2 = GSYNC | CLKSP | FSGM | FPER(31),

	.pcr0  = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
	/*.pcr0 = CLKXP | CLKRP,*/        /* mcbsp: slave */
};

static struct omap_alsa_codec_config alsa_config = {
	.name                   = "H3 TSC2101",
	.mcbsp_regs_alsa        = &mcbsp_regs,
	.codec_configure_dev    = NULL, /* tsc2101_configure, */
	.codec_set_samplerate   = NULL, /* tsc2101_set_samplerate, */
	.codec_clock_setup      = NULL, /* tsc2101_clock_setup, */
	.codec_clock_on         = NULL, /* tsc2101_clock_on, */
	.codec_clock_off        = NULL, /* tsc2101_clock_off, */
	.get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
};

static struct platform_device h3_mcbsp1_device = {
	.name	= "omap_alsa_mcbsp",
	.id	= 1,
	.dev = {
		.platform_data	= &alsa_config,
	},
};

static struct platform_device *devices[] __initdata = {
	&nor_device,
	&nand_device,
        &smc91x_device,
	&intlat_device,
	&h3_irda_device,
	&h3_kp_device,
	&h3_lcd_device,
	&h3_mcbsp1_device,
};

static struct omap_usb_config h3_usb_config __initdata = {
	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	.otg	    = 2,

#ifdef CONFIG_USB_GADGET_OMAP
	.hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
#elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	.hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
#endif

	.pins[1]	= 3,
};

static struct omap_mmc_config h3_mmc_config __initdata = {
	.mmc[0] = {
		.enabled 	= 1,
		.power_pin	= -1,   /* tps65010 GPIO4 */
		.switch_pin	= OMAP_MPUIO(1),
	},
};

static struct omap_uart_config h3_uart_config __initdata = {
	.enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
};

static struct omap_lcd_config h3_lcd_config __initdata = {
	.ctrl_name	= "internal",
};

static struct omap_board_config_kernel h3_config[] = {
	{ OMAP_TAG_USB,		&h3_usb_config },
	{ OMAP_TAG_MMC,		&h3_mmc_config },
	{ OMAP_TAG_UART,	&h3_uart_config },
	{ OMAP_TAG_LCD,		&h3_lcd_config },
};

static struct i2c_board_info __initdata h3_i2c_board_info[] = {
	{
		I2C_BOARD_INFO("tps65010", 0x48),
		.type		= "tps65013",
		/* .irq		= OMAP_GPIO_IRQ(??), */
	},
	/* TODO when driver support is ready:
	 *  - isp1301 OTG transceiver
	 *  - optional ov9640 camera sensor at 0x30
	 *  - ...
	 */
};

#define H3_NAND_RB_GPIO_PIN	10

static int nand_dev_ready(struct omap_nand_platform_data *data)
{
	return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
}

static void __init h3_init(void)
{
	/* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
	 * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
	 * notice whether a NAND chip is enabled at probe time.
	 *
	 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	 * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
	 * to avoid probing every possible flash configuration...
	 */
	nor_resource.end = nor_resource.start = omap_cs3_phys();
	nor_resource.end += SZ_32M - 1;

	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	nand_resource.end += SZ_4K - 1;
	if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
		nand_data.dev_ready = nand_dev_ready;

	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	omap_cfg_reg(V2_1710_GPIO10);

	platform_add_devices(devices, ARRAY_SIZE(devices));
	omap_board_config = h3_config;
	omap_board_config_size = ARRAY_SIZE(h3_config);
	omap_serial_init();

	/* FIXME setup irq for tps65013 chip */
	i2c_register_board_info(1, h3_i2c_board_info,
			ARRAY_SIZE(h3_i2c_board_info));
}

static void __init h3_init_smc91x(void)
{
	omap_cfg_reg(W15_1710_GPIO40);
	if (omap_request_gpio(40) < 0) {
		printk("Error requesting gpio 40 for smc91x irq\n");
		return;
	}
}

static void __init h3_init_irq(void)
{
	omap1_init_common_hw();
	omap_init_irq();
	omap_gpio_init();
	h3_init_smc91x();
}

static void __init h3_map_io(void)
{
	omap1_map_common_io();
}

#ifdef CONFIG_TPS65010
static int __init h3_tps_init(void)
{
	if (!machine_is_omap_h3())
		return 0;

	/* gpio4 for SD, gpio3 for VDD_DSP */
	/* FIXME send power to DSP iff it's configured */

	/* Enable LOW_PWR */
	tps65013_set_low_pwr(ON);

	return 0;
}
fs_initcall(h3_tps_init);
#endif

MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
	/* Maintainer: Texas Instruments, Inc. */
	.phys_io	= 0xfff00000,
	.io_pg_offst	= ((0xfef00000) >> 18) & 0xfffc,
	.boot_params	= 0x10000100,
	.map_io		= h3_map_io,
	.init_irq	= h3_init_irq,
	.init_machine	= h3_init,
	.timer		= &omap_timer,
MACHINE_END
Commit	Line	Data
1da177e4	1	/*
dbdf9ced	2	* linux/arch/arm/mach-omap1/board-h3.c
1da177e4 LT	3	*
	4	* This file contains OMAP1710 H3 specific code.
	5	*
	6	* Copyright (C) 2004 Texas Instruments, Inc.
	7	* Copyright (C) 2002 MontaVista Software, Inc.
	8	* Copyright (C) 2001 RidgeRun, Inc.
	9	* Author: RidgeRun, Inc.
	10	* Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License version 2 as
	14	* published by the Free Software Foundation.
	15	*/
	16
1da177e4 LT	17	#include <linux/types.h>
	18	#include <linux/init.h>
	19	#include <linux/major.h>
	20	#include <linux/kernel.h>
d052d1be	21	#include <linux/platform_device.h>
1da177e4	22	#include <linux/errno.h>
9b6553cd	23	#include <linux/workqueue.h>
8056c6cb	24	#include <linux/i2c.h>
1da177e4	25	#include <linux/mtd/mtd.h>
9b6553cd	26	#include <linux/mtd/nand.h>
1da177e4	27	#include <linux/mtd/partitions.h>
9b6553cd	28	#include <linux/input.h>
6d16bfb5	29	#include <linux/i2c/tps65010.h>
1da177e4 LT	30
	31	#include <asm/setup.h>
	32	#include <asm/page.h>
	33	#include <asm/hardware.h>
8056c6cb DB	34	#include <asm/gpio.h>
8056c6cb DB	35
1da177e4 LT	36	#include <asm/mach-types.h>
	37	#include <asm/mach/arch.h>
	38	#include <asm/mach/flash.h>
	39	#include <asm/mach/map.h>
	40
9b6553cd	41	#include <asm/arch/gpioexpander.h>
1da177e4 LT	42	#include <asm/arch/irqs.h>
	43	#include <asm/arch/mux.h>
	44	#include <asm/arch/tc.h>
78be6325	45	#include <asm/arch/nand.h>
9b6553cd	46	#include <asm/arch/irda.h>
1da177e4	47	#include <asm/arch/usb.h>
9b6553cd TL	48	#include <asm/arch/keypad.h>
9b6553cd TL	49	#include <asm/arch/dma.h>
d48af15e	50	#include <asm/arch/common.h>
a524626b TL	51	#include <asm/arch/mcbsp.h>
a524626b TL	52	#include <asm/arch/omap-alsa.h>
1da177e4 LT	53
	54	extern int omap_gpio_init(void);
	55
9b6553cd TL	56	static int h3_keymap[] = {
	57	KEY(0, 0, KEY_LEFT),
	58	KEY(0, 1, KEY_RIGHT),
	59	KEY(0, 2, KEY_3),
	60	KEY(0, 3, KEY_F10),
	61	KEY(0, 4, KEY_F5),
	62	KEY(0, 5, KEY_9),
	63	KEY(1, 0, KEY_DOWN),
	64	KEY(1, 1, KEY_UP),
	65	KEY(1, 2, KEY_2),
	66	KEY(1, 3, KEY_F9),
	67	KEY(1, 4, KEY_F7),
	68	KEY(1, 5, KEY_0),
	69	KEY(2, 0, KEY_ENTER),
	70	KEY(2, 1, KEY_6),
	71	KEY(2, 2, KEY_1),
	72	KEY(2, 3, KEY_F2),
	73	KEY(2, 4, KEY_F6),
	74	KEY(2, 5, KEY_HOME),
	75	KEY(3, 0, KEY_8),
	76	KEY(3, 1, KEY_5),
	77	KEY(3, 2, KEY_F12),
	78	KEY(3, 3, KEY_F3),
	79	KEY(3, 4, KEY_F8),
	80	KEY(3, 5, KEY_END),
	81	KEY(4, 0, KEY_7),
	82	KEY(4, 1, KEY_4),
	83	KEY(4, 2, KEY_F11),
	84	KEY(4, 3, KEY_F1),
	85	KEY(4, 4, KEY_F4),
	86	KEY(4, 5, KEY_ESC),
	87	KEY(5, 0, KEY_F13),
	88	KEY(5, 1, KEY_F14),
	89	KEY(5, 2, KEY_F15),
	90	KEY(5, 3, KEY_F16),
	91	KEY(5, 4, KEY_SLEEP),
	92	0
	93	};
	94
	95
	96	static struct mtd_partition nor_partitions[] = {
1da177e4 LT	97	/* bootloader (U-Boot, etc) in first sector */
	98	{
	99	.name = "bootloader",
	100	.offset = 0,
	101	.size = SZ_128K,
	102	.mask_flags = MTD_WRITEABLE, /* force read-only */
	103	},
	104	/* bootloader params in the next sector */
	105	{
	106	.name = "params",
	107	.offset = MTDPART_OFS_APPEND,
	108	.size = SZ_128K,
	109	.mask_flags = 0,
	110	},
	111	/* kernel */
	112	{
	113	.name = "kernel",
	114	.offset = MTDPART_OFS_APPEND,
	115	.size = SZ_2M,
	116	.mask_flags = 0
	117	},
	118	/* file system */
	119	{
	120	.name = "filesystem",
	121	.offset = MTDPART_OFS_APPEND,
	122	.size = MTDPART_SIZ_FULL,
	123	.mask_flags = 0
	124	}
	125	};
	126
9b6553cd	127	static struct flash_platform_data nor_data = {
1da177e4 LT	128	.map_name = "cfi_probe",
1da177e4 LT	129	.width = 2,
9b6553cd TL	130	.parts = nor_partitions,
9b6553cd TL	131	.nr_parts = ARRAY_SIZE(nor_partitions),
1da177e4 LT	132	};
1da177e4 LT	133
9b6553cd	134	static struct resource nor_resource = {
7c38cf02	135	/* This is on CS3, wherever it's mapped */
1da177e4 LT	136	.flags = IORESOURCE_MEM,
	137	};
	138
9b6553cd	139	static struct platform_device nor_device = {
1da177e4 LT	140	.name = "omapflash",
	141	.id = 0,
	142	.dev = {
9b6553cd TL	143	.platform_data = &nor_data,
	144	},
	145	.num_resources = 1,
	146	.resource = &nor_resource,
	147	};
	148
	149	static struct mtd_partition nand_partitions[] = {
	150	#if 0
	151	/* REVISIT: enable these partitions if you make NAND BOOT work */
	152	{
	153	.name = "xloader",
	154	.offset = 0,
	155	.size = 64 * 1024,
	156	.mask_flags = MTD_WRITEABLE, /* force read-only */
	157	},
	158	{
	159	.name = "bootloader",
	160	.offset = MTDPART_OFS_APPEND,
	161	.size = 256 * 1024,
	162	.mask_flags = MTD_WRITEABLE, /* force read-only */
	163	},
	164	{
	165	.name = "params",
	166	.offset = MTDPART_OFS_APPEND,
	167	.size = 192 * 1024,
	168	},
	169	{
	170	.name = "kernel",
	171	.offset = MTDPART_OFS_APPEND,
	172	.size = 2 * SZ_1M,
	173	},
	174	#endif
	175	{
	176	.name = "filesystem",
	177	.size = MTDPART_SIZ_FULL,
	178	.offset = MTDPART_OFS_APPEND,
	179	},
	180	};
	181
	182	/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
78be6325	183	static struct omap_nand_platform_data nand_data = {
9b6553cd TL	184	.options = NAND_SAMSUNG_LP_OPTIONS,
	185	.parts = nand_partitions,
	186	.nr_parts = ARRAY_SIZE(nand_partitions),
	187	};
	188
	189	static struct resource nand_resource = {
	190	.flags = IORESOURCE_MEM,
	191	};
	192
	193	static struct platform_device nand_device = {
	194	.name = "omapnand",
	195	.id = 0,
	196	.dev = {
	197	.platform_data = &nand_data,
1da177e4 LT	198	},
1da177e4 LT	199	.num_resources = 1,
9b6553cd	200	.resource = &nand_resource,
1da177e4 LT	201	};
	202
	203	static struct resource smc91x_resources[] = {
	204	[0] = {
	205	.start = OMAP1710_ETHR_START, /* Physical */
	206	.end = OMAP1710_ETHR_START + 0xf,
	207	.flags = IORESOURCE_MEM,
	208	},
	209	[1] = {
	210	.start = OMAP_GPIO_IRQ(40),
	211	.end = OMAP_GPIO_IRQ(40),
e7b3dc7e	212	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWEDGE,
1da177e4 LT	213	},
	214	};
	215
	216	static struct platform_device smc91x_device = {
	217	.name = "smc91x",
	218	.id = 0,
	219	.num_resources = ARRAY_SIZE(smc91x_resources),
	220	.resource = smc91x_resources,
	221	};
	222
	223	#define GPTIMER_BASE 0xFFFB1400
	224	#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
	225	#define GPTIMER_REGS_SIZE 0x46
	226
	227	static struct resource intlat_resources[] = {
	228	[0] = {
	229	.start = GPTIMER_REGS(0), /* Physical */
	230	.end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
	231	.flags = IORESOURCE_MEM,
	232	},
	233	[1] = {
	234	.start = INT_1610_GPTIMER1,
	235	.end = INT_1610_GPTIMER1,
	236	.flags = IORESOURCE_IRQ,
	237	},
	238	};
	239
	240	static struct platform_device intlat_device = {
	241	.name = "omap_intlat",
	242	.id = 0,
	243	.num_resources = ARRAY_SIZE(intlat_resources),
	244	.resource = intlat_resources,
	245	};
	246
9b6553cd TL	247	static struct resource h3_kp_resources[] = {
	248	[0] = {
	249	.start = INT_KEYBOARD,
	250	.end = INT_KEYBOARD,
	251	.flags = IORESOURCE_IRQ,
	252	},
	253	};
	254
	255	static struct omap_kp_platform_data h3_kp_data = {
4d24607b KS	256	.rows = 8,
	257	.cols = 8,
	258	.keymap = h3_keymap,
	259	.keymapsize = ARRAY_SIZE(h3_keymap),
	260	.rep = 1,
	261	.delay = 9,
	262	.dbounce = 1,
9b6553cd TL	263	};
	264
	265	static struct platform_device h3_kp_device = {
	266	.name = "omap-keypad",
	267	.id = -1,
	268	.dev = {
	269	.platform_data = &h3_kp_data,
	270	},
	271	.num_resources = ARRAY_SIZE(h3_kp_resources),
	272	.resource = h3_kp_resources,
	273	};
	274
	275
	276	/* Select between the IrDA and aGPS module
	277	*/
	278	static int h3_select_irda(struct device *dev, int state)
	279	{
	280	unsigned char expa;
	281	int err = 0;
	282
	283	if ((err = read_gpio_expa(&expa, 0x26))) {
	284	printk(KERN_ERR "Error reading from I/O EXPANDER \n");
	285	return err;
	286	}
	287
	288	/* 'P6' enable/disable IRDA_TX and IRDA_RX */
	289	if (state & IR_SEL) { /* IrDA */
	290	if ((err = write_gpio_expa(expa \| 0x40, 0x26))) {
	291	printk(KERN_ERR "Error writing to I/O EXPANDER \n");
	292	return err;
	293	}
	294	} else {
	295	if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
	296	printk(KERN_ERR "Error writing to I/O EXPANDER \n");
	297	return err;
	298	}
	299	}
	300	return err;
	301	}
	302
666cd174	303	static void set_trans_mode(struct work_struct *work)
9b6553cd	304	{
666cd174 DB	305	struct omap_irda_config *irda_config =
	306	container_of(work, struct omap_irda_config, gpio_expa.work);
	307	int mode = irda_config->mode;
9b6553cd TL	308	unsigned char expa;
	309	int err = 0;
	310
	311	if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
	312	printk(KERN_ERR "Error reading from I/O expander\n");
	313	}
	314
	315	expa &= ~0x03;
	316
666cd174	317	if (mode & IR_SIRMODE) {
9b6553cd TL	318	expa \|= 0x01;
	319	} else { /* MIR/FIR */
	320	expa \|= 0x03;
	321	}
	322
	323	if ((err = write_gpio_expa(expa, 0x27)) != 0) {
	324	printk(KERN_ERR "Error writing to I/O expander\n");
	325	}
	326	}
	327
	328	static int h3_transceiver_mode(struct device *dev, int mode)
	329	{
	330	struct omap_irda_config *irda_config = dev->platform_data;
	331
666cd174	332	irda_config->mode = mode;
9b6553cd	333	cancel_delayed_work(&irda_config->gpio_expa);
666cd174	334	PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
6d5aefb8	335	schedule_delayed_work(&irda_config->gpio_expa, 0);
9b6553cd TL	336
	337	return 0;
	338	}
	339
	340	static struct omap_irda_config h3_irda_data = {
	341	.transceiver_cap = IR_SIRMODE \| IR_MIRMODE \| IR_FIRMODE,
	342	.transceiver_mode = h3_transceiver_mode,
	343	.select_irda = h3_select_irda,
	344	.rx_channel = OMAP_DMA_UART3_RX,
	345	.tx_channel = OMAP_DMA_UART3_TX,
	346	.dest_start = UART3_THR,
	347	.src_start = UART3_RHR,
	348	.tx_trigger = 0,
	349	.rx_trigger = 0,
	350	};
	351
	352	static struct resource h3_irda_resources[] = {
	353	[0] = {
	354	.start = INT_UART3,
	355	.end = INT_UART3,
	356	.flags = IORESOURCE_IRQ,
	357	},
	358	};
	359
a524626b TL	360	static u64 irda_dmamask = 0xffffffff;
a524626b TL	361
9b6553cd TL	362	static struct platform_device h3_irda_device = {
	363	.name = "omapirda",
	364	.id = 0,
	365	.dev = {
	366	.platform_data = &h3_irda_data,
a524626b	367	.dma_mask = &irda_dmamask,
9b6553cd TL	368	},
	369	.num_resources = ARRAY_SIZE(h3_irda_resources),
	370	.resource = h3_irda_resources,
	371	};
	372
	373	static struct platform_device h3_lcd_device = {
	374	.name = "lcd_h3",
	375	.id = -1,
	376	};
	377
a524626b TL	378	static struct omap_mcbsp_reg_cfg mcbsp_regs = {
	379	.spcr2 = FREE \| FRST \| GRST \| XRST \| XINTM(3),
	380	.spcr1 = RINTM(3) \| RRST,
	381	.rcr2 = RPHASE \| RFRLEN2(OMAP_MCBSP_WORD_8) \|
	382	RWDLEN2(OMAP_MCBSP_WORD_16) \| RDATDLY(1),
	383	.rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) \| RWDLEN1(OMAP_MCBSP_WORD_16),
	384	.xcr2 = XPHASE \| XFRLEN2(OMAP_MCBSP_WORD_8) \|
	385	XWDLEN2(OMAP_MCBSP_WORD_16) \| XDATDLY(1) \| XFIG,
	386	.xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) \| XWDLEN1(OMAP_MCBSP_WORD_16),
	387	.srgr1 = FWID(15),
	388	.srgr2 = GSYNC \| CLKSP \| FSGM \| FPER(31),
	389
	390	.pcr0 = CLKRM \| SCLKME \| FSXP \| FSRP \| CLKXP \| CLKRP,
6e2d4107	391	/.pcr0 = CLKXP \| CLKRP,/ /* mcbsp: slave */
a524626b TL	392	};
	393
	394	static struct omap_alsa_codec_config alsa_config = {
	395	.name = "H3 TSC2101",
	396	.mcbsp_regs_alsa = &mcbsp_regs,
6e2d4107 DC	397	.codec_configure_dev = NULL, /* tsc2101_configure, */
	398	.codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */
	399	.codec_clock_setup = NULL, /* tsc2101_clock_setup, */
	400	.codec_clock_on = NULL, /* tsc2101_clock_on, */
	401	.codec_clock_off = NULL, /* tsc2101_clock_off, */
	402	.get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
a524626b TL	403	};
	404
	405	static struct platform_device h3_mcbsp1_device = {
	406	.name = "omap_alsa_mcbsp",
	407	.id = 1,
	408	.dev = {
	409	.platform_data = &alsa_config,
	410	},
	411	};
	412
1da177e4	413	static struct platform_device *devices[] __initdata = {
9b6553cd TL	414	&nor_device,
9b6553cd TL	415	&nand_device,
1da177e4 LT	416	&smc91x_device,
1da177e4 LT	417	&intlat_device,
9b6553cd TL	418	&h3_irda_device,
	419	&h3_kp_device,
	420	&h3_lcd_device,
a524626b	421	&h3_mcbsp1_device,
1da177e4 LT	422	};
	423
	424	static struct omap_usb_config h3_usb_config __initdata = {
	425	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	426	.otg = 2,
	427
	428	#ifdef CONFIG_USB_GADGET_OMAP
	429	.hmc_mode = 19, /* 0:host(off) 1:dev\|otg 2:disabled */
	430	#elif defined(CONFIG_USB_OHCI_HCD) \|\| defined(CONFIG_USB_OHCI_HCD_MODULE)
	431	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	432	.hmc_mode = 20, /* 1:dev\|otg(off) 1:host 2:disabled */
	433	#endif
	434
	435	.pins[1] = 3,
	436	};
	437
7c38cf02 TL	438	static struct omap_mmc_config h3_mmc_config __initdata = {
	439	.mmc[0] = {
	440	.enabled = 1,
	441	.power_pin = -1, /* tps65010 GPIO4 */
	442	.switch_pin = OMAP_MPUIO(1),
	443	},
	444	};
	445
3179a019 TL	446	static struct omap_uart_config h3_uart_config __initdata = {
	447	.enabled_uarts = ((1 << 0) \| (1 << 1) \| (1 << 2)),
	448	};
	449
	450	static struct omap_lcd_config h3_lcd_config __initdata = {
3179a019 TL	451	.ctrl_name = "internal",
	452	};
	453
1da177e4	454	static struct omap_board_config_kernel h3_config[] = {
3179a019 TL	455	{ OMAP_TAG_USB, &h3_usb_config },
	456	{ OMAP_TAG_MMC, &h3_mmc_config },
	457	{ OMAP_TAG_UART, &h3_uart_config },
	458	{ OMAP_TAG_LCD, &h3_lcd_config },
1da177e4 LT	459	};
1da177e4 LT	460
8056c6cb DB	461	static struct i2c_board_info __initdata h3_i2c_board_info[] = {
	462	{
	463	I2C_BOARD_INFO("tps65010", 0x48),
	464	.type = "tps65013",
	465	/* .irq = OMAP_GPIO_IRQ(??), */
	466	},
	467	/* TODO when driver support is ready:
	468	* - isp1301 OTG transceiver
	469	* - optional ov9640 camera sensor at 0x30
	470	* - ...
	471	*/
	472	};
	473
9b6553cd TL	474	#define H3_NAND_RB_GPIO_PIN 10
9b6553cd TL	475
78be6325	476	static int nand_dev_ready(struct omap_nand_platform_data *data)
9b6553cd TL	477	{
	478	return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
	479	}
	480
1da177e4 LT	481	static void __init h3_init(void)
1da177e4 LT	482	{
9b6553cd TL	483	/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
	484	* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
	485	* notice whether a NAND chip is enabled at probe time.
	486	*
	487	* H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	488	* (which on H2 may be 16bit) on CS3. Try detecting that in code here,
	489	* to avoid probing every possible flash configuration...
	490	*/
	491	nor_resource.end = nor_resource.start = omap_cs3_phys();
	492	nor_resource.end += SZ_32M - 1;
	493
	494	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	495	nand_resource.end += SZ_4K - 1;
	496	if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
	497	nand_data.dev_ready = nand_dev_ready;
	498
	499	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	500	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	501	omap_cfg_reg(V2_1710_GPIO10);
	502
	503	platform_add_devices(devices, ARRAY_SIZE(devices));
7c38cf02 TL	504	omap_board_config = h3_config;
7c38cf02 TL	505	omap_board_config_size = ARRAY_SIZE(h3_config);
3179a019	506	omap_serial_init();
8056c6cb DB	507
	508	/* FIXME setup irq for tps65013 chip */
	509	i2c_register_board_info(1, h3_i2c_board_info,
	510	ARRAY_SIZE(h3_i2c_board_info));
1da177e4 LT	511	}
	512
	513	static void __init h3_init_smc91x(void)
	514	{
	515	omap_cfg_reg(W15_1710_GPIO40);
	516	if (omap_request_gpio(40) < 0) {
	517	printk("Error requesting gpio 40 for smc91x irq\n");
	518	return;
	519	}
1da177e4 LT	520	}
1da177e4 LT	521
277d58ef	522	static void __init h3_init_irq(void)
1da177e4	523	{
87bd63f6	524	omap1_init_common_hw();
1da177e4 LT	525	omap_init_irq();
	526	omap_gpio_init();
	527	h3_init_smc91x();
	528	}
	529
	530	static void __init h3_map_io(void)
	531	{
87bd63f6	532	omap1_map_common_io();
1da177e4 LT	533	}
1da177e4 LT	534
8056c6cb DB	535	#ifdef CONFIG_TPS65010
	536	static int __init h3_tps_init(void)
	537	{
	538	if (!machine_is_omap_h3())
	539	return 0;
	540
	541	/* gpio4 for SD, gpio3 for VDD_DSP */
	542	/* FIXME send power to DSP iff it's configured */
	543
	544	/* Enable LOW_PWR */
	545	tps65013_set_low_pwr(ON);
	546
	547	return 0;
	548	}
	549	fs_initcall(h3_tps_init);
	550	#endif
	551
1da177e4	552	MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
e9dea0c6	553	/* Maintainer: Texas Instruments, Inc. */
e9dea0c6 RK	554	.phys_io = 0xfff00000,
	555	.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
	556	.boot_params = 0x10000100,
	557	.map_io = h3_map_io,
	558	.init_irq = h3_init_irq,
	559	.init_machine = h3_init,
1da177e4 LT	560	.timer = &omap_timer,
1da177e4 LT	561	MACHINE_END