[deliverable/linux.git] / arch / arm / mach-omap1 / board-h3.c

/*
 * linux/arch/arm/mach-omap1/board-h3.c
 *
 * This file contains OMAP1710 H3 specific code.
 *
 * Copyright (C) 2004 Texas Instruments, Inc.
 * Copyright (C) 2002 MontaVista Software, Inc.
 * Copyright (C) 2001 RidgeRun, Inc.
 * Author: RidgeRun, Inc.
 *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/gpio.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/major.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/workqueue.h>
#include <linux/i2c.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/i2c/tps65010.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>

#include <asm/setup.h>
#include <asm/page.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>

#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/usb.h>
#include <plat/keypad.h>
#include <plat/dma.h>
#include <plat/flash.h>

#include <mach/hardware.h>
#include <mach/irqs.h>

#include "common.h"
#include "board-h3.h"

/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
#define OMAP1710_ETHR_START		0x04000300

#define H3_TS_GPIO	48

static const unsigned int h3_keymap[] = {
	KEY(0, 0, KEY_LEFT),
	KEY(1, 0, KEY_RIGHT),
	KEY(2, 0, KEY_3),
	KEY(3, 0, KEY_F10),
	KEY(4, 0, KEY_F5),
	KEY(5, 0, KEY_9),
	KEY(0, 1, KEY_DOWN),
	KEY(1, 1, KEY_UP),
	KEY(2, 1, KEY_2),
	KEY(3, 1, KEY_F9),
	KEY(4, 1, KEY_F7),
	KEY(5, 1, KEY_0),
	KEY(0, 2, KEY_ENTER),
	KEY(1, 2, KEY_6),
	KEY(2, 2, KEY_1),
	KEY(3, 2, KEY_F2),
	KEY(4, 2, KEY_F6),
	KEY(5, 2, KEY_HOME),
	KEY(0, 3, KEY_8),
	KEY(1, 3, KEY_5),
	KEY(2, 3, KEY_F12),
	KEY(3, 3, KEY_F3),
	KEY(4, 3, KEY_F8),
	KEY(5, 3, KEY_END),
	KEY(0, 4, KEY_7),
	KEY(1, 4, KEY_4),
	KEY(2, 4, KEY_F11),
	KEY(3, 4, KEY_F1),
	KEY(4, 4, KEY_F4),
	KEY(5, 4, KEY_ESC),
	KEY(0, 5, KEY_F13),
	KEY(1, 5, KEY_F14),
	KEY(2, 5, KEY_F15),
	KEY(3, 5, KEY_F16),
	KEY(4, 5, KEY_SLEEP),
};


static struct mtd_partition nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
	      .name		= "bootloader",
	      .offset		= 0,
	      .size		= SZ_128K,
	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
	      .name		= "params",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_128K,
	      .mask_flags	= 0,
	},
	/* kernel */
	{
	      .name		= "kernel",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_2M,
	      .mask_flags	= 0
	},
	/* file system */
	{
	      .name		= "filesystem",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= MTDPART_SIZ_FULL,
	      .mask_flags	= 0
	}
};

static struct physmap_flash_data nor_data = {
	.width		= 2,
	.set_vpp	= omap1_set_vpp,
	.parts		= nor_partitions,
	.nr_parts	= ARRAY_SIZE(nor_partitions),
};

static struct resource nor_resource = {
	/* This is on CS3, wherever it's mapped */
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nor_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev		= {
		.platform_data	= &nor_data,
	},
	.num_resources	= 1,
	.resource	= &nor_resource,
};

static struct mtd_partition nand_partitions[] = {
#if 0
	/* REVISIT: enable these partitions if you make NAND BOOT work */
	{
		.name		= "xloader",
		.offset		= 0,
		.size		= 64 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "bootloader",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 256 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 192 * 1024,
	},
	{
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 2 * SZ_1M,
	},
#endif
	{
		.name		= "filesystem",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,
	},
};

static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
	struct nand_chip *this = mtd->priv;
	unsigned long mask;

	if (cmd == NAND_CMD_NONE)
		return;

	mask = (ctrl & NAND_CLE) ? 0x02 : 0;
	if (ctrl & NAND_ALE)
		mask |= 0x04;
	writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
}

#define H3_NAND_RB_GPIO_PIN	10

static int nand_dev_ready(struct mtd_info *mtd)
{
	return gpio_get_value(H3_NAND_RB_GPIO_PIN);
}

static const char *part_probes[] = { "cmdlinepart", NULL };

static struct platform_nand_data nand_platdata = {
	.chip	= {
		.nr_chips		= 1,
		.chip_offset		= 0,
		.nr_partitions		= ARRAY_SIZE(nand_partitions),
		.partitions		= nand_partitions,
		.options		= NAND_SAMSUNG_LP_OPTIONS,
		.part_probe_types	= part_probes,
	},
	.ctrl	= {
		.cmd_ctrl	= nand_cmd_ctl,
		.dev_ready	= nand_dev_ready,

	},
};

static struct resource nand_resource = {
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nand_device = {
	.name		= "gen_nand",
	.id		= 0,
	.dev		= {
		.platform_data	= &nand_platdata,
	},
	.num_resources	= 1,
	.resource	= &nand_resource,
};

static struct smc91x_platdata smc91x_info = {
	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda	= RPC_LED_100_10,
	.ledb	= RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= OMAP1710_ETHR_START,		/* Physical */
		.end	= OMAP1710_ETHR_START + 0xf,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
	},
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

static void __init h3_init_smc91x(void)
{
	omap_cfg_reg(W15_1710_GPIO40);
	if (gpio_request(40, "SMC91x irq") < 0) {
		printk("Error requesting gpio 40 for smc91x irq\n");
		return;
	}
}

#define GPTIMER_BASE		0xFFFB1400
#define GPTIMER_REGS(x)	(0xFFFB1400 + (x * 0x800))
#define GPTIMER_REGS_SIZE	0x46

static struct resource intlat_resources[] = {
	[0] = {
		.start  = GPTIMER_REGS(0),	      /* Physical */
		.end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = INT_1610_GPTIMER1,
		.end    = INT_1610_GPTIMER1,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device intlat_device = {
	.name	   = "omap_intlat",
	.id	     = 0,
	.num_resources  = ARRAY_SIZE(intlat_resources),
	.resource       = intlat_resources,
};

static struct resource h3_kp_resources[] = {
	[0] = {
		.start	= INT_KEYBOARD,
		.end	= INT_KEYBOARD,
		.flags	= IORESOURCE_IRQ,
	},
};

static const struct matrix_keymap_data h3_keymap_data = {
	.keymap		= h3_keymap,
	.keymap_size	= ARRAY_SIZE(h3_keymap),
};

static struct omap_kp_platform_data h3_kp_data = {
	.rows		= 8,
	.cols		= 8,
	.keymap_data	= &h3_keymap_data,
	.rep		= true,
	.delay		= 9,
	.dbounce	= true,
};

static struct platform_device h3_kp_device = {
	.name		= "omap-keypad",
	.id		= -1,
	.dev		= {
		.platform_data = &h3_kp_data,
	},
	.num_resources	= ARRAY_SIZE(h3_kp_resources),
	.resource	= h3_kp_resources,
};

static struct platform_device h3_lcd_device = {
	.name		= "lcd_h3",
	.id		= -1,
};

static struct spi_board_info h3_spi_board_info[] __initdata = {
	[0] = {
		.modalias	= "tsc2101",
		.bus_num	= 2,
		.chip_select	= 0,
		.max_speed_hz	= 16000000,
		/* .platform_data	= &tsc_platform_data, */
	},
};

static struct platform_device *devices[] __initdata = {
	&nor_device,
	&nand_device,
        &smc91x_device,
	&intlat_device,
	&h3_kp_device,
	&h3_lcd_device,
};

static struct omap_usb_config h3_usb_config __initdata = {
	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	.otg	    = 2,

#ifdef CONFIG_USB_GADGET_OMAP
	.hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
#elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	.hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
#endif

	.pins[1]	= 3,
};

static struct omap_lcd_config h3_lcd_config __initdata = {
	.ctrl_name	= "internal",
};

static struct i2c_board_info __initdata h3_i2c_board_info[] = {
       {
		I2C_BOARD_INFO("tps65013", 0x48),
       },
	{
		I2C_BOARD_INFO("isp1301_omap", 0x2d),
	},
};

static void __init h3_init(void)
{
	h3_init_smc91x();

	/* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
	 * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
	 * notice whether a NAND chip is enabled at probe time.
	 *
	 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	 * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
	 * to avoid probing every possible flash configuration...
	 */
	nor_resource.end = nor_resource.start = omap_cs3_phys();
	nor_resource.end += SZ_32M - 1;

	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	nand_resource.end += SZ_4K - 1;
	if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
		BUG();
	gpio_direction_input(H3_NAND_RB_GPIO_PIN);

	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	omap_cfg_reg(V2_1710_GPIO10);

	/* Mux pins for keypad */
	omap_cfg_reg(F18_1610_KBC0);
	omap_cfg_reg(D20_1610_KBC1);
	omap_cfg_reg(D19_1610_KBC2);
	omap_cfg_reg(E18_1610_KBC3);
	omap_cfg_reg(C21_1610_KBC4);
	omap_cfg_reg(G18_1610_KBR0);
	omap_cfg_reg(F19_1610_KBR1);
	omap_cfg_reg(H14_1610_KBR2);
	omap_cfg_reg(E20_1610_KBR3);
	omap_cfg_reg(E19_1610_KBR4);
	omap_cfg_reg(N19_1610_KBR5);

	smc91x_resources[1].start = gpio_to_irq(40);
	smc91x_resources[1].end = gpio_to_irq(40);
	platform_add_devices(devices, ARRAY_SIZE(devices));
	h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO);
	spi_register_board_info(h3_spi_board_info,
				ARRAY_SIZE(h3_spi_board_info));
	omap_serial_init();
	h3_i2c_board_info[1].irq = gpio_to_irq(14);
	omap_register_i2c_bus(1, 100, h3_i2c_board_info,
			      ARRAY_SIZE(h3_i2c_board_info));
	omap1_usb_init(&h3_usb_config);
	h3_mmc_init();

	omapfb_set_lcd_config(&h3_lcd_config);
}

MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
	/* Maintainer: Texas Instruments, Inc. */
	.atag_offset	= 0x100,
	.map_io		= omap16xx_map_io,
	.init_early     = omap1_init_early,
	.reserve	= omap_reserve,
	.init_irq	= omap1_init_irq,
	.init_machine	= h3_init,
	.timer		= &omap1_timer,
	.restart	= omap1_restart,
MACHINE_END
Commit	Line	Data
1da177e4	1	/*
dbdf9ced	2	* linux/arch/arm/mach-omap1/board-h3.c
1da177e4 LT	3	*
	4	* This file contains OMAP1710 H3 specific code.
	5	*
	6	* Copyright (C) 2004 Texas Instruments, Inc.
	7	* Copyright (C) 2002 MontaVista Software, Inc.
	8	* Copyright (C) 2001 RidgeRun, Inc.
	9	* Author: RidgeRun, Inc.
	10	* Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License version 2 as
	14	* published by the Free Software Foundation.
	15	*/
2f8163ba	16	#include <linux/gpio.h>
1da177e4 LT	17	#include <linux/types.h>
	18	#include <linux/init.h>
	19	#include <linux/major.h>
	20	#include <linux/kernel.h>
d052d1be	21	#include <linux/platform_device.h>
1da177e4	22	#include <linux/errno.h>
9b6553cd	23	#include <linux/workqueue.h>
8056c6cb	24	#include <linux/i2c.h>
1da177e4	25	#include <linux/mtd/mtd.h>
9b6553cd	26	#include <linux/mtd/nand.h>
1da177e4	27	#include <linux/mtd/partitions.h>
561b036a	28	#include <linux/mtd/physmap.h>
9b6553cd	29	#include <linux/input.h>
0cc0a441	30	#include <linux/spi/spi.h>
6d16bfb5	31	#include <linux/i2c/tps65010.h>
3bc48014	32	#include <linux/smc91x.h>
ddba6c7f	33	#include <linux/omapfb.h>
1da177e4 LT	34
	35	#include <asm/setup.h>
	36	#include <asm/page.h>
1da177e4 LT	37	#include <asm/mach-types.h>
1da177e4 LT	38	#include <asm/mach/arch.h>
1da177e4 LT	39	#include <asm/mach/map.h>
1da177e4 LT	40
ce491cf8 TL	41	#include <plat/mux.h>
ce491cf8 TL	42	#include <plat/tc.h>
ce491cf8 TL	43	#include <plat/usb.h>
	44	#include <plat/keypad.h>
	45	#include <plat/dma.h>
561b036a	46	#include <plat/flash.h>
1da177e4	47
2e3ee9f4 TL	48	#include <mach/hardware.h>
	49	#include <mach/irqs.h>
	50
	51	#include "common.h"
228fe42e TL	52	#include "board-h3.h"
	53
	54	/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
	55	#define OMAP1710_ETHR_START 0x04000300
	56
0cc0a441 DB	57	#define H3_TS_GPIO 48
0cc0a441 DB	58
da1f026b	59	static const unsigned int h3_keymap[] = {
9b6553cd	60	KEY(0, 0, KEY_LEFT),
da1f026b JK	61	KEY(1, 0, KEY_RIGHT),
	62	KEY(2, 0, KEY_3),
	63	KEY(3, 0, KEY_F10),
	64	KEY(4, 0, KEY_F5),
	65	KEY(5, 0, KEY_9),
	66	KEY(0, 1, KEY_DOWN),
9b6553cd	67	KEY(1, 1, KEY_UP),
da1f026b JK	68	KEY(2, 1, KEY_2),
	69	KEY(3, 1, KEY_F9),
	70	KEY(4, 1, KEY_F7),
	71	KEY(5, 1, KEY_0),
	72	KEY(0, 2, KEY_ENTER),
	73	KEY(1, 2, KEY_6),
9b6553cd	74	KEY(2, 2, KEY_1),
da1f026b JK	75	KEY(3, 2, KEY_F2),
	76	KEY(4, 2, KEY_F6),
	77	KEY(5, 2, KEY_HOME),
	78	KEY(0, 3, KEY_8),
	79	KEY(1, 3, KEY_5),
	80	KEY(2, 3, KEY_F12),
9b6553cd	81	KEY(3, 3, KEY_F3),
da1f026b JK	82	KEY(4, 3, KEY_F8),
	83	KEY(5, 3, KEY_END),
	84	KEY(0, 4, KEY_7),
	85	KEY(1, 4, KEY_4),
	86	KEY(2, 4, KEY_F11),
	87	KEY(3, 4, KEY_F1),
9b6553cd	88	KEY(4, 4, KEY_F4),
da1f026b JK	89	KEY(5, 4, KEY_ESC),
	90	KEY(0, 5, KEY_F13),
	91	KEY(1, 5, KEY_F14),
	92	KEY(2, 5, KEY_F15),
	93	KEY(3, 5, KEY_F16),
	94	KEY(4, 5, KEY_SLEEP),
9b6553cd TL	95	};
	96
	97
	98	static struct mtd_partition nor_partitions[] = {
1da177e4 LT	99	/* bootloader (U-Boot, etc) in first sector */
	100	{
	101	.name = "bootloader",
	102	.offset = 0,
	103	.size = SZ_128K,
	104	.mask_flags = MTD_WRITEABLE, /* force read-only */
	105	},
	106	/* bootloader params in the next sector */
	107	{
	108	.name = "params",
	109	.offset = MTDPART_OFS_APPEND,
	110	.size = SZ_128K,
	111	.mask_flags = 0,
	112	},
	113	/* kernel */
	114	{
	115	.name = "kernel",
	116	.offset = MTDPART_OFS_APPEND,
	117	.size = SZ_2M,
	118	.mask_flags = 0
	119	},
	120	/* file system */
	121	{
	122	.name = "filesystem",
	123	.offset = MTDPART_OFS_APPEND,
	124	.size = MTDPART_SIZ_FULL,
	125	.mask_flags = 0
	126	}
	127	};
	128
561b036a	129	static struct physmap_flash_data nor_data = {
1da177e4	130	.width = 2,
561b036a	131	.set_vpp = omap1_set_vpp,
9b6553cd TL	132	.parts = nor_partitions,
9b6553cd TL	133	.nr_parts = ARRAY_SIZE(nor_partitions),
1da177e4 LT	134	};
1da177e4 LT	135
9b6553cd	136	static struct resource nor_resource = {
7c38cf02	137	/* This is on CS3, wherever it's mapped */
1da177e4 LT	138	.flags = IORESOURCE_MEM,
	139	};
	140
9b6553cd	141	static struct platform_device nor_device = {
561b036a	142	.name = "physmap-flash",
1da177e4 LT	143	.id = 0,
1da177e4 LT	144	.dev = {
9b6553cd TL	145	.platform_data = &nor_data,
	146	},
	147	.num_resources = 1,
	148	.resource = &nor_resource,
	149	};
	150
	151	static struct mtd_partition nand_partitions[] = {
	152	#if 0
	153	/* REVISIT: enable these partitions if you make NAND BOOT work */
	154	{
	155	.name = "xloader",
	156	.offset = 0,
	157	.size = 64 * 1024,
	158	.mask_flags = MTD_WRITEABLE, /* force read-only */
	159	},
	160	{
	161	.name = "bootloader",
	162	.offset = MTDPART_OFS_APPEND,
	163	.size = 256 * 1024,
	164	.mask_flags = MTD_WRITEABLE, /* force read-only */
	165	},
	166	{
	167	.name = "params",
	168	.offset = MTDPART_OFS_APPEND,
	169	.size = 192 * 1024,
	170	},
	171	{
	172	.name = "kernel",
	173	.offset = MTDPART_OFS_APPEND,
	174	.size = 2 * SZ_1M,
	175	},
	176	#endif
	177	{
	178	.name = "filesystem",
	179	.size = MTDPART_SIZ_FULL,
	180	.offset = MTDPART_OFS_APPEND,
	181	},
	182	};
	183
414f552a LM	184	static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
	185	{
	186	struct nand_chip *this = mtd->priv;
	187	unsigned long mask;
	188
	189	if (cmd == NAND_CMD_NONE)
	190	return;
	191
	192	mask = (ctrl & NAND_CLE) ? 0x02 : 0;
	193	if (ctrl & NAND_ALE)
	194	mask \|= 0x04;
	195	writeb(cmd, (unsigned long)this->IO_ADDR_W \| mask);
	196	}
	197
	198	#define H3_NAND_RB_GPIO_PIN 10
	199
	200	static int nand_dev_ready(struct mtd_info *mtd)
	201	{
	202	return gpio_get_value(H3_NAND_RB_GPIO_PIN);
	203	}
	204
	205	static const char *part_probes[] = { "cmdlinepart", NULL };
	206
277a2856	207	static struct platform_nand_data nand_platdata = {
414f552a LM	208	.chip = {
	209	.nr_chips = 1,
	210	.chip_offset = 0,
	211	.nr_partitions = ARRAY_SIZE(nand_partitions),
	212	.partitions = nand_partitions,
	213	.options = NAND_SAMSUNG_LP_OPTIONS,
	214	.part_probe_types = part_probes,
	215	},
	216	.ctrl = {
	217	.cmd_ctrl = nand_cmd_ctl,
	218	.dev_ready = nand_dev_ready,
	219
	220	},
9b6553cd TL	221	};
	222
	223	static struct resource nand_resource = {
	224	.flags = IORESOURCE_MEM,
	225	};
	226
	227	static struct platform_device nand_device = {
414f552a	228	.name = "gen_nand",
9b6553cd TL	229	.id = 0,
9b6553cd TL	230	.dev = {
414f552a	231	.platform_data = &nand_platdata,
1da177e4 LT	232	},
1da177e4 LT	233	.num_resources = 1,
9b6553cd	234	.resource = &nand_resource,
1da177e4 LT	235	};
1da177e4 LT	236
3bc48014 LM	237	static struct smc91x_platdata smc91x_info = {
	238	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	239	.leda = RPC_LED_100_10,
	240	.ledb = RPC_LED_TX_RX,
	241	};
	242
1da177e4 LT	243	static struct resource smc91x_resources[] = {
	244	[0] = {
	245	.start = OMAP1710_ETHR_START, /* Physical */
	246	.end = OMAP1710_ETHR_START + 0xf,
	247	.flags = IORESOURCE_MEM,
	248	},
	249	[1] = {
e7b3dc7e	250	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWEDGE,
1da177e4 LT	251	},
	252	};
	253
	254	static struct platform_device smc91x_device = {
	255	.name = "smc91x",
	256	.id = 0,
3bc48014 LM	257	.dev = {
	258	.platform_data = &smc91x_info,
	259	},
1da177e4 LT	260	.num_resources = ARRAY_SIZE(smc91x_resources),
	261	.resource = smc91x_resources,
	262	};
	263
c2cdaffe TL	264	static void __init h3_init_smc91x(void)
	265	{
	266	omap_cfg_reg(W15_1710_GPIO40);
	267	if (gpio_request(40, "SMC91x irq") < 0) {
	268	printk("Error requesting gpio 40 for smc91x irq\n");
	269	return;
	270	}
	271	}
	272
1da177e4 LT	273	#define GPTIMER_BASE 0xFFFB1400
	274	#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
	275	#define GPTIMER_REGS_SIZE 0x46
	276
	277	static struct resource intlat_resources[] = {
	278	[0] = {
	279	.start = GPTIMER_REGS(0), /* Physical */
	280	.end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
	281	.flags = IORESOURCE_MEM,
	282	},
	283	[1] = {
	284	.start = INT_1610_GPTIMER1,
	285	.end = INT_1610_GPTIMER1,
	286	.flags = IORESOURCE_IRQ,
	287	},
	288	};
	289
	290	static struct platform_device intlat_device = {
	291	.name = "omap_intlat",
	292	.id = 0,
	293	.num_resources = ARRAY_SIZE(intlat_resources),
	294	.resource = intlat_resources,
	295	};
	296
9b6553cd TL	297	static struct resource h3_kp_resources[] = {
	298	[0] = {
	299	.start = INT_KEYBOARD,
	300	.end = INT_KEYBOARD,
	301	.flags = IORESOURCE_IRQ,
	302	},
	303	};
	304
da1f026b JK	305	static const struct matrix_keymap_data h3_keymap_data = {
	306	.keymap = h3_keymap,
	307	.keymap_size = ARRAY_SIZE(h3_keymap),
	308	};
	309
9b6553cd	310	static struct omap_kp_platform_data h3_kp_data = {
4d24607b KS	311	.rows = 8,
4d24607b KS	312	.cols = 8,
da1f026b JK	313	.keymap_data = &h3_keymap_data,
da1f026b JK	314	.rep = true,
4d24607b	315	.delay = 9,
da1f026b	316	.dbounce = true,
9b6553cd TL	317	};
	318
	319	static struct platform_device h3_kp_device = {
	320	.name = "omap-keypad",
	321	.id = -1,
	322	.dev = {
	323	.platform_data = &h3_kp_data,
	324	},
	325	.num_resources = ARRAY_SIZE(h3_kp_resources),
	326	.resource = h3_kp_resources,
	327	};
	328
9b6553cd TL	329	static struct platform_device h3_lcd_device = {
	330	.name = "lcd_h3",
	331	.id = -1,
	332	};
	333
0cc0a441 DB	334	static struct spi_board_info h3_spi_board_info[] __initdata = {
	335	[0] = {
	336	.modalias = "tsc2101",
	337	.bus_num = 2,
	338	.chip_select = 0,
0cc0a441 DB	339	.max_speed_hz = 16000000,
	340	/* .platform_data = &tsc_platform_data, */
	341	},
	342	};
	343
1da177e4	344	static struct platform_device *devices[] __initdata = {
9b6553cd TL	345	&nor_device,
9b6553cd TL	346	&nand_device,
1da177e4 LT	347	&smc91x_device,
1da177e4 LT	348	&intlat_device,
9b6553cd TL	349	&h3_kp_device,
9b6553cd TL	350	&h3_lcd_device,
1da177e4 LT	351	};
	352
	353	static struct omap_usb_config h3_usb_config __initdata = {
	354	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	355	.otg = 2,
	356
	357	#ifdef CONFIG_USB_GADGET_OMAP
	358	.hmc_mode = 19, /* 0:host(off) 1:dev\|otg 2:disabled */
	359	#elif defined(CONFIG_USB_OHCI_HCD) \|\| defined(CONFIG_USB_OHCI_HCD_MODULE)
	360	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	361	.hmc_mode = 20, /* 1:dev\|otg(off) 1:host 2:disabled */
	362	#endif
	363
	364	.pins[1] = 3,
	365	};
	366
3179a019	367	static struct omap_lcd_config h3_lcd_config __initdata = {
3179a019 TL	368	.ctrl_name = "internal",
	369	};
	370
0cc0a441 DB	371	static struct i2c_board_info __initdata h3_i2c_board_info[] = {
0cc0a441 DB	372	{
3760f736	373	I2C_BOARD_INFO("tps65013", 0x48),
0cc0a441	374	},
9df013b3 JD	375	{
9df013b3 JD	376	I2C_BOARD_INFO("isp1301_omap", 0x2d),
9df013b3	377	},
0cc0a441 DB	378	};
0cc0a441 DB	379
1da177e4 LT	380	static void __init h3_init(void)
1da177e4 LT	381	{
c2cdaffe TL	382	h3_init_smc91x();
c2cdaffe TL	383
9b6553cd TL	384	/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
	385	* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
	386	* notice whether a NAND chip is enabled at probe time.
	387	*
	388	* H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	389	* (which on H2 may be 16bit) on CS3. Try detecting that in code here,
	390	* to avoid probing every possible flash configuration...
	391	*/
	392	nor_resource.end = nor_resource.start = omap_cs3_phys();
	393	nor_resource.end += SZ_32M - 1;
	394
	395	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	396	nand_resource.end += SZ_4K - 1;
f2d18fea JN	397	if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
f2d18fea JN	398	BUG();
414f552a	399	gpio_direction_input(H3_NAND_RB_GPIO_PIN);
9b6553cd TL	400
	401	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	402	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	403	omap_cfg_reg(V2_1710_GPIO10);
	404
93c43f25 TL	405	/* Mux pins for keypad */
	406	omap_cfg_reg(F18_1610_KBC0);
	407	omap_cfg_reg(D20_1610_KBC1);
	408	omap_cfg_reg(D19_1610_KBC2);
	409	omap_cfg_reg(E18_1610_KBC3);
	410	omap_cfg_reg(C21_1610_KBC4);
	411	omap_cfg_reg(G18_1610_KBR0);
	412	omap_cfg_reg(F19_1610_KBR1);
	413	omap_cfg_reg(H14_1610_KBR2);
	414	omap_cfg_reg(E20_1610_KBR3);
	415	omap_cfg_reg(E19_1610_KBR4);
	416	omap_cfg_reg(N19_1610_KBR5);
	417
46a0a540 TKD	418	smc91x_resources[1].start = gpio_to_irq(40);
46a0a540 TKD	419	smc91x_resources[1].end = gpio_to_irq(40);
9b6553cd	420	platform_add_devices(devices, ARRAY_SIZE(devices));
46a0a540	421	h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO);
e27a93a9 TL	422	spi_register_board_info(h3_spi_board_info,
e27a93a9 TL	423	ARRAY_SIZE(h3_spi_board_info));
3179a019	424	omap_serial_init();
46a0a540	425	h3_i2c_board_info[1].irq = gpio_to_irq(14);
1ed16a86 JN	426	omap_register_i2c_bus(1, 100, h3_i2c_board_info,
1ed16a86 JN	427	ARRAY_SIZE(h3_i2c_board_info));
dd0cdd88	428	omap1_usb_init(&h3_usb_config);
138ab9f8	429	h3_mmc_init();
ddba6c7f TV	430
ddba6c7f TV	431	omapfb_set_lcd_config(&h3_lcd_config);
1da177e4 LT	432	}
1da177e4 LT	433
1da177e4	434	MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
e9dea0c6	435	/* Maintainer: Texas Instruments, Inc. */
246e389d	436	.atag_offset = 0x100,
7b88e62f TL	437	.map_io = omap16xx_map_io,
7b88e62f TL	438	.init_early = omap1_init_early,
71ee7dad	439	.reserve = omap_reserve,
7b88e62f	440	.init_irq = omap1_init_irq,
e9dea0c6	441	.init_machine = h3_init,
e74984e4	442	.timer = &omap1_timer,
baa95883	443	.restart = omap1_restart,
1da177e4	444	MACHINE_END