[deliverable/linux.git] / arch / arm / mach-omap1 / board-h3.c

/*
 * linux/arch/arm/mach-omap1/board-h3.c
 *
 * This file contains OMAP1710 H3 specific code.
 *
 * Copyright (C) 2004 Texas Instruments, Inc.
 * Copyright (C) 2002 MontaVista Software, Inc.
 * Copyright (C) 2001 RidgeRun, Inc.
 * Author: RidgeRun, Inc.
 *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/gpio.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/major.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/workqueue.h>
#include <linux/i2c.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/i2c/tps65010.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <linux/platform_data/gpio-omap.h>

#include <asm/setup.h>
#include <asm/page.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>

#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/keypad.h>
#include <plat/dma.h>
#include <plat/flash.h>

#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/usb.h>

#include "common.h"
#include "board-h3.h"

/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
#define OMAP1710_ETHR_START		0x04000300

#define H3_TS_GPIO	48

static const unsigned int h3_keymap[] = {
	KEY(0, 0, KEY_LEFT),
	KEY(1, 0, KEY_RIGHT),
	KEY(2, 0, KEY_3),
	KEY(3, 0, KEY_F10),
	KEY(4, 0, KEY_F5),
	KEY(5, 0, KEY_9),
	KEY(0, 1, KEY_DOWN),
	KEY(1, 1, KEY_UP),
	KEY(2, 1, KEY_2),
	KEY(3, 1, KEY_F9),
	KEY(4, 1, KEY_F7),
	KEY(5, 1, KEY_0),
	KEY(0, 2, KEY_ENTER),
	KEY(1, 2, KEY_6),
	KEY(2, 2, KEY_1),
	KEY(3, 2, KEY_F2),
	KEY(4, 2, KEY_F6),
	KEY(5, 2, KEY_HOME),
	KEY(0, 3, KEY_8),
	KEY(1, 3, KEY_5),
	KEY(2, 3, KEY_F12),
	KEY(3, 3, KEY_F3),
	KEY(4, 3, KEY_F8),
	KEY(5, 3, KEY_END),
	KEY(0, 4, KEY_7),
	KEY(1, 4, KEY_4),
	KEY(2, 4, KEY_F11),
	KEY(3, 4, KEY_F1),
	KEY(4, 4, KEY_F4),
	KEY(5, 4, KEY_ESC),
	KEY(0, 5, KEY_F13),
	KEY(1, 5, KEY_F14),
	KEY(2, 5, KEY_F15),
	KEY(3, 5, KEY_F16),
	KEY(4, 5, KEY_SLEEP),
};


static struct mtd_partition nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
	      .name		= "bootloader",
	      .offset		= 0,
	      .size		= SZ_128K,
	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
	      .name		= "params",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_128K,
	      .mask_flags	= 0,
	},
	/* kernel */
	{
	      .name		= "kernel",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_2M,
	      .mask_flags	= 0
	},
	/* file system */
	{
	      .name		= "filesystem",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= MTDPART_SIZ_FULL,
	      .mask_flags	= 0
	}
};

static struct physmap_flash_data nor_data = {
	.width		= 2,
	.set_vpp	= omap1_set_vpp,
	.parts		= nor_partitions,
	.nr_parts	= ARRAY_SIZE(nor_partitions),
};

static struct resource nor_resource = {
	/* This is on CS3, wherever it's mapped */
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nor_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev		= {
		.platform_data	= &nor_data,
	},
	.num_resources	= 1,
	.resource	= &nor_resource,
};

static struct mtd_partition nand_partitions[] = {
#if 0
	/* REVISIT: enable these partitions if you make NAND BOOT work */
	{
		.name		= "xloader",
		.offset		= 0,
		.size		= 64 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "bootloader",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 256 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 192 * 1024,
	},
	{
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 2 * SZ_1M,
	},
#endif
	{
		.name		= "filesystem",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,
	},
};

#define H3_NAND_RB_GPIO_PIN	10

static int nand_dev_ready(struct mtd_info *mtd)
{
	return gpio_get_value(H3_NAND_RB_GPIO_PIN);
}

static struct platform_nand_data nand_platdata = {
	.chip	= {
		.nr_chips		= 1,
		.chip_offset		= 0,
		.nr_partitions		= ARRAY_SIZE(nand_partitions),
		.partitions		= nand_partitions,
		.options		= NAND_SAMSUNG_LP_OPTIONS,
	},
	.ctrl	= {
		.cmd_ctrl	= omap1_nand_cmd_ctl,
		.dev_ready	= nand_dev_ready,

	},
};

static struct resource nand_resource = {
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nand_device = {
	.name		= "gen_nand",
	.id		= 0,
	.dev		= {
		.platform_data	= &nand_platdata,
	},
	.num_resources	= 1,
	.resource	= &nand_resource,
};

static struct smc91x_platdata smc91x_info = {
	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda	= RPC_LED_100_10,
	.ledb	= RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= OMAP1710_ETHR_START,		/* Physical */
		.end	= OMAP1710_ETHR_START + 0xf,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
	},
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

static void __init h3_init_smc91x(void)
{
	omap_cfg_reg(W15_1710_GPIO40);
	if (gpio_request(40, "SMC91x irq") < 0) {
		printk("Error requesting gpio 40 for smc91x irq\n");
		return;
	}
}

#define GPTIMER_BASE		0xFFFB1400
#define GPTIMER_REGS(x)	(0xFFFB1400 + (x * 0x800))
#define GPTIMER_REGS_SIZE	0x46

static struct resource intlat_resources[] = {
	[0] = {
		.start  = GPTIMER_REGS(0),	      /* Physical */
		.end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = INT_1610_GPTIMER1,
		.end    = INT_1610_GPTIMER1,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device intlat_device = {
	.name	   = "omap_intlat",
	.id	     = 0,
	.num_resources  = ARRAY_SIZE(intlat_resources),
	.resource       = intlat_resources,
};

static struct resource h3_kp_resources[] = {
	[0] = {
		.start	= INT_KEYBOARD,
		.end	= INT_KEYBOARD,
		.flags	= IORESOURCE_IRQ,
	},
};

static const struct matrix_keymap_data h3_keymap_data = {
	.keymap		= h3_keymap,
	.keymap_size	= ARRAY_SIZE(h3_keymap),
};

static struct omap_kp_platform_data h3_kp_data = {
	.rows		= 8,
	.cols		= 8,
	.keymap_data	= &h3_keymap_data,
	.rep		= true,
	.delay		= 9,
	.dbounce	= true,
};

static struct platform_device h3_kp_device = {
	.name		= "omap-keypad",
	.id		= -1,
	.dev		= {
		.platform_data = &h3_kp_data,
	},
	.num_resources	= ARRAY_SIZE(h3_kp_resources),
	.resource	= h3_kp_resources,
};

static struct platform_device h3_lcd_device = {
	.name		= "lcd_h3",
	.id		= -1,
};

static struct spi_board_info h3_spi_board_info[] __initdata = {
	[0] = {
		.modalias	= "tsc2101",
		.bus_num	= 2,
		.chip_select	= 0,
		.max_speed_hz	= 16000000,
		/* .platform_data	= &tsc_platform_data, */
	},
};

static struct platform_device *devices[] __initdata = {
	&nor_device,
	&nand_device,
        &smc91x_device,
	&intlat_device,
	&h3_kp_device,
	&h3_lcd_device,
};

static struct omap_usb_config h3_usb_config __initdata = {
	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	.otg	    = 2,

#ifdef CONFIG_USB_GADGET_OMAP
	.hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
#elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	.hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
#endif

	.pins[1]	= 3,
};

static struct omap_lcd_config h3_lcd_config __initdata = {
	.ctrl_name	= "internal",
};

static struct i2c_board_info __initdata h3_i2c_board_info[] = {
       {
		I2C_BOARD_INFO("tps65013", 0x48),
       },
	{
		I2C_BOARD_INFO("isp1301_omap", 0x2d),
	},
};

static void __init h3_init(void)
{
	h3_init_smc91x();

	/* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
	 * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
	 * notice whether a NAND chip is enabled at probe time.
	 *
	 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	 * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
	 * to avoid probing every possible flash configuration...
	 */
	nor_resource.end = nor_resource.start = omap_cs3_phys();
	nor_resource.end += SZ_32M - 1;

	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	nand_resource.end += SZ_4K - 1;
	if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
		BUG();
	gpio_direction_input(H3_NAND_RB_GPIO_PIN);

	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	omap_cfg_reg(V2_1710_GPIO10);

	/* Mux pins for keypad */
	omap_cfg_reg(F18_1610_KBC0);
	omap_cfg_reg(D20_1610_KBC1);
	omap_cfg_reg(D19_1610_KBC2);
	omap_cfg_reg(E18_1610_KBC3);
	omap_cfg_reg(C21_1610_KBC4);
	omap_cfg_reg(G18_1610_KBR0);
	omap_cfg_reg(F19_1610_KBR1);
	omap_cfg_reg(H14_1610_KBR2);
	omap_cfg_reg(E20_1610_KBR3);
	omap_cfg_reg(E19_1610_KBR4);
	omap_cfg_reg(N19_1610_KBR5);

	smc91x_resources[1].start = gpio_to_irq(40);
	smc91x_resources[1].end = gpio_to_irq(40);
	platform_add_devices(devices, ARRAY_SIZE(devices));
	h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO);
	spi_register_board_info(h3_spi_board_info,
				ARRAY_SIZE(h3_spi_board_info));
	omap_serial_init();
	h3_i2c_board_info[1].irq = gpio_to_irq(14);
	omap_register_i2c_bus(1, 100, h3_i2c_board_info,
			      ARRAY_SIZE(h3_i2c_board_info));
	omap1_usb_init(&h3_usb_config);
	h3_mmc_init();

	omapfb_set_lcd_config(&h3_lcd_config);
}

MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
	/* Maintainer: Texas Instruments, Inc. */
	.atag_offset	= 0x100,
	.map_io		= omap16xx_map_io,
	.init_early     = omap1_init_early,
	.reserve	= omap_reserve,
	.init_irq	= omap1_init_irq,
	.init_machine	= h3_init,
	.init_late	= omap1_init_late,
	.timer		= &omap1_timer,
	.restart	= omap1_restart,
MACHINE_END
Commit	Line	Data
1da177e4	1	/*
dbdf9ced	2	* linux/arch/arm/mach-omap1/board-h3.c
1da177e4 LT	3	*
	4	* This file contains OMAP1710 H3 specific code.
	5	*
	6	* Copyright (C) 2004 Texas Instruments, Inc.
	7	* Copyright (C) 2002 MontaVista Software, Inc.
	8	* Copyright (C) 2001 RidgeRun, Inc.
	9	* Author: RidgeRun, Inc.
	10	* Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License version 2 as
	14	* published by the Free Software Foundation.
	15	*/
2f8163ba	16	#include <linux/gpio.h>
1da177e4 LT	17	#include <linux/types.h>
	18	#include <linux/init.h>
	19	#include <linux/major.h>
	20	#include <linux/kernel.h>
d052d1be	21	#include <linux/platform_device.h>
1da177e4	22	#include <linux/errno.h>
9b6553cd	23	#include <linux/workqueue.h>
8056c6cb	24	#include <linux/i2c.h>
1da177e4	25	#include <linux/mtd/mtd.h>
9b6553cd	26	#include <linux/mtd/nand.h>
1da177e4	27	#include <linux/mtd/partitions.h>
561b036a	28	#include <linux/mtd/physmap.h>
9b6553cd	29	#include <linux/input.h>
0cc0a441	30	#include <linux/spi/spi.h>
6d16bfb5	31	#include <linux/i2c/tps65010.h>
3bc48014	32	#include <linux/smc91x.h>
ddba6c7f	33	#include <linux/omapfb.h>
de6ca33a	34	#include <linux/platform_data/gpio-omap.h>
1da177e4 LT	35
	36	#include <asm/setup.h>
	37	#include <asm/page.h>
1da177e4 LT	38	#include <asm/mach-types.h>
1da177e4 LT	39	#include <asm/mach/arch.h>
1da177e4 LT	40	#include <asm/mach/map.h>
1da177e4 LT	41
ce491cf8 TL	42	#include <plat/mux.h>
ce491cf8 TL	43	#include <plat/tc.h>
ce491cf8 TL	44	#include <plat/keypad.h>
ce491cf8 TL	45	#include <plat/dma.h>
561b036a	46	#include <plat/flash.h>
1da177e4	47
2e3ee9f4 TL	48	#include <mach/hardware.h>
2e3ee9f4 TL	49	#include <mach/irqs.h>
b924b204	50	#include <mach/usb.h>
2e3ee9f4 TL	51
2e3ee9f4 TL	52	#include "common.h"
228fe42e TL	53	#include "board-h3.h"
	54
	55	/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
	56	#define OMAP1710_ETHR_START 0x04000300
	57
0cc0a441 DB	58	#define H3_TS_GPIO 48
0cc0a441 DB	59
da1f026b	60	static const unsigned int h3_keymap[] = {
9b6553cd	61	KEY(0, 0, KEY_LEFT),
da1f026b JK	62	KEY(1, 0, KEY_RIGHT),
	63	KEY(2, 0, KEY_3),
	64	KEY(3, 0, KEY_F10),
	65	KEY(4, 0, KEY_F5),
	66	KEY(5, 0, KEY_9),
	67	KEY(0, 1, KEY_DOWN),
9b6553cd	68	KEY(1, 1, KEY_UP),
da1f026b JK	69	KEY(2, 1, KEY_2),
	70	KEY(3, 1, KEY_F9),
	71	KEY(4, 1, KEY_F7),
	72	KEY(5, 1, KEY_0),
	73	KEY(0, 2, KEY_ENTER),
	74	KEY(1, 2, KEY_6),
9b6553cd	75	KEY(2, 2, KEY_1),
da1f026b JK	76	KEY(3, 2, KEY_F2),
	77	KEY(4, 2, KEY_F6),
	78	KEY(5, 2, KEY_HOME),
	79	KEY(0, 3, KEY_8),
	80	KEY(1, 3, KEY_5),
	81	KEY(2, 3, KEY_F12),
9b6553cd	82	KEY(3, 3, KEY_F3),
da1f026b JK	83	KEY(4, 3, KEY_F8),
	84	KEY(5, 3, KEY_END),
	85	KEY(0, 4, KEY_7),
	86	KEY(1, 4, KEY_4),
	87	KEY(2, 4, KEY_F11),
	88	KEY(3, 4, KEY_F1),
9b6553cd	89	KEY(4, 4, KEY_F4),
da1f026b JK	90	KEY(5, 4, KEY_ESC),
	91	KEY(0, 5, KEY_F13),
	92	KEY(1, 5, KEY_F14),
	93	KEY(2, 5, KEY_F15),
	94	KEY(3, 5, KEY_F16),
	95	KEY(4, 5, KEY_SLEEP),
9b6553cd TL	96	};
	97
	98
	99	static struct mtd_partition nor_partitions[] = {
1da177e4 LT	100	/* bootloader (U-Boot, etc) in first sector */
	101	{
	102	.name = "bootloader",
	103	.offset = 0,
	104	.size = SZ_128K,
	105	.mask_flags = MTD_WRITEABLE, /* force read-only */
	106	},
	107	/* bootloader params in the next sector */
	108	{
	109	.name = "params",
	110	.offset = MTDPART_OFS_APPEND,
	111	.size = SZ_128K,
	112	.mask_flags = 0,
	113	},
	114	/* kernel */
	115	{
	116	.name = "kernel",
	117	.offset = MTDPART_OFS_APPEND,
	118	.size = SZ_2M,
	119	.mask_flags = 0
	120	},
	121	/* file system */
	122	{
	123	.name = "filesystem",
	124	.offset = MTDPART_OFS_APPEND,
	125	.size = MTDPART_SIZ_FULL,
	126	.mask_flags = 0
	127	}
	128	};
	129
561b036a	130	static struct physmap_flash_data nor_data = {
1da177e4	131	.width = 2,
561b036a	132	.set_vpp = omap1_set_vpp,
9b6553cd TL	133	.parts = nor_partitions,
9b6553cd TL	134	.nr_parts = ARRAY_SIZE(nor_partitions),
1da177e4 LT	135	};
1da177e4 LT	136
9b6553cd	137	static struct resource nor_resource = {
7c38cf02	138	/* This is on CS3, wherever it's mapped */
1da177e4 LT	139	.flags = IORESOURCE_MEM,
	140	};
	141
9b6553cd	142	static struct platform_device nor_device = {
561b036a	143	.name = "physmap-flash",
1da177e4 LT	144	.id = 0,
1da177e4 LT	145	.dev = {
9b6553cd TL	146	.platform_data = &nor_data,
	147	},
	148	.num_resources = 1,
	149	.resource = &nor_resource,
	150	};
	151
	152	static struct mtd_partition nand_partitions[] = {
	153	#if 0
	154	/* REVISIT: enable these partitions if you make NAND BOOT work */
	155	{
	156	.name = "xloader",
	157	.offset = 0,
	158	.size = 64 * 1024,
	159	.mask_flags = MTD_WRITEABLE, /* force read-only */
	160	},
	161	{
	162	.name = "bootloader",
	163	.offset = MTDPART_OFS_APPEND,
	164	.size = 256 * 1024,
	165	.mask_flags = MTD_WRITEABLE, /* force read-only */
	166	},
	167	{
	168	.name = "params",
	169	.offset = MTDPART_OFS_APPEND,
	170	.size = 192 * 1024,
	171	},
	172	{
	173	.name = "kernel",
	174	.offset = MTDPART_OFS_APPEND,
	175	.size = 2 * SZ_1M,
	176	},
	177	#endif
	178	{
	179	.name = "filesystem",
	180	.size = MTDPART_SIZ_FULL,
	181	.offset = MTDPART_OFS_APPEND,
	182	},
	183	};
	184
414f552a LM	185	#define H3_NAND_RB_GPIO_PIN 10
	186
	187	static int nand_dev_ready(struct mtd_info *mtd)
	188	{
	189	return gpio_get_value(H3_NAND_RB_GPIO_PIN);
	190	}
	191
277a2856	192	static struct platform_nand_data nand_platdata = {
414f552a LM	193	.chip = {
	194	.nr_chips = 1,
	195	.chip_offset = 0,
	196	.nr_partitions = ARRAY_SIZE(nand_partitions),
	197	.partitions = nand_partitions,
	198	.options = NAND_SAMSUNG_LP_OPTIONS,
414f552a LM	199	},
414f552a LM	200	.ctrl = {
31cde044	201	.cmd_ctrl = omap1_nand_cmd_ctl,
414f552a LM	202	.dev_ready = nand_dev_ready,
	203
	204	},
9b6553cd TL	205	};
	206
	207	static struct resource nand_resource = {
	208	.flags = IORESOURCE_MEM,
	209	};
	210
	211	static struct platform_device nand_device = {
414f552a	212	.name = "gen_nand",
9b6553cd TL	213	.id = 0,
9b6553cd TL	214	.dev = {
414f552a	215	.platform_data = &nand_platdata,
1da177e4 LT	216	},
1da177e4 LT	217	.num_resources = 1,
9b6553cd	218	.resource = &nand_resource,
1da177e4 LT	219	};
1da177e4 LT	220
3bc48014 LM	221	static struct smc91x_platdata smc91x_info = {
	222	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	223	.leda = RPC_LED_100_10,
	224	.ledb = RPC_LED_TX_RX,
	225	};
	226
1da177e4 LT	227	static struct resource smc91x_resources[] = {
	228	[0] = {
	229	.start = OMAP1710_ETHR_START, /* Physical */
	230	.end = OMAP1710_ETHR_START + 0xf,
	231	.flags = IORESOURCE_MEM,
	232	},
	233	[1] = {
e7b3dc7e	234	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWEDGE,
1da177e4 LT	235	},
	236	};
	237
	238	static struct platform_device smc91x_device = {
	239	.name = "smc91x",
	240	.id = 0,
3bc48014 LM	241	.dev = {
	242	.platform_data = &smc91x_info,
	243	},
1da177e4 LT	244	.num_resources = ARRAY_SIZE(smc91x_resources),
	245	.resource = smc91x_resources,
	246	};
	247
c2cdaffe TL	248	static void __init h3_init_smc91x(void)
	249	{
	250	omap_cfg_reg(W15_1710_GPIO40);
	251	if (gpio_request(40, "SMC91x irq") < 0) {
	252	printk("Error requesting gpio 40 for smc91x irq\n");
	253	return;
	254	}
	255	}
	256
1da177e4 LT	257	#define GPTIMER_BASE 0xFFFB1400
	258	#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
	259	#define GPTIMER_REGS_SIZE 0x46
	260
	261	static struct resource intlat_resources[] = {
	262	[0] = {
	263	.start = GPTIMER_REGS(0), /* Physical */
	264	.end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
	265	.flags = IORESOURCE_MEM,
	266	},
	267	[1] = {
	268	.start = INT_1610_GPTIMER1,
	269	.end = INT_1610_GPTIMER1,
	270	.flags = IORESOURCE_IRQ,
	271	},
	272	};
	273
	274	static struct platform_device intlat_device = {
	275	.name = "omap_intlat",
	276	.id = 0,
	277	.num_resources = ARRAY_SIZE(intlat_resources),
	278	.resource = intlat_resources,
	279	};
	280
9b6553cd TL	281	static struct resource h3_kp_resources[] = {
	282	[0] = {
	283	.start = INT_KEYBOARD,
	284	.end = INT_KEYBOARD,
	285	.flags = IORESOURCE_IRQ,
	286	},
	287	};
	288
da1f026b JK	289	static const struct matrix_keymap_data h3_keymap_data = {
	290	.keymap = h3_keymap,
	291	.keymap_size = ARRAY_SIZE(h3_keymap),
	292	};
	293
9b6553cd	294	static struct omap_kp_platform_data h3_kp_data = {
4d24607b KS	295	.rows = 8,
4d24607b KS	296	.cols = 8,
da1f026b JK	297	.keymap_data = &h3_keymap_data,
da1f026b JK	298	.rep = true,
4d24607b	299	.delay = 9,
da1f026b	300	.dbounce = true,
9b6553cd TL	301	};
	302
	303	static struct platform_device h3_kp_device = {
	304	.name = "omap-keypad",
	305	.id = -1,
	306	.dev = {
	307	.platform_data = &h3_kp_data,
	308	},
	309	.num_resources = ARRAY_SIZE(h3_kp_resources),
	310	.resource = h3_kp_resources,
	311	};
	312
9b6553cd TL	313	static struct platform_device h3_lcd_device = {
	314	.name = "lcd_h3",
	315	.id = -1,
	316	};
	317
0cc0a441 DB	318	static struct spi_board_info h3_spi_board_info[] __initdata = {
	319	[0] = {
	320	.modalias = "tsc2101",
	321	.bus_num = 2,
	322	.chip_select = 0,
0cc0a441 DB	323	.max_speed_hz = 16000000,
	324	/* .platform_data = &tsc_platform_data, */
	325	},
	326	};
	327
1da177e4	328	static struct platform_device *devices[] __initdata = {
9b6553cd TL	329	&nor_device,
9b6553cd TL	330	&nand_device,
1da177e4 LT	331	&smc91x_device,
1da177e4 LT	332	&intlat_device,
9b6553cd TL	333	&h3_kp_device,
9b6553cd TL	334	&h3_lcd_device,
1da177e4 LT	335	};
	336
	337	static struct omap_usb_config h3_usb_config __initdata = {
	338	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	339	.otg = 2,
	340
	341	#ifdef CONFIG_USB_GADGET_OMAP
	342	.hmc_mode = 19, /* 0:host(off) 1:dev\|otg 2:disabled */
	343	#elif defined(CONFIG_USB_OHCI_HCD) \|\| defined(CONFIG_USB_OHCI_HCD_MODULE)
	344	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	345	.hmc_mode = 20, /* 1:dev\|otg(off) 1:host 2:disabled */
	346	#endif
	347
	348	.pins[1] = 3,
	349	};
	350
3179a019	351	static struct omap_lcd_config h3_lcd_config __initdata = {
3179a019 TL	352	.ctrl_name = "internal",
	353	};
	354
0cc0a441 DB	355	static struct i2c_board_info __initdata h3_i2c_board_info[] = {
0cc0a441 DB	356	{
3760f736	357	I2C_BOARD_INFO("tps65013", 0x48),
0cc0a441	358	},
9df013b3 JD	359	{
9df013b3 JD	360	I2C_BOARD_INFO("isp1301_omap", 0x2d),
9df013b3	361	},
0cc0a441 DB	362	};
0cc0a441 DB	363
1da177e4 LT	364	static void __init h3_init(void)
1da177e4 LT	365	{
c2cdaffe TL	366	h3_init_smc91x();
c2cdaffe TL	367
9b6553cd TL	368	/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
	369	* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
	370	* notice whether a NAND chip is enabled at probe time.
	371	*
	372	* H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	373	* (which on H2 may be 16bit) on CS3. Try detecting that in code here,
	374	* to avoid probing every possible flash configuration...
	375	*/
	376	nor_resource.end = nor_resource.start = omap_cs3_phys();
	377	nor_resource.end += SZ_32M - 1;
	378
	379	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	380	nand_resource.end += SZ_4K - 1;
f2d18fea JN	381	if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
f2d18fea JN	382	BUG();
414f552a	383	gpio_direction_input(H3_NAND_RB_GPIO_PIN);
9b6553cd TL	384
	385	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	386	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	387	omap_cfg_reg(V2_1710_GPIO10);
	388
93c43f25 TL	389	/* Mux pins for keypad */
	390	omap_cfg_reg(F18_1610_KBC0);
	391	omap_cfg_reg(D20_1610_KBC1);
	392	omap_cfg_reg(D19_1610_KBC2);
	393	omap_cfg_reg(E18_1610_KBC3);
	394	omap_cfg_reg(C21_1610_KBC4);
	395	omap_cfg_reg(G18_1610_KBR0);
	396	omap_cfg_reg(F19_1610_KBR1);
	397	omap_cfg_reg(H14_1610_KBR2);
	398	omap_cfg_reg(E20_1610_KBR3);
	399	omap_cfg_reg(E19_1610_KBR4);
	400	omap_cfg_reg(N19_1610_KBR5);
	401
46a0a540 TKD	402	smc91x_resources[1].start = gpio_to_irq(40);
46a0a540 TKD	403	smc91x_resources[1].end = gpio_to_irq(40);
9b6553cd	404	platform_add_devices(devices, ARRAY_SIZE(devices));
46a0a540	405	h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO);
e27a93a9 TL	406	spi_register_board_info(h3_spi_board_info,
e27a93a9 TL	407	ARRAY_SIZE(h3_spi_board_info));
3179a019	408	omap_serial_init();
46a0a540	409	h3_i2c_board_info[1].irq = gpio_to_irq(14);
1ed16a86 JN	410	omap_register_i2c_bus(1, 100, h3_i2c_board_info,
1ed16a86 JN	411	ARRAY_SIZE(h3_i2c_board_info));
dd0cdd88	412	omap1_usb_init(&h3_usb_config);
138ab9f8	413	h3_mmc_init();
ddba6c7f TV	414
ddba6c7f TV	415	omapfb_set_lcd_config(&h3_lcd_config);
1da177e4 LT	416	}
1da177e4 LT	417
1da177e4	418	MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
e9dea0c6	419	/* Maintainer: Texas Instruments, Inc. */
246e389d	420	.atag_offset = 0x100,
7b88e62f TL	421	.map_io = omap16xx_map_io,
7b88e62f TL	422	.init_early = omap1_init_early,
71ee7dad	423	.reserve = omap_reserve,
7b88e62f	424	.init_irq = omap1_init_irq,
e9dea0c6	425	.init_machine = h3_init,
82c3bd03	426	.init_late = omap1_init_late,
e74984e4	427	.timer = &omap1_timer,
baa95883	428	.restart = omap1_restart,
1da177e4	429	MACHINE_END