[deliverable/linux.git] / arch / arm / mach-omap1 / board-h3.c

/*
 * linux/arch/arm/mach-omap1/board-h3.c
 *
 * This file contains OMAP1710 H3 specific code.
 *
 * Copyright (C) 2004 Texas Instruments, Inc.
 * Copyright (C) 2002 MontaVista Software, Inc.
 * Copyright (C) 2001 RidgeRun, Inc.
 * Author: RidgeRun, Inc.
 *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/types.h>
#include <linux/init.h>
#include <linux/major.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/workqueue.h>
#include <linux/i2c.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/i2c/tps65010.h>
#include <linux/smc91x.h>

#include <asm/setup.h>
#include <asm/page.h>
#include <mach/hardware.h>
#include <asm/gpio.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>

#include <mach/irqs.h>
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/nand.h>
#include <plat/usb.h>
#include <plat/keypad.h>
#include <plat/dma.h>
#include <plat/common.h>

#include "board-h3.h"

/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
#define OMAP1710_ETHR_START		0x04000300

#define H3_TS_GPIO	48

static int h3_keymap[] = {
	KEY(0, 0, KEY_LEFT),
	KEY(0, 1, KEY_RIGHT),
	KEY(0, 2, KEY_3),
	KEY(0, 3, KEY_F10),
	KEY(0, 4, KEY_F5),
	KEY(0, 5, KEY_9),
	KEY(1, 0, KEY_DOWN),
	KEY(1, 1, KEY_UP),
	KEY(1, 2, KEY_2),
	KEY(1, 3, KEY_F9),
	KEY(1, 4, KEY_F7),
	KEY(1, 5, KEY_0),
	KEY(2, 0, KEY_ENTER),
	KEY(2, 1, KEY_6),
	KEY(2, 2, KEY_1),
	KEY(2, 3, KEY_F2),
	KEY(2, 4, KEY_F6),
	KEY(2, 5, KEY_HOME),
	KEY(3, 0, KEY_8),
	KEY(3, 1, KEY_5),
	KEY(3, 2, KEY_F12),
	KEY(3, 3, KEY_F3),
	KEY(3, 4, KEY_F8),
	KEY(3, 5, KEY_END),
	KEY(4, 0, KEY_7),
	KEY(4, 1, KEY_4),
	KEY(4, 2, KEY_F11),
	KEY(4, 3, KEY_F1),
	KEY(4, 4, KEY_F4),
	KEY(4, 5, KEY_ESC),
	KEY(5, 0, KEY_F13),
	KEY(5, 1, KEY_F14),
	KEY(5, 2, KEY_F15),
	KEY(5, 3, KEY_F16),
	KEY(5, 4, KEY_SLEEP),
	0
};


static struct mtd_partition nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
	      .name		= "bootloader",
	      .offset		= 0,
	      .size		= SZ_128K,
	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
	      .name		= "params",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_128K,
	      .mask_flags	= 0,
	},
	/* kernel */
	{
	      .name		= "kernel",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_2M,
	      .mask_flags	= 0
	},
	/* file system */
	{
	      .name		= "filesystem",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= MTDPART_SIZ_FULL,
	      .mask_flags	= 0
	}
};

static struct flash_platform_data nor_data = {
	.map_name	= "cfi_probe",
	.width		= 2,
	.parts		= nor_partitions,
	.nr_parts	= ARRAY_SIZE(nor_partitions),
};

static struct resource nor_resource = {
	/* This is on CS3, wherever it's mapped */
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nor_device = {
	.name		= "omapflash",
	.id		= 0,
	.dev		= {
		.platform_data	= &nor_data,
	},
	.num_resources	= 1,
	.resource	= &nor_resource,
};

static struct mtd_partition nand_partitions[] = {
#if 0
	/* REVISIT: enable these partitions if you make NAND BOOT work */
	{
		.name		= "xloader",
		.offset		= 0,
		.size		= 64 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "bootloader",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 256 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 192 * 1024,
	},
	{
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 2 * SZ_1M,
	},
#endif
	{
		.name		= "filesystem",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,
	},
};

/* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
static struct omap_nand_platform_data nand_data = {
	.options	= NAND_SAMSUNG_LP_OPTIONS,
	.parts		= nand_partitions,
	.nr_parts	= ARRAY_SIZE(nand_partitions),
};

static struct resource nand_resource = {
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nand_device = {
	.name		= "omapnand",
	.id		= 0,
	.dev		= {
		.platform_data	= &nand_data,
	},
	.num_resources	= 1,
	.resource	= &nand_resource,
};

static struct smc91x_platdata smc91x_info = {
	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda	= RPC_LED_100_10,
	.ledb	= RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= OMAP1710_ETHR_START,		/* Physical */
		.end	= OMAP1710_ETHR_START + 0xf,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= OMAP_GPIO_IRQ(40),
		.end	= OMAP_GPIO_IRQ(40),
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
	},
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

#define GPTIMER_BASE		0xFFFB1400
#define GPTIMER_REGS(x)	(0xFFFB1400 + (x * 0x800))
#define GPTIMER_REGS_SIZE	0x46

static struct resource intlat_resources[] = {
	[0] = {
		.start  = GPTIMER_REGS(0),	      /* Physical */
		.end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = INT_1610_GPTIMER1,
		.end    = INT_1610_GPTIMER1,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device intlat_device = {
	.name	   = "omap_intlat",
	.id	     = 0,
	.num_resources  = ARRAY_SIZE(intlat_resources),
	.resource       = intlat_resources,
};

static struct resource h3_kp_resources[] = {
	[0] = {
		.start	= INT_KEYBOARD,
		.end	= INT_KEYBOARD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct omap_kp_platform_data h3_kp_data = {
	.rows		= 8,
	.cols		= 8,
	.keymap		= h3_keymap,
	.keymapsize	= ARRAY_SIZE(h3_keymap),
	.rep		= 1,
	.delay		= 9,
	.dbounce	= 1,
};

static struct platform_device h3_kp_device = {
	.name		= "omap-keypad",
	.id		= -1,
	.dev		= {
		.platform_data = &h3_kp_data,
	},
	.num_resources	= ARRAY_SIZE(h3_kp_resources),
	.resource	= h3_kp_resources,
};

static struct platform_device h3_lcd_device = {
	.name		= "lcd_h3",
	.id		= -1,
};

static struct spi_board_info h3_spi_board_info[] __initdata = {
	[0] = {
		.modalias	= "tsc2101",
		.bus_num	= 2,
		.chip_select	= 0,
		.irq		= OMAP_GPIO_IRQ(H3_TS_GPIO),
		.max_speed_hz	= 16000000,
		/* .platform_data	= &tsc_platform_data, */
	},
};

static struct platform_device *devices[] __initdata = {
	&nor_device,
	&nand_device,
        &smc91x_device,
	&intlat_device,
	&h3_kp_device,
	&h3_lcd_device,
};

static struct omap_usb_config h3_usb_config __initdata = {
	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	.otg	    = 2,

#ifdef CONFIG_USB_GADGET_OMAP
	.hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
#elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	.hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
#endif

	.pins[1]	= 3,
};

static struct omap_lcd_config h3_lcd_config __initdata = {
	.ctrl_name	= "internal",
};

static struct omap_board_config_kernel h3_config[] __initdata = {
	{ OMAP_TAG_LCD,		&h3_lcd_config },
};

static struct i2c_board_info __initdata h3_i2c_board_info[] = {
       {
		I2C_BOARD_INFO("tps65013", 0x48),
               /* .irq         = OMAP_GPIO_IRQ(??), */
       },
	{
		I2C_BOARD_INFO("isp1301_omap", 0x2d),
		.irq		= OMAP_GPIO_IRQ(14),
	},
};

#define H3_NAND_RB_GPIO_PIN	10

static int nand_dev_ready(struct omap_nand_platform_data *data)
{
	return gpio_get_value(H3_NAND_RB_GPIO_PIN);
}

static void __init h3_init(void)
{
	/* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
	 * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
	 * notice whether a NAND chip is enabled at probe time.
	 *
	 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	 * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
	 * to avoid probing every possible flash configuration...
	 */
	nor_resource.end = nor_resource.start = omap_cs3_phys();
	nor_resource.end += SZ_32M - 1;

	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	nand_resource.end += SZ_4K - 1;
	if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
		BUG();
	nand_data.dev_ready = nand_dev_ready;

	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	omap_cfg_reg(V2_1710_GPIO10);

	platform_add_devices(devices, ARRAY_SIZE(devices));
	spi_register_board_info(h3_spi_board_info,
				ARRAY_SIZE(h3_spi_board_info));
	omap_board_config = h3_config;
	omap_board_config_size = ARRAY_SIZE(h3_config);
	omap_serial_init();
	omap_register_i2c_bus(1, 100, h3_i2c_board_info,
			      ARRAY_SIZE(h3_i2c_board_info));
	omap_usb_init(&h3_usb_config);
	h3_mmc_init();
}

static void __init h3_init_smc91x(void)
{
	omap_cfg_reg(W15_1710_GPIO40);
	if (gpio_request(40, "SMC91x irq") < 0) {
		printk("Error requesting gpio 40 for smc91x irq\n");
		return;
	}
}

static void __init h3_init_irq(void)
{
	omap1_init_common_hw();
	omap_init_irq();
	omap_gpio_init();
	h3_init_smc91x();
}

static void __init h3_map_io(void)
{
	omap1_map_common_io();
}

MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
	/* Maintainer: Texas Instruments, Inc. */
	.phys_io	= 0xfff00000,
	.io_pg_offst	= ((0xfef00000) >> 18) & 0xfffc,
	.boot_params	= 0x10000100,
	.map_io		= h3_map_io,
	.init_irq	= h3_init_irq,
	.init_machine	= h3_init,
	.timer		= &omap_timer,
MACHINE_END
Commit	Line	Data
1da177e4	1	/*
dbdf9ced	2	* linux/arch/arm/mach-omap1/board-h3.c
1da177e4 LT	3	*
	4	* This file contains OMAP1710 H3 specific code.
	5	*
	6	* Copyright (C) 2004 Texas Instruments, Inc.
	7	* Copyright (C) 2002 MontaVista Software, Inc.
	8	* Copyright (C) 2001 RidgeRun, Inc.
	9	* Author: RidgeRun, Inc.
	10	* Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License version 2 as
	14	* published by the Free Software Foundation.
	15	*/
	16
1da177e4 LT	17	#include <linux/types.h>
	18	#include <linux/init.h>
	19	#include <linux/major.h>
	20	#include <linux/kernel.h>
d052d1be	21	#include <linux/platform_device.h>
1da177e4	22	#include <linux/errno.h>
9b6553cd	23	#include <linux/workqueue.h>
8056c6cb	24	#include <linux/i2c.h>
1da177e4	25	#include <linux/mtd/mtd.h>
9b6553cd	26	#include <linux/mtd/nand.h>
1da177e4	27	#include <linux/mtd/partitions.h>
9b6553cd	28	#include <linux/input.h>
0cc0a441	29	#include <linux/spi/spi.h>
6d16bfb5	30	#include <linux/i2c/tps65010.h>
3bc48014	31	#include <linux/smc91x.h>
1da177e4 LT	32
	33	#include <asm/setup.h>
	34	#include <asm/page.h>
a09e64fb	35	#include <mach/hardware.h>
8056c6cb DB	36	#include <asm/gpio.h>
8056c6cb DB	37
1da177e4 LT	38	#include <asm/mach-types.h>
	39	#include <asm/mach/arch.h>
	40	#include <asm/mach/flash.h>
	41	#include <asm/mach/map.h>
	42
a09e64fb	43	#include <mach/irqs.h>
ce491cf8 TL	44	#include <plat/mux.h>
	45	#include <plat/tc.h>
	46	#include <plat/nand.h>
	47	#include <plat/usb.h>
	48	#include <plat/keypad.h>
	49	#include <plat/dma.h>
	50	#include <plat/common.h>
1da177e4	51
228fe42e TL	52	#include "board-h3.h"
	53
	54	/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
	55	#define OMAP1710_ETHR_START 0x04000300
	56
0cc0a441 DB	57	#define H3_TS_GPIO 48
0cc0a441 DB	58
9b6553cd TL	59	static int h3_keymap[] = {
	60	KEY(0, 0, KEY_LEFT),
	61	KEY(0, 1, KEY_RIGHT),
	62	KEY(0, 2, KEY_3),
	63	KEY(0, 3, KEY_F10),
	64	KEY(0, 4, KEY_F5),
	65	KEY(0, 5, KEY_9),
	66	KEY(1, 0, KEY_DOWN),
	67	KEY(1, 1, KEY_UP),
	68	KEY(1, 2, KEY_2),
	69	KEY(1, 3, KEY_F9),
	70	KEY(1, 4, KEY_F7),
	71	KEY(1, 5, KEY_0),
	72	KEY(2, 0, KEY_ENTER),
	73	KEY(2, 1, KEY_6),
	74	KEY(2, 2, KEY_1),
	75	KEY(2, 3, KEY_F2),
	76	KEY(2, 4, KEY_F6),
	77	KEY(2, 5, KEY_HOME),
	78	KEY(3, 0, KEY_8),
	79	KEY(3, 1, KEY_5),
	80	KEY(3, 2, KEY_F12),
	81	KEY(3, 3, KEY_F3),
	82	KEY(3, 4, KEY_F8),
	83	KEY(3, 5, KEY_END),
	84	KEY(4, 0, KEY_7),
	85	KEY(4, 1, KEY_4),
	86	KEY(4, 2, KEY_F11),
	87	KEY(4, 3, KEY_F1),
	88	KEY(4, 4, KEY_F4),
	89	KEY(4, 5, KEY_ESC),
	90	KEY(5, 0, KEY_F13),
	91	KEY(5, 1, KEY_F14),
	92	KEY(5, 2, KEY_F15),
	93	KEY(5, 3, KEY_F16),
	94	KEY(5, 4, KEY_SLEEP),
	95	0
	96	};
	97
	98
	99	static struct mtd_partition nor_partitions[] = {
1da177e4 LT	100	/* bootloader (U-Boot, etc) in first sector */
	101	{
	102	.name = "bootloader",
	103	.offset = 0,
	104	.size = SZ_128K,
	105	.mask_flags = MTD_WRITEABLE, /* force read-only */
	106	},
	107	/* bootloader params in the next sector */
	108	{
	109	.name = "params",
	110	.offset = MTDPART_OFS_APPEND,
	111	.size = SZ_128K,
	112	.mask_flags = 0,
	113	},
	114	/* kernel */
	115	{
	116	.name = "kernel",
	117	.offset = MTDPART_OFS_APPEND,
	118	.size = SZ_2M,
	119	.mask_flags = 0
	120	},
	121	/* file system */
	122	{
	123	.name = "filesystem",
	124	.offset = MTDPART_OFS_APPEND,
	125	.size = MTDPART_SIZ_FULL,
	126	.mask_flags = 0
	127	}
	128	};
	129
9b6553cd	130	static struct flash_platform_data nor_data = {
1da177e4 LT	131	.map_name = "cfi_probe",
1da177e4 LT	132	.width = 2,
9b6553cd TL	133	.parts = nor_partitions,
9b6553cd TL	134	.nr_parts = ARRAY_SIZE(nor_partitions),
1da177e4 LT	135	};
1da177e4 LT	136
9b6553cd	137	static struct resource nor_resource = {
7c38cf02	138	/* This is on CS3, wherever it's mapped */
1da177e4 LT	139	.flags = IORESOURCE_MEM,
	140	};
	141
9b6553cd	142	static struct platform_device nor_device = {
1da177e4 LT	143	.name = "omapflash",
	144	.id = 0,
	145	.dev = {
9b6553cd TL	146	.platform_data = &nor_data,
	147	},
	148	.num_resources = 1,
	149	.resource = &nor_resource,
	150	};
	151
	152	static struct mtd_partition nand_partitions[] = {
	153	#if 0
	154	/* REVISIT: enable these partitions if you make NAND BOOT work */
	155	{
	156	.name = "xloader",
	157	.offset = 0,
	158	.size = 64 * 1024,
	159	.mask_flags = MTD_WRITEABLE, /* force read-only */
	160	},
	161	{
	162	.name = "bootloader",
	163	.offset = MTDPART_OFS_APPEND,
	164	.size = 256 * 1024,
	165	.mask_flags = MTD_WRITEABLE, /* force read-only */
	166	},
	167	{
	168	.name = "params",
	169	.offset = MTDPART_OFS_APPEND,
	170	.size = 192 * 1024,
	171	},
	172	{
	173	.name = "kernel",
	174	.offset = MTDPART_OFS_APPEND,
	175	.size = 2 * SZ_1M,
	176	},
	177	#endif
	178	{
	179	.name = "filesystem",
	180	.size = MTDPART_SIZ_FULL,
	181	.offset = MTDPART_OFS_APPEND,
	182	},
	183	};
	184
	185	/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
78be6325	186	static struct omap_nand_platform_data nand_data = {
9b6553cd TL	187	.options = NAND_SAMSUNG_LP_OPTIONS,
	188	.parts = nand_partitions,
	189	.nr_parts = ARRAY_SIZE(nand_partitions),
	190	};
	191
	192	static struct resource nand_resource = {
	193	.flags = IORESOURCE_MEM,
	194	};
	195
	196	static struct platform_device nand_device = {
	197	.name = "omapnand",
	198	.id = 0,
	199	.dev = {
	200	.platform_data = &nand_data,
1da177e4 LT	201	},
1da177e4 LT	202	.num_resources = 1,
9b6553cd	203	.resource = &nand_resource,
1da177e4 LT	204	};
1da177e4 LT	205
3bc48014 LM	206	static struct smc91x_platdata smc91x_info = {
	207	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	208	.leda = RPC_LED_100_10,
	209	.ledb = RPC_LED_TX_RX,
	210	};
	211
1da177e4 LT	212	static struct resource smc91x_resources[] = {
	213	[0] = {
	214	.start = OMAP1710_ETHR_START, /* Physical */
	215	.end = OMAP1710_ETHR_START + 0xf,
	216	.flags = IORESOURCE_MEM,
	217	},
	218	[1] = {
	219	.start = OMAP_GPIO_IRQ(40),
	220	.end = OMAP_GPIO_IRQ(40),
e7b3dc7e	221	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWEDGE,
1da177e4 LT	222	},
	223	};
	224
	225	static struct platform_device smc91x_device = {
	226	.name = "smc91x",
	227	.id = 0,
3bc48014 LM	228	.dev = {
	229	.platform_data = &smc91x_info,
	230	},
1da177e4 LT	231	.num_resources = ARRAY_SIZE(smc91x_resources),
	232	.resource = smc91x_resources,
	233	};
	234
	235	#define GPTIMER_BASE 0xFFFB1400
	236	#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
	237	#define GPTIMER_REGS_SIZE 0x46
	238
	239	static struct resource intlat_resources[] = {
	240	[0] = {
	241	.start = GPTIMER_REGS(0), /* Physical */
	242	.end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
	243	.flags = IORESOURCE_MEM,
	244	},
	245	[1] = {
	246	.start = INT_1610_GPTIMER1,
	247	.end = INT_1610_GPTIMER1,
	248	.flags = IORESOURCE_IRQ,
	249	},
	250	};
	251
	252	static struct platform_device intlat_device = {
	253	.name = "omap_intlat",
	254	.id = 0,
	255	.num_resources = ARRAY_SIZE(intlat_resources),
	256	.resource = intlat_resources,
	257	};
	258
9b6553cd TL	259	static struct resource h3_kp_resources[] = {
	260	[0] = {
	261	.start = INT_KEYBOARD,
	262	.end = INT_KEYBOARD,
	263	.flags = IORESOURCE_IRQ,
	264	},
	265	};
	266
	267	static struct omap_kp_platform_data h3_kp_data = {
4d24607b KS	268	.rows = 8,
	269	.cols = 8,
	270	.keymap = h3_keymap,
	271	.keymapsize = ARRAY_SIZE(h3_keymap),
	272	.rep = 1,
	273	.delay = 9,
	274	.dbounce = 1,
9b6553cd TL	275	};
	276
	277	static struct platform_device h3_kp_device = {
	278	.name = "omap-keypad",
	279	.id = -1,
	280	.dev = {
	281	.platform_data = &h3_kp_data,
	282	},
	283	.num_resources = ARRAY_SIZE(h3_kp_resources),
	284	.resource = h3_kp_resources,
	285	};
	286
9b6553cd TL	287	static struct platform_device h3_lcd_device = {
	288	.name = "lcd_h3",
	289	.id = -1,
	290	};
	291
0cc0a441 DB	292	static struct spi_board_info h3_spi_board_info[] __initdata = {
	293	[0] = {
	294	.modalias = "tsc2101",
	295	.bus_num = 2,
	296	.chip_select = 0,
	297	.irq = OMAP_GPIO_IRQ(H3_TS_GPIO),
	298	.max_speed_hz = 16000000,
	299	/* .platform_data = &tsc_platform_data, */
	300	},
	301	};
	302
1da177e4	303	static struct platform_device *devices[] __initdata = {
9b6553cd TL	304	&nor_device,
9b6553cd TL	305	&nand_device,
1da177e4 LT	306	&smc91x_device,
1da177e4 LT	307	&intlat_device,
9b6553cd TL	308	&h3_kp_device,
9b6553cd TL	309	&h3_lcd_device,
1da177e4 LT	310	};
	311
	312	static struct omap_usb_config h3_usb_config __initdata = {
	313	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	314	.otg = 2,
	315
	316	#ifdef CONFIG_USB_GADGET_OMAP
	317	.hmc_mode = 19, /* 0:host(off) 1:dev\|otg 2:disabled */
	318	#elif defined(CONFIG_USB_OHCI_HCD) \|\| defined(CONFIG_USB_OHCI_HCD_MODULE)
	319	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	320	.hmc_mode = 20, /* 1:dev\|otg(off) 1:host 2:disabled */
	321	#endif
	322
	323	.pins[1] = 3,
	324	};
	325
3179a019	326	static struct omap_lcd_config h3_lcd_config __initdata = {
3179a019 TL	327	.ctrl_name = "internal",
	328	};
	329
e27a93a9	330	static struct omap_board_config_kernel h3_config[] __initdata = {
3179a019	331	{ OMAP_TAG_LCD, &h3_lcd_config },
1da177e4 LT	332	};
1da177e4 LT	333
0cc0a441 DB	334	static struct i2c_board_info __initdata h3_i2c_board_info[] = {
0cc0a441 DB	335	{
3760f736	336	I2C_BOARD_INFO("tps65013", 0x48),
0cc0a441 DB	337	/* .irq = OMAP_GPIO_IRQ(??), */
0cc0a441 DB	338	},
9df013b3 JD	339	{
	340	I2C_BOARD_INFO("isp1301_omap", 0x2d),
	341	.irq = OMAP_GPIO_IRQ(14),
	342	},
0cc0a441 DB	343	};
0cc0a441 DB	344
9b6553cd TL	345	#define H3_NAND_RB_GPIO_PIN 10
9b6553cd TL	346
78be6325	347	static int nand_dev_ready(struct omap_nand_platform_data *data)
9b6553cd	348	{
0b84b5ca	349	return gpio_get_value(H3_NAND_RB_GPIO_PIN);
9b6553cd TL	350	}
9b6553cd TL	351
1da177e4 LT	352	static void __init h3_init(void)
1da177e4 LT	353	{
9b6553cd TL	354	/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
	355	* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
	356	* notice whether a NAND chip is enabled at probe time.
	357	*
	358	* H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	359	* (which on H2 may be 16bit) on CS3. Try detecting that in code here,
	360	* to avoid probing every possible flash configuration...
	361	*/
	362	nor_resource.end = nor_resource.start = omap_cs3_phys();
	363	nor_resource.end += SZ_32M - 1;
	364
	365	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	366	nand_resource.end += SZ_4K - 1;
f2d18fea JN	367	if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
	368	BUG();
	369	nand_data.dev_ready = nand_dev_ready;
9b6553cd TL	370
	371	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	372	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	373	omap_cfg_reg(V2_1710_GPIO10);
	374
	375	platform_add_devices(devices, ARRAY_SIZE(devices));
e27a93a9 TL	376	spi_register_board_info(h3_spi_board_info,
e27a93a9 TL	377	ARRAY_SIZE(h3_spi_board_info));
7c38cf02 TL	378	omap_board_config = h3_config;
7c38cf02 TL	379	omap_board_config_size = ARRAY_SIZE(h3_config);
3179a019	380	omap_serial_init();
1ed16a86 JN	381	omap_register_i2c_bus(1, 100, h3_i2c_board_info,
1ed16a86 JN	382	ARRAY_SIZE(h3_i2c_board_info));
b0b5aa3f	383	omap_usb_init(&h3_usb_config);
138ab9f8	384	h3_mmc_init();
1da177e4 LT	385	}
	386
	387	static void __init h3_init_smc91x(void)
	388	{
	389	omap_cfg_reg(W15_1710_GPIO40);
f2d18fea	390	if (gpio_request(40, "SMC91x irq") < 0) {
1da177e4 LT	391	printk("Error requesting gpio 40 for smc91x irq\n");
	392	return;
	393	}
1da177e4 LT	394	}
1da177e4 LT	395
277d58ef	396	static void __init h3_init_irq(void)
1da177e4	397	{
87bd63f6	398	omap1_init_common_hw();
1da177e4 LT	399	omap_init_irq();
	400	omap_gpio_init();
	401	h3_init_smc91x();
	402	}
	403
	404	static void __init h3_map_io(void)
	405	{
87bd63f6	406	omap1_map_common_io();
1da177e4 LT	407	}
	408
	409	MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
e9dea0c6	410	/* Maintainer: Texas Instruments, Inc. */
e9dea0c6 RK	411	.phys_io = 0xfff00000,
	412	.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
	413	.boot_params = 0x10000100,
	414	.map_io = h3_map_io,
	415	.init_irq = h3_init_irq,
	416	.init_machine = h3_init,
1da177e4 LT	417	.timer = &omap_timer,
1da177e4 LT	418	MACHINE_END