[deliverable/linux.git] / arch / arm / mach-omap1 / board-h3.c

/*
 * linux/arch/arm/mach-omap1/board-h3.c
 *
 * This file contains OMAP1710 H3 specific code.
 *
 * Copyright (C) 2004 Texas Instruments, Inc.
 * Copyright (C) 2002 MontaVista Software, Inc.
 * Copyright (C) 2001 RidgeRun, Inc.
 * Author: RidgeRun, Inc.
 *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/types.h>
#include <linux/init.h>
#include <linux/major.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/workqueue.h>
#include <linux/i2c.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/i2c/tps65010.h>
#include <linux/smc91x.h>

#include <asm/setup.h>
#include <asm/page.h>
#include <mach/hardware.h>
#include <asm/gpio.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>

#include <mach/irqs.h>
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/usb.h>
#include <plat/keypad.h>
#include <plat/dma.h>
#include <plat/common.h>

#include "board-h3.h"

/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
#define OMAP1710_ETHR_START		0x04000300

#define H3_TS_GPIO	48

static int h3_keymap[] = {
	KEY(0, 0, KEY_LEFT),
	KEY(0, 1, KEY_RIGHT),
	KEY(0, 2, KEY_3),
	KEY(0, 3, KEY_F10),
	KEY(0, 4, KEY_F5),
	KEY(0, 5, KEY_9),
	KEY(1, 0, KEY_DOWN),
	KEY(1, 1, KEY_UP),
	KEY(1, 2, KEY_2),
	KEY(1, 3, KEY_F9),
	KEY(1, 4, KEY_F7),
	KEY(1, 5, KEY_0),
	KEY(2, 0, KEY_ENTER),
	KEY(2, 1, KEY_6),
	KEY(2, 2, KEY_1),
	KEY(2, 3, KEY_F2),
	KEY(2, 4, KEY_F6),
	KEY(2, 5, KEY_HOME),
	KEY(3, 0, KEY_8),
	KEY(3, 1, KEY_5),
	KEY(3, 2, KEY_F12),
	KEY(3, 3, KEY_F3),
	KEY(3, 4, KEY_F8),
	KEY(3, 5, KEY_END),
	KEY(4, 0, KEY_7),
	KEY(4, 1, KEY_4),
	KEY(4, 2, KEY_F11),
	KEY(4, 3, KEY_F1),
	KEY(4, 4, KEY_F4),
	KEY(4, 5, KEY_ESC),
	KEY(5, 0, KEY_F13),
	KEY(5, 1, KEY_F14),
	KEY(5, 2, KEY_F15),
	KEY(5, 3, KEY_F16),
	KEY(5, 4, KEY_SLEEP),
	0
};


static struct mtd_partition nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
	      .name		= "bootloader",
	      .offset		= 0,
	      .size		= SZ_128K,
	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
	      .name		= "params",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_128K,
	      .mask_flags	= 0,
	},
	/* kernel */
	{
	      .name		= "kernel",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_2M,
	      .mask_flags	= 0
	},
	/* file system */
	{
	      .name		= "filesystem",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= MTDPART_SIZ_FULL,
	      .mask_flags	= 0
	}
};

static struct flash_platform_data nor_data = {
	.map_name	= "cfi_probe",
	.width		= 2,
	.parts		= nor_partitions,
	.nr_parts	= ARRAY_SIZE(nor_partitions),
};

static struct resource nor_resource = {
	/* This is on CS3, wherever it's mapped */
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nor_device = {
	.name		= "omapflash",
	.id		= 0,
	.dev		= {
		.platform_data	= &nor_data,
	},
	.num_resources	= 1,
	.resource	= &nor_resource,
};

static struct mtd_partition nand_partitions[] = {
#if 0
	/* REVISIT: enable these partitions if you make NAND BOOT work */
	{
		.name		= "xloader",
		.offset		= 0,
		.size		= 64 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "bootloader",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 256 * 1024,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 192 * 1024,
	},
	{
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 2 * SZ_1M,
	},
#endif
	{
		.name		= "filesystem",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,
	},
};

static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
	struct nand_chip *this = mtd->priv;
	unsigned long mask;

	if (cmd == NAND_CMD_NONE)
		return;

	mask = (ctrl & NAND_CLE) ? 0x02 : 0;
	if (ctrl & NAND_ALE)
		mask |= 0x04;
	writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
}

#define H3_NAND_RB_GPIO_PIN	10

static int nand_dev_ready(struct mtd_info *mtd)
{
	return gpio_get_value(H3_NAND_RB_GPIO_PIN);
}

static const char *part_probes[] = { "cmdlinepart", NULL };

struct platform_nand_data nand_platdata = {
	.chip	= {
		.nr_chips		= 1,
		.chip_offset		= 0,
		.nr_partitions		= ARRAY_SIZE(nand_partitions),
		.partitions		= nand_partitions,
		.options		= NAND_SAMSUNG_LP_OPTIONS,
		.part_probe_types	= part_probes,
	},
	.ctrl	= {
		.cmd_ctrl	= nand_cmd_ctl,
		.dev_ready	= nand_dev_ready,

	},
};

static struct resource nand_resource = {
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nand_device = {
	.name		= "gen_nand",
	.id		= 0,
	.dev		= {
		.platform_data	= &nand_platdata,
	},
	.num_resources	= 1,
	.resource	= &nand_resource,
};

static struct smc91x_platdata smc91x_info = {
	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda	= RPC_LED_100_10,
	.ledb	= RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= OMAP1710_ETHR_START,		/* Physical */
		.end	= OMAP1710_ETHR_START + 0xf,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= OMAP_GPIO_IRQ(40),
		.end	= OMAP_GPIO_IRQ(40),
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
	},
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

#define GPTIMER_BASE		0xFFFB1400
#define GPTIMER_REGS(x)	(0xFFFB1400 + (x * 0x800))
#define GPTIMER_REGS_SIZE	0x46

static struct resource intlat_resources[] = {
	[0] = {
		.start  = GPTIMER_REGS(0),	      /* Physical */
		.end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = INT_1610_GPTIMER1,
		.end    = INT_1610_GPTIMER1,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device intlat_device = {
	.name	   = "omap_intlat",
	.id	     = 0,
	.num_resources  = ARRAY_SIZE(intlat_resources),
	.resource       = intlat_resources,
};

static struct resource h3_kp_resources[] = {
	[0] = {
		.start	= INT_KEYBOARD,
		.end	= INT_KEYBOARD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct omap_kp_platform_data h3_kp_data = {
	.rows		= 8,
	.cols		= 8,
	.keymap		= h3_keymap,
	.keymapsize	= ARRAY_SIZE(h3_keymap),
	.rep		= 1,
	.delay		= 9,
	.dbounce	= 1,
};

static struct platform_device h3_kp_device = {
	.name		= "omap-keypad",
	.id		= -1,
	.dev		= {
		.platform_data = &h3_kp_data,
	},
	.num_resources	= ARRAY_SIZE(h3_kp_resources),
	.resource	= h3_kp_resources,
};

static struct platform_device h3_lcd_device = {
	.name		= "lcd_h3",
	.id		= -1,
};

static struct spi_board_info h3_spi_board_info[] __initdata = {
	[0] = {
		.modalias	= "tsc2101",
		.bus_num	= 2,
		.chip_select	= 0,
		.irq		= OMAP_GPIO_IRQ(H3_TS_GPIO),
		.max_speed_hz	= 16000000,
		/* .platform_data	= &tsc_platform_data, */
	},
};

static struct platform_device *devices[] __initdata = {
	&nor_device,
	&nand_device,
        &smc91x_device,
	&intlat_device,
	&h3_kp_device,
	&h3_lcd_device,
};

static struct omap_usb_config h3_usb_config __initdata = {
	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	.otg	    = 2,

#ifdef CONFIG_USB_GADGET_OMAP
	.hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
#elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	.hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
#endif

	.pins[1]	= 3,
};

static struct omap_lcd_config h3_lcd_config __initdata = {
	.ctrl_name	= "internal",
};

static struct omap_board_config_kernel h3_config[] __initdata = {
	{ OMAP_TAG_LCD,		&h3_lcd_config },
};

static struct i2c_board_info __initdata h3_i2c_board_info[] = {
       {
		I2C_BOARD_INFO("tps65013", 0x48),
               /* .irq         = OMAP_GPIO_IRQ(??), */
       },
	{
		I2C_BOARD_INFO("isp1301_omap", 0x2d),
		.irq		= OMAP_GPIO_IRQ(14),
	},
};

static void __init h3_init(void)
{
	/* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
	 * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
	 * notice whether a NAND chip is enabled at probe time.
	 *
	 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	 * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
	 * to avoid probing every possible flash configuration...
	 */
	nor_resource.end = nor_resource.start = omap_cs3_phys();
	nor_resource.end += SZ_32M - 1;

	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	nand_resource.end += SZ_4K - 1;
	if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
		BUG();
	gpio_direction_input(H3_NAND_RB_GPIO_PIN);

	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	omap_cfg_reg(V2_1710_GPIO10);

	platform_add_devices(devices, ARRAY_SIZE(devices));
	spi_register_board_info(h3_spi_board_info,
				ARRAY_SIZE(h3_spi_board_info));
	omap_board_config = h3_config;
	omap_board_config_size = ARRAY_SIZE(h3_config);
	omap_serial_init();
	omap_register_i2c_bus(1, 100, h3_i2c_board_info,
			      ARRAY_SIZE(h3_i2c_board_info));
	omap_usb_init(&h3_usb_config);
	h3_mmc_init();
}

static void __init h3_init_smc91x(void)
{
	omap_cfg_reg(W15_1710_GPIO40);
	if (gpio_request(40, "SMC91x irq") < 0) {
		printk("Error requesting gpio 40 for smc91x irq\n");
		return;
	}
}

static void __init h3_init_irq(void)
{
	omap1_init_common_hw();
	omap_init_irq();
	omap_gpio_init();
	h3_init_smc91x();
}

static void __init h3_map_io(void)
{
	omap1_map_common_io();
}

MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
	/* Maintainer: Texas Instruments, Inc. */
	.phys_io	= 0xfff00000,
	.io_pg_offst	= ((0xfef00000) >> 18) & 0xfffc,
	.boot_params	= 0x10000100,
	.map_io		= h3_map_io,
	.init_irq	= h3_init_irq,
	.init_machine	= h3_init,
	.timer		= &omap_timer,
MACHINE_END
Commit	Line	Data
1da177e4	1	/*
dbdf9ced	2	* linux/arch/arm/mach-omap1/board-h3.c
1da177e4 LT	3	*
	4	* This file contains OMAP1710 H3 specific code.
	5	*
	6	* Copyright (C) 2004 Texas Instruments, Inc.
	7	* Copyright (C) 2002 MontaVista Software, Inc.
	8	* Copyright (C) 2001 RidgeRun, Inc.
	9	* Author: RidgeRun, Inc.
	10	* Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License version 2 as
	14	* published by the Free Software Foundation.
	15	*/
	16
1da177e4 LT	17	#include <linux/types.h>
	18	#include <linux/init.h>
	19	#include <linux/major.h>
	20	#include <linux/kernel.h>
d052d1be	21	#include <linux/platform_device.h>
1da177e4	22	#include <linux/errno.h>
9b6553cd	23	#include <linux/workqueue.h>
8056c6cb	24	#include <linux/i2c.h>
1da177e4	25	#include <linux/mtd/mtd.h>
9b6553cd	26	#include <linux/mtd/nand.h>
1da177e4	27	#include <linux/mtd/partitions.h>
9b6553cd	28	#include <linux/input.h>
0cc0a441	29	#include <linux/spi/spi.h>
6d16bfb5	30	#include <linux/i2c/tps65010.h>
3bc48014	31	#include <linux/smc91x.h>
1da177e4 LT	32
	33	#include <asm/setup.h>
	34	#include <asm/page.h>
a09e64fb	35	#include <mach/hardware.h>
8056c6cb DB	36	#include <asm/gpio.h>
8056c6cb DB	37
1da177e4 LT	38	#include <asm/mach-types.h>
	39	#include <asm/mach/arch.h>
	40	#include <asm/mach/flash.h>
	41	#include <asm/mach/map.h>
	42
a09e64fb	43	#include <mach/irqs.h>
ce491cf8 TL	44	#include <plat/mux.h>
ce491cf8 TL	45	#include <plat/tc.h>
ce491cf8 TL	46	#include <plat/usb.h>
	47	#include <plat/keypad.h>
	48	#include <plat/dma.h>
	49	#include <plat/common.h>
1da177e4	50
228fe42e TL	51	#include "board-h3.h"
	52
	53	/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
	54	#define OMAP1710_ETHR_START 0x04000300
	55
0cc0a441 DB	56	#define H3_TS_GPIO 48
0cc0a441 DB	57
9b6553cd TL	58	static int h3_keymap[] = {
	59	KEY(0, 0, KEY_LEFT),
	60	KEY(0, 1, KEY_RIGHT),
	61	KEY(0, 2, KEY_3),
	62	KEY(0, 3, KEY_F10),
	63	KEY(0, 4, KEY_F5),
	64	KEY(0, 5, KEY_9),
	65	KEY(1, 0, KEY_DOWN),
	66	KEY(1, 1, KEY_UP),
	67	KEY(1, 2, KEY_2),
	68	KEY(1, 3, KEY_F9),
	69	KEY(1, 4, KEY_F7),
	70	KEY(1, 5, KEY_0),
	71	KEY(2, 0, KEY_ENTER),
	72	KEY(2, 1, KEY_6),
	73	KEY(2, 2, KEY_1),
	74	KEY(2, 3, KEY_F2),
	75	KEY(2, 4, KEY_F6),
	76	KEY(2, 5, KEY_HOME),
	77	KEY(3, 0, KEY_8),
	78	KEY(3, 1, KEY_5),
	79	KEY(3, 2, KEY_F12),
	80	KEY(3, 3, KEY_F3),
	81	KEY(3, 4, KEY_F8),
	82	KEY(3, 5, KEY_END),
	83	KEY(4, 0, KEY_7),
	84	KEY(4, 1, KEY_4),
	85	KEY(4, 2, KEY_F11),
	86	KEY(4, 3, KEY_F1),
	87	KEY(4, 4, KEY_F4),
	88	KEY(4, 5, KEY_ESC),
	89	KEY(5, 0, KEY_F13),
	90	KEY(5, 1, KEY_F14),
	91	KEY(5, 2, KEY_F15),
	92	KEY(5, 3, KEY_F16),
	93	KEY(5, 4, KEY_SLEEP),
	94	0
	95	};
	96
	97
	98	static struct mtd_partition nor_partitions[] = {
1da177e4 LT	99	/* bootloader (U-Boot, etc) in first sector */
	100	{
	101	.name = "bootloader",
	102	.offset = 0,
	103	.size = SZ_128K,
	104	.mask_flags = MTD_WRITEABLE, /* force read-only */
	105	},
	106	/* bootloader params in the next sector */
	107	{
	108	.name = "params",
	109	.offset = MTDPART_OFS_APPEND,
	110	.size = SZ_128K,
	111	.mask_flags = 0,
	112	},
	113	/* kernel */
	114	{
	115	.name = "kernel",
	116	.offset = MTDPART_OFS_APPEND,
	117	.size = SZ_2M,
	118	.mask_flags = 0
	119	},
	120	/* file system */
	121	{
	122	.name = "filesystem",
	123	.offset = MTDPART_OFS_APPEND,
	124	.size = MTDPART_SIZ_FULL,
	125	.mask_flags = 0
	126	}
	127	};
	128
9b6553cd	129	static struct flash_platform_data nor_data = {
1da177e4 LT	130	.map_name = "cfi_probe",
1da177e4 LT	131	.width = 2,
9b6553cd TL	132	.parts = nor_partitions,
9b6553cd TL	133	.nr_parts = ARRAY_SIZE(nor_partitions),
1da177e4 LT	134	};
1da177e4 LT	135
9b6553cd	136	static struct resource nor_resource = {
7c38cf02	137	/* This is on CS3, wherever it's mapped */
1da177e4 LT	138	.flags = IORESOURCE_MEM,
	139	};
	140
9b6553cd	141	static struct platform_device nor_device = {
1da177e4 LT	142	.name = "omapflash",
	143	.id = 0,
	144	.dev = {
9b6553cd TL	145	.platform_data = &nor_data,
	146	},
	147	.num_resources = 1,
	148	.resource = &nor_resource,
	149	};
	150
	151	static struct mtd_partition nand_partitions[] = {
	152	#if 0
	153	/* REVISIT: enable these partitions if you make NAND BOOT work */
	154	{
	155	.name = "xloader",
	156	.offset = 0,
	157	.size = 64 * 1024,
	158	.mask_flags = MTD_WRITEABLE, /* force read-only */
	159	},
	160	{
	161	.name = "bootloader",
	162	.offset = MTDPART_OFS_APPEND,
	163	.size = 256 * 1024,
	164	.mask_flags = MTD_WRITEABLE, /* force read-only */
	165	},
	166	{
	167	.name = "params",
	168	.offset = MTDPART_OFS_APPEND,
	169	.size = 192 * 1024,
	170	},
	171	{
	172	.name = "kernel",
	173	.offset = MTDPART_OFS_APPEND,
	174	.size = 2 * SZ_1M,
	175	},
	176	#endif
	177	{
	178	.name = "filesystem",
	179	.size = MTDPART_SIZ_FULL,
	180	.offset = MTDPART_OFS_APPEND,
	181	},
	182	};
	183
414f552a LM	184	static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
	185	{
	186	struct nand_chip *this = mtd->priv;
	187	unsigned long mask;
	188
	189	if (cmd == NAND_CMD_NONE)
	190	return;
	191
	192	mask = (ctrl & NAND_CLE) ? 0x02 : 0;
	193	if (ctrl & NAND_ALE)
	194	mask \|= 0x04;
	195	writeb(cmd, (unsigned long)this->IO_ADDR_W \| mask);
	196	}
	197
	198	#define H3_NAND_RB_GPIO_PIN 10
	199
	200	static int nand_dev_ready(struct mtd_info *mtd)
	201	{
	202	return gpio_get_value(H3_NAND_RB_GPIO_PIN);
	203	}
	204
	205	static const char *part_probes[] = { "cmdlinepart", NULL };
	206
	207	struct platform_nand_data nand_platdata = {
	208	.chip = {
	209	.nr_chips = 1,
	210	.chip_offset = 0,
	211	.nr_partitions = ARRAY_SIZE(nand_partitions),
	212	.partitions = nand_partitions,
	213	.options = NAND_SAMSUNG_LP_OPTIONS,
	214	.part_probe_types = part_probes,
	215	},
	216	.ctrl = {
	217	.cmd_ctrl = nand_cmd_ctl,
	218	.dev_ready = nand_dev_ready,
	219
	220	},
9b6553cd TL	221	};
	222
	223	static struct resource nand_resource = {
	224	.flags = IORESOURCE_MEM,
	225	};
	226
	227	static struct platform_device nand_device = {
414f552a	228	.name = "gen_nand",
9b6553cd TL	229	.id = 0,
9b6553cd TL	230	.dev = {
414f552a	231	.platform_data = &nand_platdata,
1da177e4 LT	232	},
1da177e4 LT	233	.num_resources = 1,
9b6553cd	234	.resource = &nand_resource,
1da177e4 LT	235	};
1da177e4 LT	236
3bc48014 LM	237	static struct smc91x_platdata smc91x_info = {
	238	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	239	.leda = RPC_LED_100_10,
	240	.ledb = RPC_LED_TX_RX,
	241	};
	242
1da177e4 LT	243	static struct resource smc91x_resources[] = {
	244	[0] = {
	245	.start = OMAP1710_ETHR_START, /* Physical */
	246	.end = OMAP1710_ETHR_START + 0xf,
	247	.flags = IORESOURCE_MEM,
	248	},
	249	[1] = {
	250	.start = OMAP_GPIO_IRQ(40),
	251	.end = OMAP_GPIO_IRQ(40),
e7b3dc7e	252	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWEDGE,
1da177e4 LT	253	},
	254	};
	255
	256	static struct platform_device smc91x_device = {
	257	.name = "smc91x",
	258	.id = 0,
3bc48014 LM	259	.dev = {
	260	.platform_data = &smc91x_info,
	261	},
1da177e4 LT	262	.num_resources = ARRAY_SIZE(smc91x_resources),
	263	.resource = smc91x_resources,
	264	};
	265
	266	#define GPTIMER_BASE 0xFFFB1400
	267	#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
	268	#define GPTIMER_REGS_SIZE 0x46
	269
	270	static struct resource intlat_resources[] = {
	271	[0] = {
	272	.start = GPTIMER_REGS(0), /* Physical */
	273	.end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
	274	.flags = IORESOURCE_MEM,
	275	},
	276	[1] = {
	277	.start = INT_1610_GPTIMER1,
	278	.end = INT_1610_GPTIMER1,
	279	.flags = IORESOURCE_IRQ,
	280	},
	281	};
	282
	283	static struct platform_device intlat_device = {
	284	.name = "omap_intlat",
	285	.id = 0,
	286	.num_resources = ARRAY_SIZE(intlat_resources),
	287	.resource = intlat_resources,
	288	};
	289
9b6553cd TL	290	static struct resource h3_kp_resources[] = {
	291	[0] = {
	292	.start = INT_KEYBOARD,
	293	.end = INT_KEYBOARD,
	294	.flags = IORESOURCE_IRQ,
	295	},
	296	};
	297
	298	static struct omap_kp_platform_data h3_kp_data = {
4d24607b KS	299	.rows = 8,
	300	.cols = 8,
	301	.keymap = h3_keymap,
	302	.keymapsize = ARRAY_SIZE(h3_keymap),
	303	.rep = 1,
	304	.delay = 9,
	305	.dbounce = 1,
9b6553cd TL	306	};
	307
	308	static struct platform_device h3_kp_device = {
	309	.name = "omap-keypad",
	310	.id = -1,
	311	.dev = {
	312	.platform_data = &h3_kp_data,
	313	},
	314	.num_resources = ARRAY_SIZE(h3_kp_resources),
	315	.resource = h3_kp_resources,
	316	};
	317
9b6553cd TL	318	static struct platform_device h3_lcd_device = {
	319	.name = "lcd_h3",
	320	.id = -1,
	321	};
	322
0cc0a441 DB	323	static struct spi_board_info h3_spi_board_info[] __initdata = {
	324	[0] = {
	325	.modalias = "tsc2101",
	326	.bus_num = 2,
	327	.chip_select = 0,
	328	.irq = OMAP_GPIO_IRQ(H3_TS_GPIO),
	329	.max_speed_hz = 16000000,
	330	/* .platform_data = &tsc_platform_data, */
	331	},
	332	};
	333
1da177e4	334	static struct platform_device *devices[] __initdata = {
9b6553cd TL	335	&nor_device,
9b6553cd TL	336	&nand_device,
1da177e4 LT	337	&smc91x_device,
1da177e4 LT	338	&intlat_device,
9b6553cd TL	339	&h3_kp_device,
9b6553cd TL	340	&h3_lcd_device,
1da177e4 LT	341	};
	342
	343	static struct omap_usb_config h3_usb_config __initdata = {
	344	/* usb1 has a Mini-AB port and external isp1301 transceiver */
	345	.otg = 2,
	346
	347	#ifdef CONFIG_USB_GADGET_OMAP
	348	.hmc_mode = 19, /* 0:host(off) 1:dev\|otg 2:disabled */
	349	#elif defined(CONFIG_USB_OHCI_HCD) \|\| defined(CONFIG_USB_OHCI_HCD_MODULE)
	350	/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
	351	.hmc_mode = 20, /* 1:dev\|otg(off) 1:host 2:disabled */
	352	#endif
	353
	354	.pins[1] = 3,
	355	};
	356
3179a019	357	static struct omap_lcd_config h3_lcd_config __initdata = {
3179a019 TL	358	.ctrl_name = "internal",
	359	};
	360
e27a93a9	361	static struct omap_board_config_kernel h3_config[] __initdata = {
3179a019	362	{ OMAP_TAG_LCD, &h3_lcd_config },
1da177e4 LT	363	};
1da177e4 LT	364
0cc0a441 DB	365	static struct i2c_board_info __initdata h3_i2c_board_info[] = {
0cc0a441 DB	366	{
3760f736	367	I2C_BOARD_INFO("tps65013", 0x48),
0cc0a441 DB	368	/* .irq = OMAP_GPIO_IRQ(??), */
0cc0a441 DB	369	},
9df013b3 JD	370	{
	371	I2C_BOARD_INFO("isp1301_omap", 0x2d),
	372	.irq = OMAP_GPIO_IRQ(14),
	373	},
0cc0a441 DB	374	};
0cc0a441 DB	375
1da177e4 LT	376	static void __init h3_init(void)
1da177e4 LT	377	{
9b6553cd TL	378	/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
	379	* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
	380	* notice whether a NAND chip is enabled at probe time.
	381	*
	382	* H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
	383	* (which on H2 may be 16bit) on CS3. Try detecting that in code here,
	384	* to avoid probing every possible flash configuration...
	385	*/
	386	nor_resource.end = nor_resource.start = omap_cs3_phys();
	387	nor_resource.end += SZ_32M - 1;
	388
	389	nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
	390	nand_resource.end += SZ_4K - 1;
f2d18fea JN	391	if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
f2d18fea JN	392	BUG();
414f552a	393	gpio_direction_input(H3_NAND_RB_GPIO_PIN);
9b6553cd TL	394
	395	/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
	396	/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
	397	omap_cfg_reg(V2_1710_GPIO10);
	398
	399	platform_add_devices(devices, ARRAY_SIZE(devices));
e27a93a9 TL	400	spi_register_board_info(h3_spi_board_info,
e27a93a9 TL	401	ARRAY_SIZE(h3_spi_board_info));
7c38cf02 TL	402	omap_board_config = h3_config;
7c38cf02 TL	403	omap_board_config_size = ARRAY_SIZE(h3_config);
3179a019	404	omap_serial_init();
1ed16a86 JN	405	omap_register_i2c_bus(1, 100, h3_i2c_board_info,
1ed16a86 JN	406	ARRAY_SIZE(h3_i2c_board_info));
b0b5aa3f	407	omap_usb_init(&h3_usb_config);
138ab9f8	408	h3_mmc_init();
1da177e4 LT	409	}
	410
	411	static void __init h3_init_smc91x(void)
	412	{
	413	omap_cfg_reg(W15_1710_GPIO40);
f2d18fea	414	if (gpio_request(40, "SMC91x irq") < 0) {
1da177e4 LT	415	printk("Error requesting gpio 40 for smc91x irq\n");
	416	return;
	417	}
1da177e4 LT	418	}
1da177e4 LT	419
277d58ef	420	static void __init h3_init_irq(void)
1da177e4	421	{
87bd63f6	422	omap1_init_common_hw();
1da177e4 LT	423	omap_init_irq();
	424	omap_gpio_init();
	425	h3_init_smc91x();
	426	}
	427
	428	static void __init h3_map_io(void)
	429	{
87bd63f6	430	omap1_map_common_io();
1da177e4 LT	431	}
	432
	433	MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
e9dea0c6	434	/* Maintainer: Texas Instruments, Inc. */
e9dea0c6 RK	435	.phys_io = 0xfff00000,
	436	.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
	437	.boot_params = 0x10000100,
	438	.map_io = h3_map_io,
	439	.init_irq = h3_init_irq,
	440	.init_machine = h3_init,
1da177e4 LT	441	.timer = &omap_timer,
1da177e4 LT	442	MACHINE_END