[deliverable/linux.git] / arch / arm / mach-omap1 / board-perseus2.c

/*
 * linux/arch/arm/mach-omap1/board-perseus2.c
 *
 * Modified from board-generic.c
 *
 * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
 * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>

#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>

#include <asm/arch/tc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mux.h>
#include <asm/arch/fpga.h>
#include <asm/arch/common.h>

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= H2P2_DBG_FPGA_ETHR_START,	/* Physical */
		.end	= H2P2_DBG_FPGA_ETHR_START + 0xf,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= INT_730_MPU_EXT_NIRQ,
		.end	= 0,
		.flags	= IORESOURCE_IRQ,
	},
};

static int __initdata p2_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 0};

static struct mtd_partition p2_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
	      .name		= "bootloader",
	      .offset		= 0,
	      .size		= SZ_128K,
	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
	      .name		= "params",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_128K,
	      .mask_flags	= 0,
	},
	/* kernel */
	{
	      .name		= "kernel",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_2M,
	      .mask_flags	= 0
	},
	/* rest of flash is a file system */
	{
	      .name		= "rootfs",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= MTDPART_SIZ_FULL,
	      .mask_flags	= 0
	},
};

static struct flash_platform_data p2_flash_data = {
	.map_name	= "cfi_probe",
	.width		= 2,
	.parts		= p2_partitions,
	.nr_parts	= ARRAY_SIZE(p2_partitions),
};

static struct resource p2_flash_resource = {
	.start		= OMAP_CS0_PHYS,
	.end		= OMAP_CS0_PHYS + SZ_32M - 1,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device p2_flash_device = {
	.name		= "omapflash",
	.id		= 0,
	.dev		= {
		.platform_data	= &p2_flash_data,
	},
	.num_resources	= 1,
	.resource	= &p2_flash_resource,
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

static struct platform_device *devices[] __initdata = {
	&p2_flash_device,
	&smc91x_device,
};

static void __init omap_perseus2_init(void)
{
	(void) platform_add_devices(devices, ARRAY_SIZE(devices));
}

static void __init perseus2_init_smc91x(void)
{
	fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
	mdelay(50);
	fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
		   H2P2_DBG_FPGA_LAN_RESET);
	mdelay(50);
}

void omap_perseus2_init_irq(void)
{
	omap_init_irq();
	omap_gpio_init();
	perseus2_init_smc91x();
}

/* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc omap_perseus2_io_desc[] __initdata = {
	{
		.virtual	= H2P2_DBG_FPGA_BASE,
		.pfn		= __phys_to_pfn(H2P2_DBG_FPGA_START),
		.length		= H2P2_DBG_FPGA_SIZE,
		.type		= MT_DEVICE
	}
};

static void __init omap_perseus2_map_io(void)
{
	omap_map_common_io();
	iotable_init(omap_perseus2_io_desc,
		     ARRAY_SIZE(omap_perseus2_io_desc));

	/* Early, board-dependent init */

	/*
	 * Hold GSM Reset until needed
	 */
	omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);

	/*
	 * UARTs -> done automagically by 8250 driver
	 */

	/*
	 * CSx timings, GPIO Mux ... setup
	 */

	/* Flash: CS0 timings setup */
	omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
	omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);

	/*
	 * Ethernet support trough the debug board
	 * CS1 timings setup
	 */
	omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
	omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);

	/*
	 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
	 * It is used as the Ethernet controller interrupt
	 */
	omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
	omap_serial_init(p2_serial_ports);
}

MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
	/* Maintainer: Kevin Hilman <kjh@hilman.org> */
	.phys_ram	= 0x10000000,
	.phys_io	= 0xfff00000,
	.io_pg_offst	= ((0xfef00000) >> 18) & 0xfffc,
	.boot_params	= 0x10000100,
	.map_io		= omap_perseus2_map_io,
	.init_irq	= omap_perseus2_init_irq,
	.init_machine	= omap_perseus2_init,
	.timer		= &omap_timer,
MACHINE_END
Commit	Line	Data
1da177e4	1	/*
dbdf9ced	2	* linux/arch/arm/mach-omap1/board-perseus2.c
1da177e4 LT	3	*
	4	* Modified from board-generic.c
	5	*
	6	* Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
	7	* Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/init.h>
	16	#include <linux/device.h>
	17	#include <linux/delay.h>
	18	#include <linux/mtd/mtd.h>
	19	#include <linux/mtd/partitions.h>
	20
	21	#include <asm/hardware.h>
	22	#include <asm/mach-types.h>
	23	#include <asm/mach/arch.h>
	24	#include <asm/mach/flash.h>
	25	#include <asm/mach/map.h>
	26
7c38cf02	27	#include <asm/arch/tc.h>
1da177e4 LT	28	#include <asm/arch/gpio.h>
	29	#include <asm/arch/mux.h>
	30	#include <asm/arch/fpga.h>
d48af15e	31	#include <asm/arch/common.h>
1da177e4 LT	32
	33	static struct resource smc91x_resources[] = {
	34	[0] = {
	35	.start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
	36	.end = H2P2_DBG_FPGA_ETHR_START + 0xf,
	37	.flags = IORESOURCE_MEM,
	38	},
	39	[1] = {
	40	.start = INT_730_MPU_EXT_NIRQ,
	41	.end = 0,
	42	.flags = IORESOURCE_IRQ,
	43	},
	44	};
	45
	46	static int __initdata p2_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 0};
	47
	48	static struct mtd_partition p2_partitions[] = {
	49	/* bootloader (U-Boot, etc) in first sector */
	50	{
	51	.name = "bootloader",
	52	.offset = 0,
	53	.size = SZ_128K,
	54	.mask_flags = MTD_WRITEABLE, /* force read-only */
	55	},
	56	/* bootloader params in the next sector */
	57	{
	58	.name = "params",
	59	.offset = MTDPART_OFS_APPEND,
	60	.size = SZ_128K,
	61	.mask_flags = 0,
	62	},
	63	/* kernel */
	64	{
	65	.name = "kernel",
	66	.offset = MTDPART_OFS_APPEND,
	67	.size = SZ_2M,
	68	.mask_flags = 0
	69	},
	70	/* rest of flash is a file system */
	71	{
	72	.name = "rootfs",
	73	.offset = MTDPART_OFS_APPEND,
	74	.size = MTDPART_SIZ_FULL,
	75	.mask_flags = 0
	76	},
	77	};
	78
	79	static struct flash_platform_data p2_flash_data = {
	80	.map_name = "cfi_probe",
	81	.width = 2,
	82	.parts = p2_partitions,
	83	.nr_parts = ARRAY_SIZE(p2_partitions),
	84	};
	85
	86	static struct resource p2_flash_resource = {
7c38cf02 TL	87	.start = OMAP_CS0_PHYS,
7c38cf02 TL	88	.end = OMAP_CS0_PHYS + SZ_32M - 1,
1da177e4 LT	89	.flags = IORESOURCE_MEM,
	90	};
	91
	92	static struct platform_device p2_flash_device = {
	93	.name = "omapflash",
	94	.id = 0,
	95	.dev = {
	96	.platform_data = &p2_flash_data,
	97	},
	98	.num_resources = 1,
	99	.resource = &p2_flash_resource,
	100	};
	101
	102	static struct platform_device smc91x_device = {
	103	.name = "smc91x",
	104	.id = 0,
	105	.num_resources = ARRAY_SIZE(smc91x_resources),
	106	.resource = smc91x_resources,
	107	};
	108
	109	static struct platform_device *devices[] __initdata = {
	110	&p2_flash_device,
	111	&smc91x_device,
	112	};
	113
	114	static void __init omap_perseus2_init(void)
	115	{
	116	(void) platform_add_devices(devices, ARRAY_SIZE(devices));
	117	}
	118
	119	static void __init perseus2_init_smc91x(void)
	120	{
	121	fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
	122	mdelay(50);
	123	fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
	124	H2P2_DBG_FPGA_LAN_RESET);
	125	mdelay(50);
	126	}
	127
	128	void omap_perseus2_init_irq(void)
	129	{
	130	omap_init_irq();
	131	omap_gpio_init();
	132	perseus2_init_smc91x();
	133	}
	134
	135	/* Only FPGA needs to be mapped here. All others are done with ioremap */
	136	static struct map_desc omap_perseus2_io_desc[] __initdata = {
9fe133b1 DS	137	{
	138	.virtual = H2P2_DBG_FPGA_BASE,
	139	.pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
	140	.length = H2P2_DBG_FPGA_SIZE,
	141	.type = MT_DEVICE
	142	}
1da177e4 LT	143	};
	144
	145	static void __init omap_perseus2_map_io(void)
	146	{
d48af15e	147	omap_map_common_io();
1da177e4 LT	148	iotable_init(omap_perseus2_io_desc,
	149	ARRAY_SIZE(omap_perseus2_io_desc));
	150
	151	/* Early, board-dependent init */
	152
	153	/*
	154	* Hold GSM Reset until needed
	155	*/
	156	omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);
	157
	158	/*
	159	* UARTs -> done automagically by 8250 driver
	160	*/
	161
	162	/*
	163	* CSx timings, GPIO Mux ... setup
	164	*/
	165
	166	/* Flash: CS0 timings setup */
	167	omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
	168	omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);
	169
	170	/*
	171	* Ethernet support trough the debug board
	172	* CS1 timings setup
	173	*/
	174	omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
	175	omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);
	176
	177	/*
	178	* Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
	179	* It is used as the Ethernet controller interrupt
	180	*/
	181	omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
	182	omap_serial_init(p2_serial_ports);
	183	}
	184
	185	MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
e9dea0c6 RK	186	/* Maintainer: Kevin Hilman <kjh@hilman.org> */
	187	.phys_ram = 0x10000000,
	188	.phys_io = 0xfff00000,
	189	.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
	190	.boot_params = 0x10000100,
	191	.map_io = omap_perseus2_map_io,
	192	.init_irq = omap_perseus2_init_irq,
	193	.init_machine = omap_perseus2_init,
1da177e4 LT	194	.timer = &omap_timer,
1da177e4 LT	195	MACHINE_END