Merge tag 'pci-v3.17-changes-3' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / arm / mach-omap1 / gpio15xx.c
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1/*
2 * OMAP15xx specific gpio init
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Author:
7 * Charulatha V <charu@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
12 *
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/gpio.h>
4b25408f 20#include <linux/platform_data/gpio-omap.h>
c95d10bc 21
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22#include <mach/irqs.h>
23
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24#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
25#define OMAP1510_GPIO_BASE 0xFFFCE000
26
27/* gpio1 */
ffd076ee 28static struct resource omap15xx_mpu_gpio_resources[] = {
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29 {
30 .start = OMAP1_MPUIO_VBASE,
31 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
32 .flags = IORESOURCE_MEM,
33 },
34 {
35 .start = INT_MPUIO,
36 .flags = IORESOURCE_IRQ,
37 },
38};
39
fa87931a 40static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
e5ff4440 41 .revision = USHRT_MAX,
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42 .direction = OMAP_MPUIO_IO_CNTL,
43 .datain = OMAP_MPUIO_INPUT_LATCH,
44 .dataout = OMAP_MPUIO_OUTPUT,
eef4bec7 45 .irqstatus = OMAP_MPUIO_GPIO_INT,
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46 .irqenable = OMAP_MPUIO_GPIO_MASKIT,
47 .irqenable_inv = true,
5e571f38 48 .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
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49};
50
ffd076ee 51static struct omap_gpio_platform_data omap15xx_mpu_gpio_config = {
d0d665a8 52 .is_mpuio = true,
c95d10bc 53 .bank_width = 16,
5de62b86 54 .bank_stride = 1,
fa87931a 55 .regs = &omap15xx_mpuio_regs,
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56};
57
07ad6ab3 58static struct platform_device omap15xx_mpu_gpio = {
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59 .name = "omap_gpio",
60 .id = 0,
61 .dev = {
62 .platform_data = &omap15xx_mpu_gpio_config,
63 },
64 .num_resources = ARRAY_SIZE(omap15xx_mpu_gpio_resources),
65 .resource = omap15xx_mpu_gpio_resources,
66};
67
68/* gpio2 */
ffd076ee 69static struct resource omap15xx_gpio_resources[] = {
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70 {
71 .start = OMAP1510_GPIO_BASE,
72 .end = OMAP1510_GPIO_BASE + SZ_2K - 1,
73 .flags = IORESOURCE_MEM,
74 },
75 {
76 .start = INT_GPIO_BANK1,
77 .flags = IORESOURCE_IRQ,
78 },
79};
80
fa87931a 81static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
e5ff4440 82 .revision = USHRT_MAX,
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83 .direction = OMAP1510_GPIO_DIR_CONTROL,
84 .datain = OMAP1510_GPIO_DATA_INPUT,
85 .dataout = OMAP1510_GPIO_DATA_OUTPUT,
eef4bec7 86 .irqstatus = OMAP1510_GPIO_INT_STATUS,
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87 .irqenable = OMAP1510_GPIO_INT_MASK,
88 .irqenable_inv = true,
5e571f38 89 .irqctrl = OMAP1510_GPIO_INT_CONTROL,
fad96ea8 90 .pinctrl = OMAP1510_GPIO_PIN_CONTROL,
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91};
92
ffd076ee 93static struct omap_gpio_platform_data omap15xx_gpio_config = {
c95d10bc 94 .bank_width = 16,
fa87931a 95 .regs = &omap15xx_gpio_regs,
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96};
97
07ad6ab3 98static struct platform_device omap15xx_gpio = {
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99 .name = "omap_gpio",
100 .id = 1,
101 .dev = {
102 .platform_data = &omap15xx_gpio_config,
103 },
104 .num_resources = ARRAY_SIZE(omap15xx_gpio_resources),
105 .resource = omap15xx_gpio_resources,
106};
107
108/*
109 * omap15xx_gpio_init needs to be done before
110 * machine_init functions access gpio APIs.
111 * Hence omap15xx_gpio_init is a postcore_initcall.
112 */
113static int __init omap15xx_gpio_init(void)
114{
115 if (!cpu_is_omap15xx())
116 return -EINVAL;
117
118 platform_device_register(&omap15xx_mpu_gpio);
119 platform_device_register(&omap15xx_gpio);
120
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121 return 0;
122}
123postcore_initcall(omap15xx_gpio_init);
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