Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
[deliverable/linux.git] / arch / arm / mach-omap1 / gpio16xx.c
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1/*
2 * OMAP16xx specific gpio init
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Author:
7 * Charulatha V <charu@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
12 *
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/gpio.h>
4b25408f 20#include <linux/platform_data/gpio-omap.h>
87fe6229 21
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22#include <mach/irqs.h>
23
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24#define OMAP1610_GPIO1_BASE 0xfffbe400
25#define OMAP1610_GPIO2_BASE 0xfffbec00
26#define OMAP1610_GPIO3_BASE 0xfffbb400
27#define OMAP1610_GPIO4_BASE 0xfffbbc00
28#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
29
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30/* smart idle, enable wakeup */
31#define SYSCONFIG_WORD 0x14
32
87fe6229 33/* mpu gpio */
ffd076ee 34static struct resource omap16xx_mpu_gpio_resources[] = {
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35 {
36 .start = OMAP1_MPUIO_VBASE,
37 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
38 .flags = IORESOURCE_MEM,
39 },
40 {
41 .start = INT_MPUIO,
42 .flags = IORESOURCE_IRQ,
43 },
44};
45
fa87931a 46static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
e5ff4440 47 .revision = USHRT_MAX,
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48 .direction = OMAP_MPUIO_IO_CNTL,
49 .datain = OMAP_MPUIO_INPUT_LATCH,
50 .dataout = OMAP_MPUIO_OUTPUT,
eef4bec7 51 .irqstatus = OMAP_MPUIO_GPIO_INT,
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52 .irqenable = OMAP_MPUIO_GPIO_MASKIT,
53 .irqenable_inv = true,
5e571f38 54 .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
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55};
56
ffd076ee 57static struct omap_gpio_platform_data omap16xx_mpu_gpio_config = {
d0d665a8 58 .is_mpuio = true,
87fe6229 59 .bank_width = 16,
5de62b86 60 .bank_stride = 1,
fa87931a 61 .regs = &omap16xx_mpuio_regs,
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62};
63
07ad6ab3 64static struct platform_device omap16xx_mpu_gpio = {
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65 .name = "omap_gpio",
66 .id = 0,
67 .dev = {
68 .platform_data = &omap16xx_mpu_gpio_config,
69 },
70 .num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
71 .resource = omap16xx_mpu_gpio_resources,
72};
73
74/* gpio1 */
ffd076ee 75static struct resource omap16xx_gpio1_resources[] = {
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76 {
77 .start = OMAP1610_GPIO1_BASE,
78 .end = OMAP1610_GPIO1_BASE + SZ_2K - 1,
79 .flags = IORESOURCE_MEM,
80 },
81 {
82 .start = INT_GPIO_BANK1,
83 .flags = IORESOURCE_IRQ,
84 },
85};
86
fa87931a 87static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
e5ff4440 88 .revision = OMAP1610_GPIO_REVISION,
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89 .direction = OMAP1610_GPIO_DIRECTION,
90 .set_dataout = OMAP1610_GPIO_SET_DATAOUT,
91 .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT,
92 .datain = OMAP1610_GPIO_DATAIN,
93 .dataout = OMAP1610_GPIO_DATAOUT,
eef4bec7 94 .irqstatus = OMAP1610_GPIO_IRQSTATUS1,
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95 .irqenable = OMAP1610_GPIO_IRQENABLE1,
96 .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
97 .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
6ed87c5b 98 .wkup_en = OMAP1610_GPIO_WAKEUPENABLE,
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99 .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
100 .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
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101};
102
ffd076ee 103static struct omap_gpio_platform_data omap16xx_gpio1_config = {
87fe6229 104 .bank_width = 16,
fa87931a 105 .regs = &omap16xx_gpio_regs,
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106};
107
07ad6ab3 108static struct platform_device omap16xx_gpio1 = {
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109 .name = "omap_gpio",
110 .id = 1,
111 .dev = {
112 .platform_data = &omap16xx_gpio1_config,
113 },
114 .num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
115 .resource = omap16xx_gpio1_resources,
116};
117
118/* gpio2 */
ffd076ee 119static struct resource omap16xx_gpio2_resources[] = {
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120 {
121 .start = OMAP1610_GPIO2_BASE,
122 .end = OMAP1610_GPIO2_BASE + SZ_2K - 1,
123 .flags = IORESOURCE_MEM,
124 },
125 {
126 .start = INT_1610_GPIO_BANK2,
127 .flags = IORESOURCE_IRQ,
128 },
129};
130
ffd076ee 131static struct omap_gpio_platform_data omap16xx_gpio2_config = {
87fe6229 132 .bank_width = 16,
fa87931a 133 .regs = &omap16xx_gpio_regs,
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134};
135
07ad6ab3 136static struct platform_device omap16xx_gpio2 = {
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137 .name = "omap_gpio",
138 .id = 2,
139 .dev = {
140 .platform_data = &omap16xx_gpio2_config,
141 },
142 .num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
143 .resource = omap16xx_gpio2_resources,
144};
145
146/* gpio3 */
ffd076ee 147static struct resource omap16xx_gpio3_resources[] = {
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148 {
149 .start = OMAP1610_GPIO3_BASE,
150 .end = OMAP1610_GPIO3_BASE + SZ_2K - 1,
151 .flags = IORESOURCE_MEM,
152 },
153 {
154 .start = INT_1610_GPIO_BANK3,
155 .flags = IORESOURCE_IRQ,
156 },
157};
158
ffd076ee 159static struct omap_gpio_platform_data omap16xx_gpio3_config = {
87fe6229 160 .bank_width = 16,
fa87931a 161 .regs = &omap16xx_gpio_regs,
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162};
163
07ad6ab3 164static struct platform_device omap16xx_gpio3 = {
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165 .name = "omap_gpio",
166 .id = 3,
167 .dev = {
168 .platform_data = &omap16xx_gpio3_config,
169 },
170 .num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
171 .resource = omap16xx_gpio3_resources,
172};
173
174/* gpio4 */
ffd076ee 175static struct resource omap16xx_gpio4_resources[] = {
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176 {
177 .start = OMAP1610_GPIO4_BASE,
178 .end = OMAP1610_GPIO4_BASE + SZ_2K - 1,
179 .flags = IORESOURCE_MEM,
180 },
181 {
182 .start = INT_1610_GPIO_BANK4,
183 .flags = IORESOURCE_IRQ,
184 },
185};
186
ffd076ee 187static struct omap_gpio_platform_data omap16xx_gpio4_config = {
87fe6229 188 .bank_width = 16,
fa87931a 189 .regs = &omap16xx_gpio_regs,
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190};
191
07ad6ab3 192static struct platform_device omap16xx_gpio4 = {
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193 .name = "omap_gpio",
194 .id = 4,
195 .dev = {
196 .platform_data = &omap16xx_gpio4_config,
197 },
198 .num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
199 .resource = omap16xx_gpio4_resources,
200};
201
f8e7ba66 202static struct platform_device *omap16xx_gpio_dev[] __initdata = {
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203 &omap16xx_mpu_gpio,
204 &omap16xx_gpio1,
205 &omap16xx_gpio2,
206 &omap16xx_gpio3,
207 &omap16xx_gpio4,
208};
209
210/*
211 * omap16xx_gpio_init needs to be done before
212 * machine_init functions access gpio APIs.
213 * Hence omap16xx_gpio_init is a postcore_initcall.
214 */
215static int __init omap16xx_gpio_init(void)
216{
217 int i;
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218 void __iomem *base;
219 struct resource *res;
220 struct platform_device *pdev;
221 struct omap_gpio_platform_data *pdata;
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222
223 if (!cpu_is_omap16xx())
224 return -EINVAL;
225
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226 /*
227 * Enable system clock for GPIO module.
228 * The CAM_CLK_CTRL *is* really the right place.
229 */
230 omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
231 ULPD_CAM_CLK_CTRL);
232
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233 for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
234 pdev = omap16xx_gpio_dev[i];
235 pdata = pdev->dev.platform_data;
236
237 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
238 if (unlikely(!res)) {
239 dev_err(&pdev->dev, "Invalid mem resource.\n");
240 return -ENODEV;
241 }
87fe6229 242
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243 base = ioremap(res->start, resource_size(res));
244 if (unlikely(!base)) {
245 dev_err(&pdev->dev, "ioremap failed.\n");
246 return -ENOMEM;
247 }
248
249 __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
250 iounmap(base);
251
87fe6229 252 platform_device_register(omap16xx_gpio_dev[i]);
ab985f0f 253 }
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254
255 return 0;
256}
257postcore_initcall(omap16xx_gpio_init);
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