projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| b63128e8 TL |
1 | /* |
| 2 | * Helper module for board specific I2C bus registration | |
| 3 | * | |
| 4 | * Copyright (C) 2009 Nokia Corporation. | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or | |
| 7 | * modify it under the terms of the GNU General Public License | |
| 8 | * version 2 as published by the Free Software Foundation. | |
| 9 | * | |
| 10 | * This program is distributed in the hope that it will be useful, but | |
| 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 13 | * General Public License for more details. | |
| 14 | * | |
| 15 | * You should have received a copy of the GNU General Public License | |
| 16 | * along with this program; if not, write to the Free Software | |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
| 18 | * 02110-1301 USA | |
| 19 | * | |
| 20 | */ | |
| 21 | ||
| 3a8761c0 | 22 | #include <linux/i2c-omap.h> |
| 70c494c3 | 23 | #include <mach/mux.h> |
| e4c060db | 24 | #include "soc.h" |
| b63128e8 | 25 | |
| 01480bad | 26 | #include <plat/i2c.h> |
| 3a8761c0 TL |
27 | |
| 28 | #define OMAP_I2C_SIZE 0x3f | |
| 29 | #define OMAP1_I2C_BASE 0xfffb3800 | |
| 3a8761c0 TL |
30 | |
| 31 | static const char name[] = "omap_i2c"; | |
| 32 | ||
| 33 | static struct resource i2c_resources[2] = { | |
| 34 | }; | |
| 35 | ||
| 36 | static struct platform_device omap_i2c_devices[1] = { | |
| 37 | }; | |
| 38 | ||
| 39 | static void __init omap1_i2c_mux_pins(int bus_id) | |
| b63128e8 | 40 | { |
| bf92a407 CM |
41 | if (cpu_is_omap7xx()) { |
| 42 | omap_cfg_reg(I2C_7XX_SDA); | |
| 43 | omap_cfg_reg(I2C_7XX_SCL); | |
| 44 | } else { | |
| 45 | omap_cfg_reg(I2C_SDA); | |
| 46 | omap_cfg_reg(I2C_SCL); | |
| 47 | } | |
| b63128e8 | 48 | } |
| 3a8761c0 TL |
49 | |
| 50 | int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata, | |
| 51 | int bus_id) | |
| 52 | { | |
| 53 | struct platform_device *pdev; | |
| 54 | struct resource *res; | |
| 55 | ||
| c34f7c69 TL |
56 | if (bus_id > 1) |
| 57 | return -EINVAL; | |
| 58 | ||
| 3a8761c0 TL |
59 | omap1_i2c_mux_pins(bus_id); |
| 60 | ||
| 61 | pdev = &omap_i2c_devices[bus_id - 1]; | |
| 62 | pdev->id = bus_id; | |
| 63 | pdev->name = name; | |
| 64 | pdev->num_resources = ARRAY_SIZE(i2c_resources); | |
| 65 | res = i2c_resources; | |
| 66 | res[0].start = OMAP1_I2C_BASE; | |
| 67 | res[0].end = res[0].start + OMAP_I2C_SIZE; | |
| 68 | res[0].flags = IORESOURCE_MEM; | |
| 685e2d08 | 69 | res[1].start = INT_I2C; |
| 3a8761c0 TL |
70 | res[1].flags = IORESOURCE_IRQ; |
| 71 | pdev->resource = res; | |
| 72 | ||
| 73 | /* all OMAP1 have IP version 1 register set */ | |
| 74 | pdata->rev = OMAP_I2C_IP_VERSION_1; | |
| 75 | ||
| 76 | /* all OMAP1 I2C are implemented like this */ | |
| 77 | pdata->flags = OMAP_I2C_FLAG_NO_FIFO | | |
| 78 | OMAP_I2C_FLAG_SIMPLE_CLOCK | | |
| 79 | OMAP_I2C_FLAG_16BIT_DATA_REG | | |
| 80 | OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK; | |
| 81 | ||
| 82 | /* how the cpu bus is wired up differs for 7xx only */ | |
| 83 | ||
| 84 | if (cpu_is_omap7xx()) | |
| 85 | pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1; | |
| 86 | else | |
| 87 | pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2; | |
| 88 | ||
| 89 | pdev->dev.platform_data = pdata; | |
| 90 | ||
| 91 | return platform_device_register(pdev); | |
| 92 | } | |
| a6cf912c TL |
93 | |
| 94 | static int __init omap_i2c_cmdline(void) | |
| 95 | { | |
| 96 | return omap_register_i2c_bus_cmdline(); | |
| 97 | } | |
| 98 | subsys_initcall(omap_i2c_cmdline); |